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FEB_3347 11.02.26 15:34:57
Info
15:34:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:34:57:ST3_Shared:INFO: FEB-Microcable
15:34:57:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:34:57:febtest:INFO: Testing FEB with SN 3347
15:34:58:smx_tester:INFO: Scanning setup
15:34:58:elinks:INFO: Disabling clock on downlink 0
15:34:58:elinks:INFO: Disabling clock on downlink 1
15:34:58:elinks:INFO: Disabling clock on downlink 2
15:34:58:elinks:INFO: Disabling clock on downlink 3
15:34:58:elinks:INFO: Disabling clock on downlink 4
15:34:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:34:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:34:58:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:34:58:elinks:INFO: Disabling clock on downlink 0
15:34:58:elinks:INFO: Disabling clock on downlink 1
15:34:58:elinks:INFO: Disabling clock on downlink 2
15:34:58:elinks:INFO: Disabling clock on downlink 3
15:34:58:elinks:INFO: Disabling clock on downlink 4
15:34:58:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:34:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:34:58:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:34:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:34:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:34:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:34:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:34:59:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:34:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:34:59:elinks:INFO: Disabling clock on downlink 0
15:34:59:elinks:INFO: Disabling clock on downlink 1
15:34:59:elinks:INFO: Disabling clock on downlink 2
15:34:59:elinks:INFO: Disabling clock on downlink 3
15:34:59:elinks:INFO: Disabling clock on downlink 4
15:34:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:34:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:34:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:34:59:elinks:INFO: Disabling clock on downlink 0
15:34:59:elinks:INFO: Disabling clock on downlink 1
15:34:59:elinks:INFO: Disabling clock on downlink 2
15:34:59:elinks:INFO: Disabling clock on downlink 3
15:34:59:elinks:INFO: Disabling clock on downlink 4
15:34:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:34:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:34:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:34:59:elinks:INFO: Disabling clock on downlink 0
15:34:59:elinks:INFO: Disabling clock on downlink 1
15:34:59:elinks:INFO: Disabling clock on downlink 2
15:34:59:elinks:INFO: Disabling clock on downlink 3
15:34:59:elinks:INFO: Disabling clock on downlink 4
15:34:59:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:34:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:34:59:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:34:59:setup_element:INFO: Scanning clock phase
15:34:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:34:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:34:59:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:34:59:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:34:59:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:34:59:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXX__
Clock Delay: 35
15:34:59:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXX__
Clock Delay: 35
15:34:59:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:34:59:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:34:59:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXXX
Clock Delay: 36
15:34:59:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXXX
Clock Delay: 36
15:34:59:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:34:59:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:34:59:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:34:59:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:34:59:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:34:59:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:34:59:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:34:59:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:34:59:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
15:34:59:setup_element:INFO: Scanning data phases
15:34:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:34:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:35:04:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:35:04:setup_element:INFO: Eye window for uplink 0 : ____________XXXX________________________
Data delay found: 33
15:35:04:setup_element:INFO: Eye window for uplink 1 : __________XXXX__________________________
Data delay found: 31
15:35:04:setup_element:INFO: Eye window for uplink 2 : _______XXXXX____________________________
Data delay found: 29
15:35:04:setup_element:INFO: Eye window for uplink 3 : ______XXXXX_____________________________
Data delay found: 28
15:35:04:setup_element:INFO: Eye window for uplink 4 : _____XXXX_______________________________
Data delay found: 26
15:35:04:setup_element:INFO: Eye window for uplink 5 : ____XXXXX_______________________________
Data delay found: 26
15:35:04:setup_element:INFO: Eye window for uplink 6 : __XXXXX_________________________________
Data delay found: 24
15:35:04:setup_element:INFO: Eye window for uplink 7 : _XXXX__________________________________X
Data delay found: 21
15:35:04:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXXX________
Data delay found: 8
15:35:04:setup_element:INFO: Eye window for uplink 9 : _____________________________XXXXX______
Data delay found: 11
15:35:04:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXX______
Data delay found: 11
15:35:04:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
15:35:04:setup_element:INFO: Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
15:35:04:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
15:35:04:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXX___
Data delay found: 14
15:35:04:setup_element:INFO: Eye window for uplink 15: ________________________________XXXXX___
Data delay found: 14
15:35:04:setup_element:INFO: Setting the data phase to 33 for uplink 0
15:35:04:setup_element:INFO: Setting the data phase to 31 for uplink 1
15:35:04:setup_element:INFO: Setting the data phase to 29 for uplink 2
15:35:04:setup_element:INFO: Setting the data phase to 28 for uplink 3
15:35:04:setup_element:INFO: Setting the data phase to 26 for uplink 4
15:35:04:setup_element:INFO: Setting the data phase to 26 for uplink 5
15:35:04:setup_element:INFO: Setting the data phase to 24 for uplink 6
15:35:04:setup_element:INFO: Setting the data phase to 21 for uplink 7
15:35:04:setup_element:INFO: Setting the data phase to 8 for uplink 8
15:35:05:setup_element:INFO: Setting the data phase to 11 for uplink 9
15:35:05:setup_element:INFO: Setting the data phase to 11 for uplink 10
15:35:05:setup_element:INFO: Setting the data phase to 12 for uplink 11
15:35:05:setup_element:INFO: Setting the data phase to 15 for uplink 12
15:35:05:setup_element:INFO: Setting the data phase to 15 for uplink 13
15:35:05:setup_element:INFO: Setting the data phase to 14 for uplink 14
15:35:05:setup_element:INFO: Setting the data phase to 14 for uplink 15
15:35:05:setup_element:INFO: Beginning SMX ASICs map scan
15:35:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:35:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:35:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:35:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:35:05:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:35:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:35:05:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:35:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:35:05:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:35:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:35:05:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:35:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:35:05:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:35:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:35:05:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:35:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:35:06:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:35:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:35:06:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:35:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:35:06:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:35:07:setup_element:INFO: Performing Elink synchronization
15:35:07:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:35:07:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:35:07:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:35:07:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:35:07:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:35:07:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:35:08:febtest:INFO: Init all SMX (CSA): 30
15:35:22:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:35:22:febtest:INFO: 01-00 | XA-000-09-004-017-010-018-11 | 47.3 | 1124.0
15:35:22:febtest:INFO: 08-01 | XA-000-09-004-017-004-018-02 | 37.7 | 1153.7
15:35:23:febtest:INFO: 03-02 | XA-000-09-004-017-013-018-03 | 44.1 | 1141.9
15:35:23:febtest:INFO: 10-03 | XA-000-09-004-017-007-018-12 | 34.6 | 1165.6
15:35:23:febtest:INFO: 05-04 | XA-000-09-004-017-016-018-08 | 37.7 | 1165.6
15:35:23:febtest:INFO: 12-05 | XA-000-09-004-017-004-017-02 | 47.3 | 1124.0
15:35:23:febtest:INFO: 07-06 | XA-000-09-004-017-016-019-08 | 28.2 | 1189.2
15:35:24:febtest:INFO: 14-07 | XA-000-09-004-017-007-017-12 | 44.1 | 1141.9
15:35:25:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:35:27:ST3_smx:INFO: chip: 1-0 47.250730 C 1141.874115 mV
15:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:27:ST3_smx:INFO: Electrons
15:35:27:ST3_smx:INFO: # loops 0
15:35:28:ST3_smx:INFO: # loops 1
15:35:30:ST3_smx:INFO: # loops 2
15:35:32:ST3_smx:INFO: Total # of broken channels: 0
15:35:32:ST3_smx:INFO: List of broken channels: []
15:35:32:ST3_smx:INFO: Total # of broken channels: 0
15:35:32:ST3_smx:INFO: List of broken channels: []
15:35:33:ST3_smx:INFO: chip: 8-1 37.726682 C 1171.483840 mV
15:35:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:33:ST3_smx:INFO: Electrons
15:35:33:ST3_smx:INFO: # loops 0
15:35:35:ST3_smx:INFO: # loops 1
15:35:37:ST3_smx:INFO: # loops 2
15:35:38:ST3_smx:INFO: Total # of broken channels: 0
15:35:38:ST3_smx:INFO: List of broken channels: []
15:35:38:ST3_smx:INFO: Total # of broken channels: 0
15:35:38:ST3_smx:INFO: List of broken channels: []
15:35:40:ST3_smx:INFO: chip: 3-2 44.073563 C 1153.732915 mV
15:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:40:ST3_smx:INFO: Electrons
15:35:40:ST3_smx:INFO: # loops 0
15:35:42:ST3_smx:INFO: # loops 1
15:35:44:ST3_smx:INFO: # loops 2
15:35:46:ST3_smx:INFO: Total # of broken channels: 0
15:35:46:ST3_smx:INFO: List of broken channels: []
15:35:46:ST3_smx:INFO: Total # of broken channels: 0
15:35:46:ST3_smx:INFO: List of broken channels: []
15:35:48:ST3_smx:INFO: chip: 10-3 37.726682 C 1177.390875 mV
15:35:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:48:ST3_smx:INFO: Electrons
15:35:48:ST3_smx:INFO: # loops 0
15:35:49:ST3_smx:INFO: # loops 1
15:35:51:ST3_smx:INFO: # loops 2
15:35:53:ST3_smx:INFO: Total # of broken channels: 0
15:35:53:ST3_smx:INFO: List of broken channels: []
15:35:53:ST3_smx:INFO: Total # of broken channels: 0
15:35:53:ST3_smx:INFO: List of broken channels: []
15:35:54:ST3_smx:INFO: chip: 5-4 34.556970 C 1183.292940 mV
15:35:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:35:54:ST3_smx:INFO: Electrons
15:35:54:ST3_smx:INFO: # loops 0
15:35:56:ST3_smx:INFO: # loops 1
15:35:58:ST3_smx:INFO: # loops 2
15:36:00:ST3_smx:INFO: Total # of broken channels: 0
15:36:00:ST3_smx:INFO: List of broken channels: []
15:36:00:ST3_smx:INFO: Total # of broken channels: 0
15:36:00:ST3_smx:INFO: List of broken channels: []
15:36:01:ST3_smx:INFO: chip: 12-5 47.250730 C 1141.874115 mV
15:36:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:01:ST3_smx:INFO: Electrons
15:36:01:ST3_smx:INFO: # loops 0
15:36:03:ST3_smx:INFO: # loops 1
15:36:05:ST3_smx:INFO: # loops 2
15:36:07:ST3_smx:INFO: Total # of broken channels: 0
15:36:07:ST3_smx:INFO: List of broken channels: []
15:36:07:ST3_smx:INFO: Total # of broken channels: 1
15:36:07:ST3_smx:INFO: List of broken channels: [28]
15:36:09:ST3_smx:INFO: chip: 7-6 28.225000 C 1200.969315 mV
15:36:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:09:ST3_smx:INFO: Electrons
15:36:09:ST3_smx:INFO: # loops 0
15:36:10:ST3_smx:INFO: # loops 1
15:36:12:ST3_smx:INFO: # loops 2
15:36:14:ST3_smx:INFO: Total # of broken channels: 0
15:36:14:ST3_smx:INFO: List of broken channels: []
15:36:14:ST3_smx:INFO: Total # of broken channels: 0
15:36:14:ST3_smx:INFO: List of broken channels: []
15:36:15:ST3_smx:INFO: chip: 14-7 47.250730 C 1153.732915 mV
15:36:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:36:15:ST3_smx:INFO: Electrons
15:36:15:ST3_smx:INFO: # loops 0
15:36:17:ST3_smx:INFO: # loops 1
15:36:19:ST3_smx:INFO: # loops 2
15:36:20:ST3_smx:INFO: Total # of broken channels: 0
15:36:20:ST3_smx:INFO: List of broken channels: []
15:36:20:ST3_smx:INFO: Total # of broken channels: 0
15:36:20:ST3_smx:INFO: List of broken channels: []
15:36:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:36:21:febtest:INFO: 01-00 | XA-000-09-004-017-010-018-11 | 50.4 | 1159.7
15:36:21:febtest:INFO: 08-01 | XA-000-09-004-017-004-018-02 | 37.7 | 1201.0
15:36:21:febtest:INFO: 03-02 | XA-000-09-004-017-013-018-03 | 47.3 | 1183.3
15:36:21:febtest:INFO: 10-03 | XA-000-09-004-017-007-018-12 | 37.7 | 1201.0
15:36:22:febtest:INFO: 05-04 | XA-000-09-004-017-016-018-08 | 37.7 | 1201.0
15:36:22:febtest:INFO: 12-05 | XA-000-09-004-017-004-017-02 | 50.4 | 1159.7
15:36:22:febtest:INFO: 07-06 | XA-000-09-004-017-016-019-08 | 31.4 | 1224.5
15:36:22:febtest:INFO: 14-07 | XA-000-09-004-017-007-017-12 | 47.3 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_11-15_34_57
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3347| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5470', '1.850', '2.4270', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0130', '1.850', '2.3830', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '2.0030', '1.850', '0.5289', '0.000', '0.0000', '0.000', '0.0000']