Go Back
FEB_3352 20.02.26 08:07:52
Info
08:07:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:07:52:ST3_Shared:INFO: FEB-Microcable
08:07:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:07:52:febtest:INFO: Testing FEB with SN 3352
08:07:53:smx_tester:INFO: Scanning setup
08:07:53:elinks:INFO: Disabling clock on downlink 0
08:07:54:elinks:INFO: Disabling clock on downlink 1
08:07:54:elinks:INFO: Disabling clock on downlink 2
08:07:54:elinks:INFO: Disabling clock on downlink 3
08:07:54:elinks:INFO: Disabling clock on downlink 4
08:07:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:07:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:54:elinks:INFO: Disabling clock on downlink 0
08:07:54:elinks:INFO: Disabling clock on downlink 1
08:07:54:elinks:INFO: Disabling clock on downlink 2
08:07:54:elinks:INFO: Disabling clock on downlink 3
08:07:54:elinks:INFO: Disabling clock on downlink 4
08:07:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:07:54:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:07:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:54:elinks:INFO: Disabling clock on downlink 0
08:07:54:elinks:INFO: Disabling clock on downlink 1
08:07:54:elinks:INFO: Disabling clock on downlink 2
08:07:54:elinks:INFO: Disabling clock on downlink 3
08:07:54:elinks:INFO: Disabling clock on downlink 4
08:07:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:07:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:54:elinks:INFO: Disabling clock on downlink 0
08:07:54:elinks:INFO: Disabling clock on downlink 1
08:07:54:elinks:INFO: Disabling clock on downlink 2
08:07:54:elinks:INFO: Disabling clock on downlink 3
08:07:54:elinks:INFO: Disabling clock on downlink 4
08:07:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:07:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:54:elinks:INFO: Disabling clock on downlink 0
08:07:54:elinks:INFO: Disabling clock on downlink 1
08:07:54:elinks:INFO: Disabling clock on downlink 2
08:07:54:elinks:INFO: Disabling clock on downlink 3
08:07:54:elinks:INFO: Disabling clock on downlink 4
08:07:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:07:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:07:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:07:54:setup_element:INFO: Scanning clock phase
08:07:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:07:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:07:55:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:07:55:setup_element:INFO: Eye window for uplink 0 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 1 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:07:55:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXXX
Clock Delay: 36
08:07:55:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXX__
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:07:55:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:07:55:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:07:55:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXX__
Clock Delay: 34
08:07:55:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXX__
Clock Delay: 35
08:07:55:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXX__
Clock Delay: 35
08:07:55:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
08:07:55:setup_element:INFO: Scanning data phases
08:07:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:07:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:00:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:08:00:setup_element:INFO: Eye window for uplink 0 : _____________XXXX_______________________
Data delay found: 34
08:08:00:setup_element:INFO: Eye window for uplink 1 : __________XXXX__________________________
Data delay found: 31
08:08:00:setup_element:INFO: Eye window for uplink 2 : _________XXXXXX_________________________
Data delay found: 31
08:08:00:setup_element:INFO: Eye window for uplink 3 : _________XXXXX__________________________
Data delay found: 31
08:08:00:setup_element:INFO: Eye window for uplink 4 : ________XXX_____________________________
Data delay found: 29
08:08:00:setup_element:INFO: Eye window for uplink 5 : ______XXXXX_____________________________
Data delay found: 28
08:08:00:setup_element:INFO: Eye window for uplink 6 : __XXXX__________________________________
Data delay found: 23
08:08:00:setup_element:INFO: Eye window for uplink 7 : XXXX___________________________________X
Data delay found: 21
08:08:00:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXXX_______
Data delay found: 10
08:08:00:setup_element:INFO: Eye window for uplink 9 : _______________________________XXXX_____
Data delay found: 12
08:08:00:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXX___
Data delay found: 14
08:08:00:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXX__
Data delay found: 15
08:08:00:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____
Data delay found: 13
08:08:00:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
08:08:00:setup_element:INFO: Eye window for uplink 14: ________________________________XXXXX___
Data delay found: 14
08:08:00:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__
Data delay found: 15
08:08:00:setup_element:INFO: Setting the data phase to 34 for uplink 0
08:08:00:setup_element:INFO: Setting the data phase to 31 for uplink 1
08:08:00:setup_element:INFO: Setting the data phase to 31 for uplink 2
08:08:00:setup_element:INFO: Setting the data phase to 31 for uplink 3
08:08:00:setup_element:INFO: Setting the data phase to 29 for uplink 4
08:08:00:setup_element:INFO: Setting the data phase to 28 for uplink 5
08:08:00:setup_element:INFO: Setting the data phase to 23 for uplink 6
08:08:00:setup_element:INFO: Setting the data phase to 21 for uplink 7
08:08:00:setup_element:INFO: Setting the data phase to 10 for uplink 8
08:08:00:setup_element:INFO: Setting the data phase to 12 for uplink 9
08:08:00:setup_element:INFO: Setting the data phase to 14 for uplink 10
08:08:00:setup_element:INFO: Setting the data phase to 15 for uplink 11
08:08:00:setup_element:INFO: Setting the data phase to 13 for uplink 12
08:08:00:setup_element:INFO: Setting the data phase to 13 for uplink 13
08:08:00:setup_element:INFO: Setting the data phase to 14 for uplink 14
08:08:00:setup_element:INFO: Setting the data phase to 15 for uplink 15
08:08:00:setup_element:INFO: Beginning SMX ASICs map scan
08:08:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:08:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:08:00:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:08:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:08:00:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:08:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:08:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:08:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:08:00:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:08:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:08:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:08:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:08:01:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:08:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:08:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:08:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:08:01:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:08:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:08:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:08:03:setup_element:INFO: Performing Elink synchronization
08:08:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:08:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:08:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:08:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:08:03:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:08:04:febtest:INFO: Init all SMX (CSA): 30
08:08:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:08:20:febtest:INFO: 01-00 | XA-000-09-004-017-007-015-11 | 37.7 | 1159.7
08:08:20:febtest:INFO: 08-01 | XA-000-09-004-017-010-014-12 | 53.6 | 1112.1
08:08:20:febtest:INFO: 03-02 | XA-000-09-004-017-007-016-12 | 47.3 | 1135.9
08:08:21:febtest:INFO: 10-03 | XA-000-09-004-017-007-014-11 | 44.1 | 1159.7
08:08:21:febtest:INFO: 05-04 | XA-000-09-004-017-016-014-15 | 50.4 | 1130.0
08:08:21:febtest:INFO: 12-05 | XA-000-09-004-017-010-013-12 | 50.4 | 1130.0
08:08:21:febtest:INFO: 07-06 | XA-000-09-004-017-013-014-04 | 37.7 | 1177.4
08:08:22:febtest:INFO: 14-07 | XA-000-09-004-017-007-013-11 | 50.4 | 1135.9
08:08:23:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:08:25:ST3_smx:INFO: chip: 1-0 37.726682 C 1171.483840 mV
08:08:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:25:ST3_smx:INFO: Electrons
08:08:25:ST3_smx:INFO: # loops 0
08:08:27:ST3_smx:INFO: # loops 1
08:08:29:ST3_smx:INFO: # loops 2
08:08:31:ST3_smx:INFO: Total # of broken channels: 0
08:08:31:ST3_smx:INFO: List of broken channels: []
08:08:31:ST3_smx:INFO: Total # of broken channels: 0
08:08:31:ST3_smx:INFO: List of broken channels: []
08:08:32:ST3_smx:INFO: chip: 8-1 56.797143 C 1124.048640 mV
08:08:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:32:ST3_smx:INFO: Electrons
08:08:32:ST3_smx:INFO: # loops 0
08:08:34:ST3_smx:INFO: # loops 1
08:08:36:ST3_smx:INFO: # loops 2
08:08:39:ST3_smx:INFO: Total # of broken channels: 0
08:08:39:ST3_smx:INFO: List of broken channels: []
08:08:39:ST3_smx:INFO: Total # of broken channels: 0
08:08:39:ST3_smx:INFO: List of broken channels: []
08:08:40:ST3_smx:INFO: chip: 3-2 50.430383 C 1153.732915 mV
08:08:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:40:ST3_smx:INFO: Electrons
08:08:40:ST3_smx:INFO: # loops 0
08:08:42:ST3_smx:INFO: # loops 1
08:08:44:ST3_smx:INFO: # loops 2
08:08:46:ST3_smx:INFO: Total # of broken channels: 0
08:08:46:ST3_smx:INFO: List of broken channels: []
08:08:46:ST3_smx:INFO: Total # of broken channels: 0
08:08:46:ST3_smx:INFO: List of broken channels: []
08:08:48:ST3_smx:INFO: chip: 10-3 47.250730 C 1171.483840 mV
08:08:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:48:ST3_smx:INFO: Electrons
08:08:48:ST3_smx:INFO: # loops 0
08:08:50:ST3_smx:INFO: # loops 1
08:08:52:ST3_smx:INFO: # loops 2
08:08:54:ST3_smx:INFO: Total # of broken channels: 0
08:08:54:ST3_smx:INFO: List of broken channels: []
08:08:54:ST3_smx:INFO: Total # of broken channels: 0
08:08:54:ST3_smx:INFO: List of broken channels: []
08:08:56:ST3_smx:INFO: chip: 5-4 53.612520 C 1147.806000 mV
08:08:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:08:56:ST3_smx:INFO: Electrons
08:08:56:ST3_smx:INFO: # loops 0
08:08:58:ST3_smx:INFO: # loops 1
08:09:00:ST3_smx:INFO: # loops 2
08:09:02:ST3_smx:INFO: Total # of broken channels: 0
08:09:02:ST3_smx:INFO: List of broken channels: []
08:09:02:ST3_smx:INFO: Total # of broken channels: 0
08:09:02:ST3_smx:INFO: List of broken channels: []
08:09:04:ST3_smx:INFO: chip: 12-5 56.797143 C 1141.874115 mV
08:09:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:04:ST3_smx:INFO: Electrons
08:09:04:ST3_smx:INFO: # loops 0
08:09:06:ST3_smx:INFO: # loops 1
08:09:08:ST3_smx:INFO: # loops 2
08:09:10:ST3_smx:INFO: Total # of broken channels: 0
08:09:10:ST3_smx:INFO: List of broken channels: []
08:09:10:ST3_smx:INFO: Total # of broken channels: 0
08:09:10:ST3_smx:INFO: List of broken channels: []
08:09:12:ST3_smx:INFO: chip: 7-6 44.073563 C 1189.190035 mV
08:09:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:12:ST3_smx:INFO: Electrons
08:09:12:ST3_smx:INFO: # loops 0
08:09:14:ST3_smx:INFO: # loops 1
08:09:16:ST3_smx:INFO: # loops 2
08:09:18:ST3_smx:INFO: Total # of broken channels: 0
08:09:18:ST3_smx:INFO: List of broken channels: []
08:09:18:ST3_smx:INFO: Total # of broken channels: 0
08:09:18:ST3_smx:INFO: List of broken channels: []
08:09:19:ST3_smx:INFO: chip: 14-7 56.797143 C 1153.732915 mV
08:09:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:19:ST3_smx:INFO: Electrons
08:09:19:ST3_smx:INFO: # loops 0
08:09:21:ST3_smx:INFO: # loops 1
08:09:23:ST3_smx:INFO: # loops 2
08:09:25:ST3_smx:INFO: Total # of broken channels: 0
08:09:25:ST3_smx:INFO: List of broken channels: []
08:09:25:ST3_smx:INFO: Total # of broken channels: 0
08:09:25:ST3_smx:INFO: List of broken channels: []
08:09:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:09:26:febtest:INFO: 01-00 | XA-000-09-004-017-007-015-11 | 40.9 | 1201.0
08:09:26:febtest:INFO: 08-01 | XA-000-09-004-017-010-014-12 | 60.0 | 1153.7
08:09:26:febtest:INFO: 03-02 | XA-000-09-004-017-007-016-12 | 53.6 | 1177.4
08:09:26:febtest:INFO: 10-03 | XA-000-09-004-017-007-014-11 | 50.4 | 1201.0
08:09:26:febtest:INFO: 05-04 | XA-000-09-004-017-016-014-15 | 53.6 | 1189.2
08:09:27:febtest:INFO: 12-05 | XA-000-09-004-017-010-013-12 | 60.0 | 1165.6
08:09:27:febtest:INFO: 07-06 | XA-000-09-004-017-013-014-04 | 47.3 | 1212.7
08:09:27:febtest:INFO: 14-07 | XA-000-09-004-017-007-013-11 | 60.0 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_20-08_07_52
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3352| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '1.6050', '1.850', '2.5030', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0260', '1.850', '2.3420', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9880', '1.850', '0.5331', '0.000', '0.0000', '0.000', '0.0000']