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FEB_3354 23.02.26 11:25:49
Info
11:25:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:25:49:ST3_Shared:INFO: FEB-Microcable
11:25:49:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:25:49:febtest:INFO: Testing FEB with SN 3354
11:25:50:smx_tester:INFO: Scanning setup
11:25:50:elinks:INFO: Disabling clock on downlink 0
11:25:50:elinks:INFO: Disabling clock on downlink 1
11:25:50:elinks:INFO: Disabling clock on downlink 2
11:25:50:elinks:INFO: Disabling clock on downlink 3
11:25:50:elinks:INFO: Disabling clock on downlink 4
11:25:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:25:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:25:50:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:25:50:elinks:INFO: Disabling clock on downlink 0
11:25:50:elinks:INFO: Disabling clock on downlink 1
11:25:50:elinks:INFO: Disabling clock on downlink 2
11:25:50:elinks:INFO: Disabling clock on downlink 3
11:25:50:elinks:INFO: Disabling clock on downlink 4
11:25:50:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:25:50:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
11:25:51:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
11:25:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:25:51:elinks:INFO: Disabling clock on downlink 0
11:25:51:elinks:INFO: Disabling clock on downlink 1
11:25:51:elinks:INFO: Disabling clock on downlink 2
11:25:51:elinks:INFO: Disabling clock on downlink 3
11:25:51:elinks:INFO: Disabling clock on downlink 4
11:25:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:25:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:25:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:25:51:elinks:INFO: Disabling clock on downlink 0
11:25:51:elinks:INFO: Disabling clock on downlink 1
11:25:51:elinks:INFO: Disabling clock on downlink 2
11:25:51:elinks:INFO: Disabling clock on downlink 3
11:25:51:elinks:INFO: Disabling clock on downlink 4
11:25:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:25:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:25:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:25:51:elinks:INFO: Disabling clock on downlink 0
11:25:51:elinks:INFO: Disabling clock on downlink 1
11:25:51:elinks:INFO: Disabling clock on downlink 2
11:25:51:elinks:INFO: Disabling clock on downlink 3
11:25:51:elinks:INFO: Disabling clock on downlink 4
11:25:51:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:25:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:25:51:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:25:51:setup_element:INFO: Scanning clock phase
11:25:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:25:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:25:51:setup_element:INFO: Clock phase scan results for group 0, downlink 1
11:25:51:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:25:51:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:25:51:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:25:51:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:25:51:setup_element:INFO: Eye window for uplink 4 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:25:51:setup_element:INFO: Eye window for uplink 5 : __________________________________________________________________________XXXXXX
Clock Delay: 36
11:25:51:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:25:51:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXX_
Clock Delay: 36
11:25:51:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:25:51:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:25:51:setup_element:INFO: Eye window for uplink 10: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:25:51:setup_element:INFO: Eye window for uplink 11: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:25:51:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:25:51:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXX___
Clock Delay: 34
11:25:51:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:25:51:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:25:51:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
11:25:51:setup_element:INFO: Scanning data phases
11:25:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:25:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:25:57:setup_element:INFO: Data phase scan results for group 0, downlink 1
11:25:57:setup_element:INFO: Eye window for uplink 0 : ______________XXXXX_____________________
Data delay found: 36
11:25:57:setup_element:INFO: Eye window for uplink 1 : ___________XXXXX________________________
Data delay found: 33
11:25:57:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
11:25:57:setup_element:INFO: Eye window for uplink 3 : _______XXXXX____________________________
Data delay found: 29
11:25:57:setup_element:INFO: Eye window for uplink 4 : ________XXXXX___________________________
Data delay found: 30
11:25:57:setup_element:INFO: Eye window for uplink 5 : _______XXXXX____________________________
Data delay found: 29
11:25:57:setup_element:INFO: Eye window for uplink 6 : _XXXX___________________________________
Data delay found: 22
11:25:57:setup_element:INFO: Eye window for uplink 7 : XXX___________________________________XX
Data delay found: 20
11:25:57:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXX_________
Data delay found: 8
11:25:57:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXX______
Data delay found: 10
11:25:57:setup_element:INFO: Eye window for uplink 10: _____________________________XXXXX______
Data delay found: 11
11:25:57:setup_element:INFO: Eye window for uplink 11: ______________________________XXXXX_____
Data delay found: 12
11:25:57:setup_element:INFO: Eye window for uplink 12: ______________________________XXXX______
Data delay found: 11
11:25:57:setup_element:INFO: Eye window for uplink 13: ______________________________XXXX______
Data delay found: 11
11:25:57:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXX______
Data delay found: 11
11:25:57:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXX______
Data delay found: 11
11:25:57:setup_element:INFO: Setting the data phase to 36 for uplink 0
11:25:57:setup_element:INFO: Setting the data phase to 33 for uplink 1
11:25:57:setup_element:INFO: Setting the data phase to 30 for uplink 2
11:25:57:setup_element:INFO: Setting the data phase to 29 for uplink 3
11:25:57:setup_element:INFO: Setting the data phase to 30 for uplink 4
11:25:57:setup_element:INFO: Setting the data phase to 29 for uplink 5
11:25:57:setup_element:INFO: Setting the data phase to 22 for uplink 6
11:25:57:setup_element:INFO: Setting the data phase to 20 for uplink 7
11:25:57:setup_element:INFO: Setting the data phase to 8 for uplink 8
11:25:57:setup_element:INFO: Setting the data phase to 10 for uplink 9
11:25:57:setup_element:INFO: Setting the data phase to 11 for uplink 10
11:25:57:setup_element:INFO: Setting the data phase to 12 for uplink 11
11:25:57:setup_element:INFO: Setting the data phase to 11 for uplink 12
11:25:57:setup_element:INFO: Setting the data phase to 11 for uplink 13
11:25:57:setup_element:INFO: Setting the data phase to 11 for uplink 14
11:25:57:setup_element:INFO: Setting the data phase to 11 for uplink 15
11:25:57:setup_element:INFO: Beginning SMX ASICs map scan
11:25:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:25:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:25:57:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:25:57:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:25:57:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
11:25:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
11:25:57:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
11:25:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
11:25:57:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
11:25:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
11:25:57:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
11:25:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
11:25:57:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
11:25:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
11:25:57:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
11:25:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
11:25:58:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
11:25:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
11:25:58:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
11:25:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
11:25:58:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
11:25:59:setup_element:INFO: Performing Elink synchronization
11:25:59:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:25:59:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
11:25:59:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
11:25:59:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
11:25:59:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
11:25:59:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
11:26:00:febtest:INFO: Init all SMX (CSA): 30
11:26:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:26:15:febtest:INFO: 01-00 | XA-000-09-004-017-008-022-08 | 47.3 | 1130.0
11:26:15:febtest:INFO: 08-01 | XA-000-09-004-017-014-021-13 | 31.4 | 1177.4
11:26:15:febtest:INFO: 03-02 | XA-000-09-004-017-005-021-15 | 44.1 | 1141.9
11:26:15:febtest:INFO: 10-03 | XA-000-09-004-017-011-021-06 | 44.1 | 1147.8
11:26:16:febtest:INFO: 05-04 | XA-000-09-004-017-017-020-05 | 34.6 | 1159.7
11:26:16:febtest:INFO: 12-05 | XA-000-09-004-017-016-015-15 | 37.7 | 1165.6
11:26:16:febtest:INFO: 07-06 | XA-000-09-004-017-017-021-05 | 15.6 | 1236.2
11:26:16:febtest:INFO: 14-07 | XA-000-09-004-017-010-015-12 | 40.9 | 1153.7
11:26:17:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
11:26:19:ST3_smx:INFO: chip: 1-0 47.250730 C 1135.937260 mV
11:26:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:19:ST3_smx:INFO: Electrons
11:26:19:ST3_smx:INFO: # loops 0
11:26:21:ST3_smx:INFO: # loops 1
11:26:22:ST3_smx:INFO: # loops 2
11:26:24:ST3_smx:INFO: Total # of broken channels: 0
11:26:24:ST3_smx:INFO: List of broken channels: []
11:26:24:ST3_smx:INFO: Total # of broken channels: 0
11:26:24:ST3_smx:INFO: List of broken channels: []
11:26:26:ST3_smx:INFO: chip: 8-1 31.389742 C 1195.082160 mV
11:26:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:26:ST3_smx:INFO: Electrons
11:26:26:ST3_smx:INFO: # loops 0
11:26:27:ST3_smx:INFO: # loops 1
11:26:29:ST3_smx:INFO: # loops 2
11:26:31:ST3_smx:INFO: Total # of broken channels: 0
11:26:31:ST3_smx:INFO: List of broken channels: []
11:26:31:ST3_smx:INFO: Total # of broken channels: 0
11:26:31:ST3_smx:INFO: List of broken channels: []
11:26:32:ST3_smx:INFO: chip: 3-2 44.073563 C 1153.732915 mV
11:26:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:32:ST3_smx:INFO: Electrons
11:26:32:ST3_smx:INFO: # loops 0
11:26:34:ST3_smx:INFO: # loops 1
11:26:36:ST3_smx:INFO: # loops 2
11:26:37:ST3_smx:INFO: Total # of broken channels: 0
11:26:37:ST3_smx:INFO: List of broken channels: []
11:26:37:ST3_smx:INFO: Total # of broken channels: 0
11:26:37:ST3_smx:INFO: List of broken channels: []
11:26:39:ST3_smx:INFO: chip: 10-3 44.073563 C 1165.571835 mV
11:26:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:39:ST3_smx:INFO: Electrons
11:26:39:ST3_smx:INFO: # loops 0
11:26:40:ST3_smx:INFO: # loops 1
11:26:42:ST3_smx:INFO: # loops 2
11:26:44:ST3_smx:INFO: Total # of broken channels: 0
11:26:44:ST3_smx:INFO: List of broken channels: []
11:26:44:ST3_smx:INFO: Total # of broken channels: 0
11:26:44:ST3_smx:INFO: List of broken channels: []
11:26:46:ST3_smx:INFO: chip: 5-4 37.726682 C 1171.483840 mV
11:26:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:46:ST3_smx:INFO: Electrons
11:26:46:ST3_smx:INFO: # loops 0
11:26:47:ST3_smx:INFO: # loops 1
11:26:49:ST3_smx:INFO: # loops 2
11:26:51:ST3_smx:INFO: Total # of broken channels: 0
11:26:51:ST3_smx:INFO: List of broken channels: []
11:26:51:ST3_smx:INFO: Total # of broken channels: 0
11:26:51:ST3_smx:INFO: List of broken channels: []
11:26:53:ST3_smx:INFO: chip: 12-5 40.898880 C 1177.390875 mV
11:26:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:26:53:ST3_smx:INFO: Electrons
11:26:53:ST3_smx:INFO: # loops 0
11:26:54:ST3_smx:INFO: # loops 1
11:26:56:ST3_smx:INFO: # loops 2
11:26:58:ST3_smx:INFO: Total # of broken channels: 0
11:26:58:ST3_smx:INFO: List of broken channels: []
11:26:58:ST3_smx:INFO: Total # of broken channels: 0
11:26:58:ST3_smx:INFO: List of broken channels: []
11:27:00:ST3_smx:INFO: chip: 7-6 18.745682 C 1247.887635 mV
11:27:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:00:ST3_smx:INFO: Electrons
11:27:00:ST3_smx:INFO: # loops 0
11:27:02:ST3_smx:INFO: # loops 1
11:27:03:ST3_smx:INFO: # loops 2
11:27:05:ST3_smx:INFO: Total # of broken channels: 0
11:27:05:ST3_smx:INFO: List of broken channels: []
11:27:05:ST3_smx:INFO: Total # of broken channels: 0
11:27:05:ST3_smx:INFO: List of broken channels: []
11:27:06:ST3_smx:INFO: chip: 14-7 44.073563 C 1165.571835 mV
11:27:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:27:06:ST3_smx:INFO: Electrons
11:27:06:ST3_smx:INFO: # loops 0
11:27:08:ST3_smx:INFO: # loops 1
11:27:09:ST3_smx:INFO: # loops 2
11:27:11:ST3_smx:INFO: Total # of broken channels: 0
11:27:11:ST3_smx:INFO: List of broken channels: []
11:27:11:ST3_smx:INFO: Total # of broken channels: 0
11:27:11:ST3_smx:INFO: List of broken channels: []
11:27:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:27:12:febtest:INFO: 01-00 | XA-000-09-004-017-008-022-08 | 50.4 | 1159.7
11:27:12:febtest:INFO: 08-01 | XA-000-09-004-017-014-021-13 | 34.6 | 1218.6
11:27:12:febtest:INFO: 03-02 | XA-000-09-004-017-005-021-15 | 47.3 | 1177.4
11:27:12:febtest:INFO: 10-03 | XA-000-09-004-017-011-021-06 | 47.3 | 1189.2
11:27:12:febtest:INFO: 05-04 | XA-000-09-004-017-017-020-05 | 40.9 | 1195.1
11:27:13:febtest:INFO: 12-05 | XA-000-09-004-017-016-015-15 | 44.1 | 1201.0
11:27:13:febtest:INFO: 07-06 | XA-000-09-004-017-017-021-05 | 18.7 | 1265.4
11:27:13:febtest:INFO: 14-07 | XA-000-09-004-017-010-015-12 | 47.3 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_23-11_25_49
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3354| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5960', '1.850', '2.4800', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0450', '1.850', '2.4110', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9830', '1.850', '0.5285', '0.000', '0.0000', '0.000', '0.0000']