13:33:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:33:13:ST3_Shared:INFO:	                         FEB-Sensor                         
13:33:13:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:33:38:ST3_ModuleSelector:INFO:	L1DR000051 M1DR0T1000511B2 42 A

13:33:38:ST3_ModuleSelector:INFO:	25142

13:33:38:febtest:INFO:	Testing FEB with SN 3367
13:33:39:smx_tester:INFO:	Scanning setup
13:33:39:elinks:INFO:	Disabling clock on downlink 0
13:33:39:elinks:INFO:	Disabling clock on downlink 1
13:33:39:elinks:INFO:	Disabling clock on downlink 2
13:33:39:elinks:INFO:	Disabling clock on downlink 3
13:33:39:elinks:INFO:	Disabling clock on downlink 4
13:33:39:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:39:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:33:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:40:elinks:INFO:	Disabling clock on downlink 0
13:33:40:elinks:INFO:	Disabling clock on downlink 1
13:33:40:elinks:INFO:	Disabling clock on downlink 2
13:33:40:elinks:INFO:	Disabling clock on downlink 3
13:33:40:elinks:INFO:	Disabling clock on downlink 4
13:33:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
13:33:40:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
13:33:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:40:elinks:INFO:	Disabling clock on downlink 0
13:33:40:elinks:INFO:	Disabling clock on downlink 1
13:33:40:elinks:INFO:	Disabling clock on downlink 2
13:33:40:elinks:INFO:	Disabling clock on downlink 3
13:33:40:elinks:INFO:	Disabling clock on downlink 4
13:33:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:33:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:40:elinks:INFO:	Disabling clock on downlink 0
13:33:40:elinks:INFO:	Disabling clock on downlink 1
13:33:40:elinks:INFO:	Disabling clock on downlink 2
13:33:40:elinks:INFO:	Disabling clock on downlink 3
13:33:40:elinks:INFO:	Disabling clock on downlink 4
13:33:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:33:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:40:elinks:INFO:	Disabling clock on downlink 0
13:33:40:elinks:INFO:	Disabling clock on downlink 1
13:33:40:elinks:INFO:	Disabling clock on downlink 2
13:33:40:elinks:INFO:	Disabling clock on downlink 3
13:33:40:elinks:INFO:	Disabling clock on downlink 4
13:33:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:33:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:33:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:33:40:setup_element:INFO:	Scanning clock phase
13:33:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:33:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:33:40:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
13:33:40:setup_element:INFO:	Eye window for uplink 0 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:33:40:setup_element:INFO:	Eye window for uplink 1 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:33:40:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:33:40:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:33:40:setup_element:INFO:	Eye window for uplink 4 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:33:40:setup_element:INFO:	Eye window for uplink 5 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:33:40:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:33:40:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:33:41:setup_element:INFO:	Eye window for uplink 8 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:33:41:setup_element:INFO:	Eye window for uplink 9 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
13:33:41:setup_element:INFO:	Eye window for uplink 10: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:33:41:setup_element:INFO:	Eye window for uplink 11: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
13:33:41:setup_element:INFO:	Eye window for uplink 12: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:33:41:setup_element:INFO:	Eye window for uplink 13: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
13:33:41:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:33:41:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:33:41:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 1
13:33:41:setup_element:INFO:	Scanning data phases
13:33:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:33:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:33:46:setup_element:INFO:	Data phase scan results for group 0, downlink 1
13:33:46:setup_element:INFO:	Eye window for uplink 0 : _________XXXXXXX________________________
Data delay found: 32
13:33:46:setup_element:INFO:	Eye window for uplink 1 : ________XXXXX___________________________
Data delay found: 30
13:33:46:setup_element:INFO:	Eye window for uplink 2 : _____XXXXXX_____________________________
Data delay found: 27
13:33:46:setup_element:INFO:	Eye window for uplink 3 : _____XXXXXX_____________________________
Data delay found: 27
13:33:46:setup_element:INFO:	Eye window for uplink 4 : ____XXXX________________________________
Data delay found: 25
13:33:46:setup_element:INFO:	Eye window for uplink 5 : __XXXXXX________________________________
Data delay found: 24
13:33:46:setup_element:INFO:	Eye window for uplink 6 : XXX_______________________________X_XXXX
Data delay found: 18
13:33:46:setup_element:INFO:	Eye window for uplink 7 : XX_______________________________XXXXXXX
Data delay found: 17
13:33:46:setup_element:INFO:	Eye window for uplink 8 : _________________________XXXXXX_________
Data delay found: 7
13:33:46:setup_element:INFO:	Eye window for uplink 9 : ____________________________XXXXXX______
Data delay found: 10
13:33:46:setup_element:INFO:	Eye window for uplink 10: _______________________________XXXXXXX__
Data delay found: 14
13:33:46:setup_element:INFO:	Eye window for uplink 11: ________________________________XXXXXXXX
Data delay found: 15
13:33:46:setup_element:INFO:	Eye window for uplink 12: ______________________________XXXXXX____
Data delay found: 12
13:33:46:setup_element:INFO:	Eye window for uplink 13: _______________________________XXXXX____
Data delay found: 13
13:33:46:setup_element:INFO:	Eye window for uplink 14: _______________________________XXXXXX___
Data delay found: 13
13:33:46:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXXXX__
Data delay found: 14
13:33:46:setup_element:INFO:	Setting the data phase to 32 for uplink 0
13:33:46:setup_element:INFO:	Setting the data phase to 30 for uplink 1
13:33:46:setup_element:INFO:	Setting the data phase to 27 for uplink 2
13:33:46:setup_element:INFO:	Setting the data phase to 27 for uplink 3
13:33:46:setup_element:INFO:	Setting the data phase to 25 for uplink 4
13:33:46:setup_element:INFO:	Setting the data phase to 24 for uplink 5
13:33:46:setup_element:INFO:	Setting the data phase to 18 for uplink 6
13:33:46:setup_element:INFO:	Setting the data phase to 17 for uplink 7
13:33:46:setup_element:INFO:	Setting the data phase to 7 for uplink 8
13:33:46:setup_element:INFO:	Setting the data phase to 10 for uplink 9
13:33:46:setup_element:INFO:	Setting the data phase to 14 for uplink 10
13:33:46:setup_element:INFO:	Setting the data phase to 15 for uplink 11
13:33:46:setup_element:INFO:	Setting the data phase to 12 for uplink 12
13:33:46:setup_element:INFO:	Setting the data phase to 13 for uplink 13
13:33:46:setup_element:INFO:	Setting the data phase to 13 for uplink 14
13:33:46:setup_element:INFO:	Setting the data phase to 14 for uplink 15
13:33:46:setup_element:INFO:	Beginning SMX ASICs map scan
13:33:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:33:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:33:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:33:46:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:33:46:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
13:33:46:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
13:33:46:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
13:33:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
13:33:46:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
13:33:46:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
13:33:46:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
13:33:46:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
13:33:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
13:33:47:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
13:33:47:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
13:33:47:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
13:33:47:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
13:33:47:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
13:33:47:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
13:33:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
13:33:47:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
13:33:49:setup_element:INFO:	Performing Elink synchronization
13:33:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:33:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
13:33:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
13:33:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
13:33:49:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
13:33:49:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
13:33:49:febtest:INFO:	Init all SMX (CSA): 30
13:34:06:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:34:06:febtest:INFO:	01-00 | XA-000-09-004-029-005-012-12 |  40.9 | 1159.7
13:34:06:febtest:INFO:	08-01 | XA-000-09-004-029-017-012-06 |  37.7 | 1165.6
13:34:07:febtest:INFO:	03-02 | XA-000-09-004-029-008-012-11 |  40.9 | 1153.7
13:34:07:febtest:INFO:	10-03 | XA-000-09-004-029-017-011-06 |  47.3 | 1141.9
13:34:07:febtest:INFO:	05-04 | XA-000-09-004-029-011-012-05 |  40.9 | 1159.7
13:34:07:febtest:INFO:	12-05 | XA-000-09-004-029-014-011-14 |  37.7 | 1165.6
13:34:07:febtest:INFO:	07-06 | XA-000-09-004-029-014-012-14 |  40.9 | 1165.6
13:34:08:febtest:INFO:	14-07 | XA-000-09-004-029-002-011-04 |  37.7 | 1183.3
13:34:09:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
13:34:11:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1177.390875 mV
13:34:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:11:ST3_smx:INFO:		Electrons
13:34:11:ST3_smx:INFO:	# loops 0
13:34:13:ST3_smx:INFO:	# loops 1
13:34:14:ST3_smx:INFO:	# loops 2
13:34:16:ST3_smx:INFO:	Total # of broken channels: 0
13:34:16:ST3_smx:INFO:	List of broken channels: []
13:34:16:ST3_smx:INFO:	Total # of broken channels: 1
13:34:16:ST3_smx:INFO:	List of broken channels: [41]
13:34:18:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1183.292940 mV
13:34:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:18:ST3_smx:INFO:		Electrons
13:34:18:ST3_smx:INFO:	# loops 0
13:34:20:ST3_smx:INFO:	# loops 1
13:34:23:ST3_smx:INFO:	# loops 2
13:34:25:ST3_smx:INFO:	Total # of broken channels: 0
13:34:25:ST3_smx:INFO:	List of broken channels: []
13:34:25:ST3_smx:INFO:	Total # of broken channels: 1
13:34:25:ST3_smx:INFO:	List of broken channels: [92]
13:34:26:ST3_smx:INFO:	chip: 3-2 	 40.898880 C 	 1171.483840 mV
13:34:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:26:ST3_smx:INFO:		Electrons
13:34:26:ST3_smx:INFO:	# loops 0
13:34:28:ST3_smx:INFO:	# loops 1
13:34:30:ST3_smx:INFO:	# loops 2
13:34:32:ST3_smx:INFO:	Total # of broken channels: 0
13:34:32:ST3_smx:INFO:	List of broken channels: []
13:34:32:ST3_smx:INFO:	Total # of broken channels: 1
13:34:32:ST3_smx:INFO:	List of broken channels: [28]
13:34:34:ST3_smx:INFO:	chip: 10-3 	 47.250730 C 	 1165.571835 mV
13:34:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:34:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:34:ST3_smx:INFO:		Electrons
13:34:34:ST3_smx:INFO:	# loops 0
13:34:36:ST3_smx:INFO:	# loops 1
13:34:37:ST3_smx:INFO:	# loops 2
13:34:39:ST3_smx:INFO:	Total # of broken channels: 0
13:34:39:ST3_smx:INFO:	List of broken channels: []
13:34:39:ST3_smx:INFO:	Total # of broken channels: 0
13:34:39:ST3_smx:INFO:	List of broken channels: []
13:34:40:ST3_smx:INFO:	chip: 5-4 	 40.898880 C 	 1171.483840 mV
13:34:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:41:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:41:ST3_smx:INFO:		Electrons
13:34:41:ST3_smx:INFO:	# loops 0
13:34:42:ST3_smx:INFO:	# loops 1
13:34:44:ST3_smx:INFO:	# loops 2
13:34:45:ST3_smx:INFO:	Total # of broken channels: 0
13:34:45:ST3_smx:INFO:	List of broken channels: []
13:34:45:ST3_smx:INFO:	Total # of broken channels: 0
13:34:45:ST3_smx:INFO:	List of broken channels: []
13:34:47:ST3_smx:INFO:	chip: 12-5 	 40.898880 C 	 1177.390875 mV
13:34:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:47:ST3_smx:INFO:		Electrons
13:34:47:ST3_smx:INFO:	# loops 0
13:34:49:ST3_smx:INFO:	# loops 1
13:34:50:ST3_smx:INFO:	# loops 2
13:34:52:ST3_smx:INFO:	Total # of broken channels: 0
13:34:52:ST3_smx:INFO:	List of broken channels: []
13:34:52:ST3_smx:INFO:	Total # of broken channels: 0
13:34:52:ST3_smx:INFO:	List of broken channels: []
13:34:54:ST3_smx:INFO:	chip: 7-6 	 44.073563 C 	 1177.390875 mV
13:34:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:54:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:34:54:ST3_smx:INFO:		Electrons
13:34:54:ST3_smx:INFO:	# loops 0
13:34:56:ST3_smx:INFO:	# loops 1
13:34:57:ST3_smx:INFO:	# loops 2
13:34:59:ST3_smx:INFO:	Total # of broken channels: 0
13:34:59:ST3_smx:INFO:	List of broken channels: []
13:34:59:ST3_smx:INFO:	Total # of broken channels: 0
13:34:59:ST3_smx:INFO:	List of broken channels: []
13:35:00:ST3_smx:INFO:	chip: 14-7 	 37.726682 C 	 1195.082160 mV
13:35:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:35:00:ST3_smx:INFO:		Electrons
13:35:00:ST3_smx:INFO:	# loops 0
13:35:02:ST3_smx:INFO:	# loops 1
13:35:04:ST3_smx:INFO:	# loops 2
13:35:05:ST3_smx:INFO:	Total # of broken channels: 0
13:35:05:ST3_smx:INFO:	List of broken channels: []
13:35:05:ST3_smx:INFO:	Total # of broken channels: 0
13:35:05:ST3_smx:INFO:	List of broken channels: []
13:35:05:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:35:06:febtest:INFO:	01-00 | XA-000-09-004-029-005-012-12 |  40.9 | 1201.0
13:35:06:febtest:INFO:	08-01 | XA-000-09-004-029-017-012-06 |  40.9 | 1206.9
13:35:06:febtest:INFO:	03-02 | XA-000-09-004-029-008-012-11 |  44.1 | 1189.2
13:35:06:febtest:INFO:	10-03 | XA-000-09-004-029-017-011-06 |  47.3 | 1212.7
13:35:06:febtest:INFO:	05-04 | XA-000-09-004-029-011-012-05 |  44.1 | 1195.1
13:35:07:febtest:INFO:	12-05 | XA-000-09-004-029-014-011-14 |  40.9 | 1201.0
13:35:07:febtest:INFO:	07-06 | XA-000-09-004-029-014-012-14 |  47.3 | 1201.0
13:35:07:febtest:INFO:	14-07 | XA-000-09-004-029-002-011-04 |  40.9 | 1212.7
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 26_03_25-13_33_13
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3367| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	25142

MODULE_NAME:	L1DR000051 M1DR0T1000511B2 42 A

MODULE_TYPE:	
MODULE_LADDER:	L1DR000051
MODULE_MODULE:	M1DR0T1000511B2
MODULE_SIZE:	42
MODULE_GRADE:	A
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9250', '1.850', '2.4590', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0140', '1.850', '2.4050', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9910', '1.850', '0.5257', '0.000', '0.0000', '0.000', '0.0000']