FEB_3368 11.03.26 07:45:23
Info
07:45:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:45:23:ST3_Shared:INFO: FEB-Microcable
07:45:23:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:45:23:febtest:INFO: Testing FEB with SN 3368
07:45:25:smx_tester:INFO: Scanning setup
07:45:25:elinks:INFO: Disabling clock on downlink 0
07:45:25:elinks:INFO: Disabling clock on downlink 1
07:45:25:elinks:INFO: Disabling clock on downlink 2
07:45:25:elinks:INFO: Disabling clock on downlink 3
07:45:25:elinks:INFO: Disabling clock on downlink 4
07:45:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:45:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:25:elinks:INFO: Disabling clock on downlink 0
07:45:25:elinks:INFO: Disabling clock on downlink 1
07:45:25:elinks:INFO: Disabling clock on downlink 2
07:45:25:elinks:INFO: Disabling clock on downlink 3
07:45:25:elinks:INFO: Disabling clock on downlink 4
07:45:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:45:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
07:45:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
07:45:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
07:45:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
07:45:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
07:45:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
07:45:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
07:45:25:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
07:45:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:25:elinks:INFO: Disabling clock on downlink 0
07:45:25:elinks:INFO: Disabling clock on downlink 1
07:45:25:elinks:INFO: Disabling clock on downlink 2
07:45:25:elinks:INFO: Disabling clock on downlink 3
07:45:25:elinks:INFO: Disabling clock on downlink 4
07:45:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:45:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:25:elinks:INFO: Disabling clock on downlink 0
07:45:25:elinks:INFO: Disabling clock on downlink 1
07:45:25:elinks:INFO: Disabling clock on downlink 2
07:45:25:elinks:INFO: Disabling clock on downlink 3
07:45:25:elinks:INFO: Disabling clock on downlink 4
07:45:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:45:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:25:elinks:INFO: Disabling clock on downlink 0
07:45:25:elinks:INFO: Disabling clock on downlink 1
07:45:25:elinks:INFO: Disabling clock on downlink 2
07:45:25:elinks:INFO: Disabling clock on downlink 3
07:45:25:elinks:INFO: Disabling clock on downlink 4
07:45:25:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:45:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:45:25:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:45:25:setup_element:INFO: Scanning clock phase
07:45:25:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:45:25:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:45:26:setup_element:INFO: Clock phase scan results for group 0, downlink 1
07:45:26:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:45:26:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:45:26:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:45:26:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
07:45:26:setup_element:INFO: Eye window for uplink 12: __________________________________________________________________________XXXXX_
Clock Delay: 36
07:45:26:setup_element:INFO: Eye window for uplink 13: __________________________________________________________________________XXXXX_
Clock Delay: 36
07:45:26:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:45:26:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXX__
Clock Delay: 35
07:45:26:setup_element:INFO: Setting the clock phase to 35 for group 0, downlink 1
07:45:26:setup_element:INFO: Scanning data phases
07:45:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:45:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:45:31:setup_element:INFO: Data phase scan results for group 0, downlink 1
07:45:31:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXXX___
Data delay found: 14
07:45:31:setup_element:INFO: Eye window for uplink 9 : X__________________________________XXXXX
Data delay found: 17
07:45:31:setup_element:INFO: Eye window for uplink 10: XX__________________________________XXXX
Data delay found: 18
07:45:31:setup_element:INFO: Eye window for uplink 11: XXX__________________________________XXX
Data delay found: 19
07:45:31:setup_element:INFO: Eye window for uplink 12: XX__________________________________XXXX
Data delay found: 18
07:45:31:setup_element:INFO: Eye window for uplink 13: XX___________________________________XXX
Data delay found: 19
07:45:31:setup_element:INFO: Eye window for uplink 14: ___________________________________XXXX_
Data delay found: 16
07:45:31:setup_element:INFO: Eye window for uplink 15: X___________________________________XXXX
Data delay found: 18
07:45:31:setup_element:INFO: Setting the data phase to 14 for uplink 8
07:45:31:setup_element:INFO: Setting the data phase to 17 for uplink 9
07:45:31:setup_element:INFO: Setting the data phase to 18 for uplink 10
07:45:31:setup_element:INFO: Setting the data phase to 19 for uplink 11
07:45:31:setup_element:INFO: Setting the data phase to 18 for uplink 12
07:45:31:setup_element:INFO: Setting the data phase to 19 for uplink 13
07:45:31:setup_element:INFO: Setting the data phase to 16 for uplink 14
07:45:31:setup_element:INFO: Setting the data phase to 18 for uplink 15
07:45:31:setup_element:INFO: Beginning SMX ASICs map scan
07:45:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:45:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:45:31:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:45:31:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:45:31:uplink:INFO: Setting uplinks mask [8, 9, 10, 11, 12, 13, 14, 15]
07:45:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
07:45:31:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
07:45:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
07:45:31:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
07:45:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
07:45:32:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
07:45:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
07:45:32:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
07:45:33:setup_element:INFO: Performing Elink synchronization
07:45:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:45:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
07:45:33:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
07:45:33:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
07:45:33:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
07:45:33:uplink:INFO: Enabling uplinks [8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
07:45:34:febtest:INFO: Init all SMX (CSA): 30
07:45:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:45:42:febtest:INFO: 08-01 | XA-000-09-004-017-003-013-13 | 34.6 | 1171.5
07:45:42:febtest:INFO: 10-03 | XA-000-09-004-017-003-014-13 | 40.9 | 1141.9
07:45:43:febtest:INFO: 12-05 | XA-000-09-004-017-006-008-06 | 37.7 | 1153.7
07:45:43:febtest:INFO: 14-07 | XA-000-09-004-017-009-008-02 | 25.1 | 1195.1
07:45:44:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
07:45:46:ST3_smx:INFO: chip: 8-1 31.389742 C 1183.292940 mV
07:45:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:46:ST3_smx:INFO: Electrons
07:45:46:ST3_smx:INFO: # loops 0
07:45:48:ST3_smx:INFO: # loops 1
07:45:49:ST3_smx:INFO: # loops 2
07:45:51:ST3_smx:INFO: Total # of broken channels: 0
07:45:51:ST3_smx:INFO: List of broken channels: []
07:45:51:ST3_smx:INFO: Total # of broken channels: 0
07:45:51:ST3_smx:INFO: List of broken channels: []
07:45:53:ST3_smx:INFO: chip: 10-3 40.898880 C 1153.732915 mV
07:45:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:45:53:ST3_smx:INFO: Electrons
07:45:53:ST3_smx:INFO: # loops 0
07:45:55:ST3_smx:INFO: # loops 1
07:45:57:ST3_smx:INFO: # loops 2
07:45:58:ST3_smx:INFO: Total # of broken channels: 0
07:45:58:ST3_smx:INFO: List of broken channels: []
07:45:58:ST3_smx:INFO: Total # of broken channels: 0
07:45:58:ST3_smx:INFO: List of broken channels: []
07:46:00:ST3_smx:INFO: chip: 12-5 40.898880 C 1165.571835 mV
07:46:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:00:ST3_smx:INFO: Electrons
07:46:00:ST3_smx:INFO: # loops 0
07:46:02:ST3_smx:INFO: # loops 1
07:46:04:ST3_smx:INFO: # loops 2
07:46:05:ST3_smx:INFO: Total # of broken channels: 0
07:46:05:ST3_smx:INFO: List of broken channels: []
07:46:05:ST3_smx:INFO: Total # of broken channels: 0
07:46:05:ST3_smx:INFO: List of broken channels: []
07:46:07:ST3_smx:INFO: chip: 14-7 28.225000 C 1206.851500 mV
07:46:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:07:ST3_smx:INFO: Electrons
07:46:07:ST3_smx:INFO: # loops 0
07:46:09:ST3_smx:INFO: # loops 1
07:46:11:ST3_smx:INFO: # loops 2
07:46:12:ST3_smx:INFO: Total # of broken channels: 0
07:46:12:ST3_smx:INFO: List of broken channels: []
07:46:12:ST3_smx:INFO: Total # of broken channels: 0
07:46:12:ST3_smx:INFO: List of broken channels: []
07:46:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:46:13:febtest:INFO: 08-01 | XA-000-09-004-017-003-013-13 | 31.4 | 1201.0
07:46:13:febtest:INFO: 10-03 | XA-000-09-004-017-003-014-13 | 44.1 | 1177.4
07:46:13:febtest:INFO: 12-05 | XA-000-09-004-017-006-008-06 | 40.9 | 1183.3
07:46:14:febtest:INFO: 14-07 | XA-000-09-004-017-009-008-02 | 31.4 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_11-07_45_23
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3368| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.451', '0.7355', '1.850', '1.3340', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '0.9860', '1.850', '1.0580', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '0.9873', '1.850', '0.2628', '0.000', '0.0000', '0.000', '0.0000']