Go Back
FEB_3368 12.03.26 14:24:15
Info
14:24:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:24:15:ST3_Shared:INFO: FEB-Microcable
14:24:15:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:24:15:febtest:INFO: Testing FEB with SN 3368
14:24:17:smx_tester:INFO: Scanning setup
14:24:17:elinks:INFO: Disabling clock on downlink 0
14:24:17:elinks:INFO: Disabling clock on downlink 1
14:24:17:elinks:INFO: Disabling clock on downlink 2
14:24:17:elinks:INFO: Disabling clock on downlink 3
14:24:17:elinks:INFO: Disabling clock on downlink 4
14:24:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:24:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:24:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:24:17:elinks:INFO: Disabling clock on downlink 0
14:24:17:elinks:INFO: Disabling clock on downlink 1
14:24:17:elinks:INFO: Disabling clock on downlink 2
14:24:17:elinks:INFO: Disabling clock on downlink 3
14:24:17:elinks:INFO: Disabling clock on downlink 4
14:24:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:24:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:24:17:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:24:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:24:17:elinks:INFO: Disabling clock on downlink 0
14:24:17:elinks:INFO: Disabling clock on downlink 1
14:24:17:elinks:INFO: Disabling clock on downlink 2
14:24:17:elinks:INFO: Disabling clock on downlink 3
14:24:17:elinks:INFO: Disabling clock on downlink 4
14:24:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:24:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:24:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:24:17:elinks:INFO: Disabling clock on downlink 0
14:24:17:elinks:INFO: Disabling clock on downlink 1
14:24:17:elinks:INFO: Disabling clock on downlink 2
14:24:17:elinks:INFO: Disabling clock on downlink 3
14:24:17:elinks:INFO: Disabling clock on downlink 4
14:24:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:24:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:24:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:24:17:elinks:INFO: Disabling clock on downlink 0
14:24:17:elinks:INFO: Disabling clock on downlink 1
14:24:17:elinks:INFO: Disabling clock on downlink 2
14:24:17:elinks:INFO: Disabling clock on downlink 3
14:24:17:elinks:INFO: Disabling clock on downlink 4
14:24:17:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:24:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:24:17:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:24:17:setup_element:INFO: Scanning clock phase
14:24:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:24:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:24:18:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:24:18:setup_element:INFO: Eye window for uplink 0 : ___________________________________________________________________________XXXXX
Clock Delay: 37
14:24:18:setup_element:INFO: Eye window for uplink 1 : ___________________________________________________________________________XXXXX
Clock Delay: 37
14:24:18:setup_element:INFO: Eye window for uplink 2 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 3 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXX__
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 10: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 11: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 14: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Eye window for uplink 15: _________________________________________________________________________XXXXXX_
Clock Delay: 35
14:24:18:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
14:24:18:setup_element:INFO: Scanning data phases
14:24:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:24:18:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:24:23:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:24:23:setup_element:INFO: Eye window for uplink 0 : ____________XXXXX_______________________
Data delay found: 34
14:24:23:setup_element:INFO: Eye window for uplink 1 : __________XXXXX_________________________
Data delay found: 32
14:24:23:setup_element:INFO: Eye window for uplink 2 : ________XXXXX___________________________
Data delay found: 30
14:24:23:setup_element:INFO: Eye window for uplink 3 : ________XXXX____________________________
Data delay found: 29
14:24:23:setup_element:INFO: Eye window for uplink 4 : ____XXXXX_______________________________
Data delay found: 26
14:24:23:setup_element:INFO: Eye window for uplink 5 : ___XXXXX________________________________
Data delay found: 25
14:24:23:setup_element:INFO: Eye window for uplink 6 : XXXX___________________________________X
Data delay found: 21
14:24:23:setup_element:INFO: Eye window for uplink 7 : XX___________________________________XXX
Data delay found: 19
14:24:23:setup_element:INFO: Eye window for uplink 8 : ___________________________XXXXXX_______
Data delay found: 9
14:24:23:setup_element:INFO: Eye window for uplink 9 : ______________________________XXXXXX____
Data delay found: 12
14:24:23:setup_element:INFO: Eye window for uplink 10: _______________________________XXXXXX___
Data delay found: 13
14:24:23:setup_element:INFO: Eye window for uplink 11: ________________________________XXXXXX__
Data delay found: 14
14:24:23:setup_element:INFO: Eye window for uplink 12: ________________________________XXXX____
Data delay found: 13
14:24:23:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
14:24:23:setup_element:INFO: Eye window for uplink 14: _______________________________XXXX_____
Data delay found: 12
14:24:23:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXX____
Data delay found: 13
14:24:23:setup_element:INFO: Setting the data phase to 34 for uplink 0
14:24:23:setup_element:INFO: Setting the data phase to 32 for uplink 1
14:24:23:setup_element:INFO: Setting the data phase to 30 for uplink 2
14:24:23:setup_element:INFO: Setting the data phase to 29 for uplink 3
14:24:23:setup_element:INFO: Setting the data phase to 26 for uplink 4
14:24:23:setup_element:INFO: Setting the data phase to 25 for uplink 5
14:24:23:setup_element:INFO: Setting the data phase to 21 for uplink 6
14:24:23:setup_element:INFO: Setting the data phase to 19 for uplink 7
14:24:23:setup_element:INFO: Setting the data phase to 9 for uplink 8
14:24:23:setup_element:INFO: Setting the data phase to 12 for uplink 9
14:24:23:setup_element:INFO: Setting the data phase to 13 for uplink 10
14:24:23:setup_element:INFO: Setting the data phase to 14 for uplink 11
14:24:23:setup_element:INFO: Setting the data phase to 13 for uplink 12
14:24:23:setup_element:INFO: Setting the data phase to 13 for uplink 13
14:24:23:setup_element:INFO: Setting the data phase to 12 for uplink 14
14:24:23:setup_element:INFO: Setting the data phase to 13 for uplink 15
14:24:23:setup_element:INFO: Beginning SMX ASICs map scan
14:24:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:24:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:24:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:24:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:24:23:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:24:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:24:23:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:24:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:24:23:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:24:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:24:24:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:24:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:24:24:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:24:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:24:24:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:24:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:24:24:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:24:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:24:24:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:24:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:24:24:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:24:26:setup_element:INFO: Performing Elink synchronization
14:24:26:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:24:26:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:24:26:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:24:26:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:24:26:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:24:26:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:24:27:febtest:INFO: Init all SMX (CSA): 30
14:24:42:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:24:42:febtest:INFO: 01-00 | XA-000-09-004-017-009-014-02 | 50.4 | 1112.1
14:24:42:febtest:INFO: 08-01 | XA-000-09-004-017-003-013-13 | 40.9 | 1159.7
14:24:42:febtest:INFO: 03-02 | XA-000-09-004-017-006-014-06 | 25.1 | 1206.9
14:24:42:febtest:INFO: 10-03 | XA-000-09-004-017-003-014-13 | 50.4 | 1130.0
14:24:43:febtest:INFO: 05-04 | XA-000-09-004-017-012-013-09 | 44.1 | 1147.8
14:24:43:febtest:INFO: 12-05 | XA-000-09-004-017-006-008-06 | 44.1 | 1147.8
14:24:43:febtest:INFO: 07-06 | XA-000-09-004-017-009-013-02 | 44.1 | 1153.7
14:24:43:febtest:INFO: 14-07 | XA-000-09-004-017-009-008-02 | 34.6 | 1183.3
14:24:44:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:24:46:ST3_smx:INFO: chip: 1-0 50.430383 C 1129.995435 mV
14:24:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:46:ST3_smx:INFO: Electrons
14:24:46:ST3_smx:INFO: # loops 0
14:24:48:ST3_smx:INFO: # loops 1
14:24:49:ST3_smx:INFO: # loops 2
14:24:51:ST3_smx:INFO: Total # of broken channels: 0
14:24:51:ST3_smx:INFO: List of broken channels: []
14:24:51:ST3_smx:INFO: Total # of broken channels: 0
14:24:51:ST3_smx:INFO: List of broken channels: []
14:24:53:ST3_smx:INFO: chip: 8-1 40.898880 C 1177.390875 mV
14:24:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:53:ST3_smx:INFO: Electrons
14:24:53:ST3_smx:INFO: # loops 0
14:24:54:ST3_smx:INFO: # loops 1
14:24:56:ST3_smx:INFO: # loops 2
14:24:57:ST3_smx:INFO: Total # of broken channels: 0
14:24:57:ST3_smx:INFO: List of broken channels: []
14:24:57:ST3_smx:INFO: Total # of broken channels: 0
14:24:57:ST3_smx:INFO: List of broken channels: []
14:24:59:ST3_smx:INFO: chip: 3-2 28.225000 C 1224.468235 mV
14:24:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:59:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:24:59:ST3_smx:INFO: Electrons
14:24:59:ST3_smx:INFO: # loops 0
14:25:00:ST3_smx:INFO: # loops 1
14:25:02:ST3_smx:INFO: # loops 2
14:25:03:ST3_smx:INFO: Total # of broken channels: 0
14:25:03:ST3_smx:INFO: List of broken channels: []
14:25:03:ST3_smx:INFO: Total # of broken channels: 0
14:25:03:ST3_smx:INFO: List of broken channels: []
14:25:05:ST3_smx:INFO: chip: 10-3 50.430383 C 1147.806000 mV
14:25:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:05:ST3_smx:INFO: Electrons
14:25:05:ST3_smx:INFO: # loops 0
14:25:07:ST3_smx:INFO: # loops 1
14:25:09:ST3_smx:INFO: # loops 2
14:25:10:ST3_smx:INFO: Total # of broken channels: 0
14:25:10:ST3_smx:INFO: List of broken channels: []
14:25:10:ST3_smx:INFO: Total # of broken channels: 0
14:25:10:ST3_smx:INFO: List of broken channels: []
14:25:12:ST3_smx:INFO: chip: 5-4 47.250730 C 1165.571835 mV
14:25:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:12:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:12:ST3_smx:INFO: Electrons
14:25:12:ST3_smx:INFO: # loops 0
14:25:14:ST3_smx:INFO: # loops 1
14:25:15:ST3_smx:INFO: # loops 2
14:25:17:ST3_smx:INFO: Total # of broken channels: 0
14:25:17:ST3_smx:INFO: List of broken channels: []
14:25:17:ST3_smx:INFO: Total # of broken channels: 0
14:25:17:ST3_smx:INFO: List of broken channels: []
14:25:18:ST3_smx:INFO: chip: 12-5 47.250730 C 1165.571835 mV
14:25:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:18:ST3_smx:INFO: Electrons
14:25:18:ST3_smx:INFO: # loops 0
14:25:20:ST3_smx:INFO: # loops 1
14:25:22:ST3_smx:INFO: # loops 2
14:25:23:ST3_smx:INFO: Total # of broken channels: 0
14:25:23:ST3_smx:INFO: List of broken channels: []
14:25:23:ST3_smx:INFO: Total # of broken channels: 0
14:25:23:ST3_smx:INFO: List of broken channels: []
14:25:25:ST3_smx:INFO: chip: 7-6 44.073563 C 1159.654860 mV
14:25:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:25:ST3_smx:INFO: Electrons
14:25:25:ST3_smx:INFO: # loops 0
14:25:26:ST3_smx:INFO: # loops 1
14:25:28:ST3_smx:INFO: # loops 2
14:25:30:ST3_smx:INFO: Total # of broken channels: 0
14:25:30:ST3_smx:INFO: List of broken channels: []
14:25:30:ST3_smx:INFO: Total # of broken channels: 0
14:25:30:ST3_smx:INFO: List of broken channels: []
14:25:31:ST3_smx:INFO: chip: 14-7 37.726682 C 1200.969315 mV
14:25:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:25:31:ST3_smx:INFO: Electrons
14:25:31:ST3_smx:INFO: # loops 0
14:25:33:ST3_smx:INFO: # loops 1
14:25:35:ST3_smx:INFO: # loops 2
14:25:36:ST3_smx:INFO: Total # of broken channels: 0
14:25:36:ST3_smx:INFO: List of broken channels: []
14:25:36:ST3_smx:INFO: Total # of broken channels: 0
14:25:36:ST3_smx:INFO: List of broken channels: []
14:25:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:25:37:febtest:INFO: 01-00 | XA-000-09-004-017-009-014-02 | 53.6 | 1147.8
14:25:37:febtest:INFO: 08-01 | XA-000-09-004-017-003-013-13 | 44.1 | 1201.0
14:25:37:febtest:INFO: 03-02 | XA-000-09-004-017-006-014-06 | 28.2 | 1242.0
14:25:37:febtest:INFO: 10-03 | XA-000-09-004-017-003-014-13 | 53.6 | 1171.5
14:25:37:febtest:INFO: 05-04 | XA-000-09-004-017-012-013-09 | 47.3 | 1195.1
14:25:38:febtest:INFO: 12-05 | XA-000-09-004-017-006-008-06 | 50.4 | 1183.3
14:25:38:febtest:INFO: 07-06 | XA-000-09-004-017-009-013-02 | 47.3 | 1183.3
14:25:38:febtest:INFO: 14-07 | XA-000-09-004-017-009-008-02 | 37.7 | 1218.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_12-14_24_15
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3368| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5440', '1.850', '2.5850', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9870', '1.849', '2.4580', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9820', '1.850', '0.5291', '0.000', '0.0000', '0.000', '0.0000']