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FEB_3377 24.03.26 15:27:38
Info
15:27:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:27:38:ST3_Shared:INFO: FEB-Microcable
15:27:38:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:27:38:febtest:INFO: Testing FEB with SN 3377
15:27:40:smx_tester:INFO: Scanning setup
15:27:40:elinks:INFO: Disabling clock on downlink 0
15:27:40:elinks:INFO: Disabling clock on downlink 1
15:27:40:elinks:INFO: Disabling clock on downlink 2
15:27:40:elinks:INFO: Disabling clock on downlink 3
15:27:40:elinks:INFO: Disabling clock on downlink 4
15:27:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:27:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:27:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:27:40:elinks:INFO: Disabling clock on downlink 0
15:27:40:elinks:INFO: Disabling clock on downlink 1
15:27:40:elinks:INFO: Disabling clock on downlink 2
15:27:40:elinks:INFO: Disabling clock on downlink 3
15:27:40:elinks:INFO: Disabling clock on downlink 4
15:27:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:27:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:27:40:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:27:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:27:40:elinks:INFO: Disabling clock on downlink 0
15:27:40:elinks:INFO: Disabling clock on downlink 1
15:27:40:elinks:INFO: Disabling clock on downlink 2
15:27:40:elinks:INFO: Disabling clock on downlink 3
15:27:40:elinks:INFO: Disabling clock on downlink 4
15:27:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:27:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:27:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:27:40:elinks:INFO: Disabling clock on downlink 0
15:27:40:elinks:INFO: Disabling clock on downlink 1
15:27:40:elinks:INFO: Disabling clock on downlink 2
15:27:40:elinks:INFO: Disabling clock on downlink 3
15:27:40:elinks:INFO: Disabling clock on downlink 4
15:27:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:27:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:27:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:27:40:elinks:INFO: Disabling clock on downlink 0
15:27:40:elinks:INFO: Disabling clock on downlink 1
15:27:40:elinks:INFO: Disabling clock on downlink 2
15:27:40:elinks:INFO: Disabling clock on downlink 3
15:27:40:elinks:INFO: Disabling clock on downlink 4
15:27:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:27:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:27:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:27:40:setup_element:INFO: Scanning clock phase
15:27:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:27:40:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:27:41:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:27:41:setup_element:INFO: Eye window for uplink 0 : X__________________________________________________________________________XXXXX
Clock Delay: 37
15:27:41:setup_element:INFO: Eye window for uplink 1 : X__________________________________________________________________________XXXXX
Clock Delay: 37
15:27:41:setup_element:INFO: Eye window for uplink 2 : __________________________________________________________________________XXXXX_
Clock Delay: 36
15:27:41:setup_element:INFO: Eye window for uplink 3 : __________________________________________________________________________XXXXX_
Clock Delay: 36
15:27:41:setup_element:INFO: Eye window for uplink 4 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:27:41:setup_element:INFO: Eye window for uplink 5 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:27:41:setup_element:INFO: Eye window for uplink 6 : __________________________________________________________________________XXXXXX
Clock Delay: 36
15:27:41:setup_element:INFO: Eye window for uplink 7 : __________________________________________________________________________XXXXXX
Clock Delay: 36
15:27:41:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:27:41:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:27:41:setup_element:INFO: Eye window for uplink 10: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:27:41:setup_element:INFO: Eye window for uplink 11: __________________________________________________________________________XXXXX_
Clock Delay: 36
15:27:41:setup_element:INFO: Eye window for uplink 12: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:27:41:setup_element:INFO: Eye window for uplink 13: _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:27:41:setup_element:INFO: Eye window for uplink 14: __________________________________________________________________________XXXXXX
Clock Delay: 36
15:27:41:setup_element:INFO: Eye window for uplink 15: __________________________________________________________________________XXXXXX
Clock Delay: 36
15:27:41:setup_element:INFO: Setting the clock phase to 36 for group 0, downlink 1
15:27:41:setup_element:INFO: Scanning data phases
15:27:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:27:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:27:46:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:27:46:setup_element:INFO: Eye window for uplink 0 : ________________XXXXX___________________
Data delay found: 38
15:27:46:setup_element:INFO: Eye window for uplink 1 : _____________XXXX_______________________
Data delay found: 34
15:27:46:setup_element:INFO: Eye window for uplink 2 : _______XXXXXX___________________________
Data delay found: 29
15:27:46:setup_element:INFO: Eye window for uplink 3 : _______XXXXX____________________________
Data delay found: 29
15:27:46:setup_element:INFO: Eye window for uplink 4 : ________XXXX____________________________
Data delay found: 29
15:27:46:setup_element:INFO: Eye window for uplink 5 : _______XXXX_____________________________
Data delay found: 28
15:27:46:setup_element:INFO: Eye window for uplink 6 : ___XXXX_________________________________
Data delay found: 24
15:27:46:setup_element:INFO: Eye window for uplink 7 : _XXXXX__________________________________
Data delay found: 23
15:27:46:setup_element:INFO: Eye window for uplink 8 : __________________________XXXXXX________
Data delay found: 8
15:27:46:setup_element:INFO: Eye window for uplink 9 : ____________________________XXXXXX______
Data delay found: 10
15:27:46:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXX__
Data delay found: 15
15:27:46:setup_element:INFO: Eye window for uplink 11: __________________________________XXXXX_
Data delay found: 16
15:27:46:setup_element:INFO: Eye window for uplink 12: _______________________________XXXXX____
Data delay found: 13
15:27:46:setup_element:INFO: Eye window for uplink 13: ________________________________XXXX____
Data delay found: 13
15:27:46:setup_element:INFO: Eye window for uplink 14: _________________________________XXXX___
Data delay found: 14
15:27:46:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXX__
Data delay found: 15
15:27:46:setup_element:INFO: Setting the data phase to 38 for uplink 0
15:27:46:setup_element:INFO: Setting the data phase to 34 for uplink 1
15:27:46:setup_element:INFO: Setting the data phase to 29 for uplink 2
15:27:46:setup_element:INFO: Setting the data phase to 29 for uplink 3
15:27:46:setup_element:INFO: Setting the data phase to 29 for uplink 4
15:27:46:setup_element:INFO: Setting the data phase to 28 for uplink 5
15:27:46:setup_element:INFO: Setting the data phase to 24 for uplink 6
15:27:46:setup_element:INFO: Setting the data phase to 23 for uplink 7
15:27:46:setup_element:INFO: Setting the data phase to 8 for uplink 8
15:27:46:setup_element:INFO: Setting the data phase to 10 for uplink 9
15:27:46:setup_element:INFO: Setting the data phase to 15 for uplink 10
15:27:46:setup_element:INFO: Setting the data phase to 16 for uplink 11
15:27:46:setup_element:INFO: Setting the data phase to 13 for uplink 12
15:27:46:setup_element:INFO: Setting the data phase to 13 for uplink 13
15:27:46:setup_element:INFO: Setting the data phase to 14 for uplink 14
15:27:46:setup_element:INFO: Setting the data phase to 15 for uplink 15
15:27:46:setup_element:INFO: Beginning SMX ASICs map scan
15:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:27:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:27:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:27:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:27:46:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:27:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:27:46:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:27:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:27:46:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:27:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:27:46:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:27:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:27:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:27:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:27:47:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:27:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:27:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:27:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:27:47:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:27:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:27:47:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:27:49:setup_element:INFO: Performing Elink synchronization
15:27:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:27:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:27:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:27:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:27:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:27:49:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:27:49:febtest:INFO: Init all SMX (CSA): 30
15:28:05:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:28:05:febtest:INFO: 01-00 | XA-000-09-004-017-006-004-06 | 31.4 | 1183.3
15:28:05:febtest:INFO: 08-01 | XA-000-09-004-017-008-027-08 | 44.1 | 1159.7
15:28:05:febtest:INFO: 03-02 | XA-000-09-004-017-009-003-02 | 44.1 | 1141.9
15:28:05:febtest:INFO: 10-03 | XA-000-09-004-017-009-002-02 | 47.3 | 1147.8
15:28:06:febtest:INFO: 05-04 | XA-000-09-004-017-011-026-06 | 34.6 | 1183.3
15:28:06:febtest:INFO: 12-05 | XA-000-09-004-017-005-013-08 | 47.3 | 1153.7
15:28:06:febtest:INFO: 07-06 | XA-000-09-004-017-014-026-13 | 47.3 | 1135.9
15:28:06:febtest:INFO: 14-07 | XA-000-09-004-017-002-013-00 | 34.6 | 1195.1
15:28:07:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:28:09:ST3_smx:INFO: chip: 1-0 31.389742 C 1195.082160 mV
15:28:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:09:ST3_smx:INFO: Electrons
15:28:09:ST3_smx:INFO: # loops 0
15:28:11:ST3_smx:INFO: # loops 1
15:28:13:ST3_smx:INFO: # loops 2
15:28:15:ST3_smx:INFO: Total # of broken channels: 0
15:28:15:ST3_smx:INFO: List of broken channels: []
15:28:15:ST3_smx:INFO: Total # of broken channels: 0
15:28:15:ST3_smx:INFO: List of broken channels: []
15:28:16:ST3_smx:INFO: chip: 8-1 44.073563 C 1177.390875 mV
15:28:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:16:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:16:ST3_smx:INFO: Electrons
15:28:16:ST3_smx:INFO: # loops 0
15:28:18:ST3_smx:INFO: # loops 1
15:28:20:ST3_smx:INFO: # loops 2
15:28:22:ST3_smx:INFO: Total # of broken channels: 0
15:28:22:ST3_smx:INFO: List of broken channels: []
15:28:22:ST3_smx:INFO: Total # of broken channels: 0
15:28:22:ST3_smx:INFO: List of broken channels: []
15:28:23:ST3_smx:INFO: chip: 3-2 44.073563 C 1159.654860 mV
15:28:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:23:ST3_smx:INFO: Electrons
15:28:23:ST3_smx:INFO: # loops 0
15:28:25:ST3_smx:INFO: # loops 1
15:28:26:ST3_smx:INFO: # loops 2
15:28:28:ST3_smx:INFO: Total # of broken channels: 0
15:28:28:ST3_smx:INFO: List of broken channels: []
15:28:28:ST3_smx:INFO: Total # of broken channels: 0
15:28:28:ST3_smx:INFO: List of broken channels: []
15:28:30:ST3_smx:INFO: chip: 10-3 50.430383 C 1159.654860 mV
15:28:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:30:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:30:ST3_smx:INFO: Electrons
15:28:30:ST3_smx:INFO: # loops 0
15:28:31:ST3_smx:INFO: # loops 1
15:28:33:ST3_smx:INFO: # loops 2
15:28:35:ST3_smx:INFO: Total # of broken channels: 0
15:28:35:ST3_smx:INFO: List of broken channels: []
15:28:35:ST3_smx:INFO: Total # of broken channels: 0
15:28:35:ST3_smx:INFO: List of broken channels: []
15:28:36:ST3_smx:INFO: chip: 5-4 37.726682 C 1195.082160 mV
15:28:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:36:ST3_smx:INFO: Electrons
15:28:36:ST3_smx:INFO: # loops 0
15:28:38:ST3_smx:INFO: # loops 1
15:28:40:ST3_smx:INFO: # loops 2
15:28:42:ST3_smx:INFO: Total # of broken channels: 0
15:28:42:ST3_smx:INFO: List of broken channels: []
15:28:42:ST3_smx:INFO: Total # of broken channels: 0
15:28:42:ST3_smx:INFO: List of broken channels: []
15:28:43:ST3_smx:INFO: chip: 12-5 47.250730 C 1165.571835 mV
15:28:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:43:ST3_smx:INFO: Electrons
15:28:43:ST3_smx:INFO: # loops 0
15:28:45:ST3_smx:INFO: # loops 1
15:28:47:ST3_smx:INFO: # loops 2
15:28:48:ST3_smx:INFO: Total # of broken channels: 0
15:28:48:ST3_smx:INFO: List of broken channels: []
15:28:48:ST3_smx:INFO: Total # of broken channels: 0
15:28:48:ST3_smx:INFO: List of broken channels: []
15:28:50:ST3_smx:INFO: chip: 7-6 47.250730 C 1147.806000 mV
15:28:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:50:ST3_smx:INFO: Electrons
15:28:50:ST3_smx:INFO: # loops 0
15:28:52:ST3_smx:INFO: # loops 1
15:28:53:ST3_smx:INFO: # loops 2
15:28:55:ST3_smx:INFO: Total # of broken channels: 0
15:28:55:ST3_smx:INFO: List of broken channels: []
15:28:55:ST3_smx:INFO: Total # of broken channels: 0
15:28:55:ST3_smx:INFO: List of broken channels: []
15:28:57:ST3_smx:INFO: chip: 14-7 37.726682 C 1206.851500 mV
15:28:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:28:57:ST3_smx:INFO: Electrons
15:28:57:ST3_smx:INFO: # loops 0
15:28:59:ST3_smx:INFO: # loops 1
15:29:00:ST3_smx:INFO: # loops 2
15:29:02:ST3_smx:INFO: Total # of broken channels: 0
15:29:02:ST3_smx:INFO: List of broken channels: []
15:29:02:ST3_smx:INFO: Total # of broken channels: 0
15:29:02:ST3_smx:INFO: List of broken channels: []
15:29:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:29:03:febtest:INFO: 01-00 | XA-000-09-004-017-006-004-06 | 34.6 | 1218.6
15:29:03:febtest:INFO: 08-01 | XA-000-09-004-017-008-027-08 | 44.1 | 1195.1
15:29:03:febtest:INFO: 03-02 | XA-000-09-004-017-009-003-02 | 44.1 | 1177.4
15:29:03:febtest:INFO: 10-03 | XA-000-09-004-017-009-002-02 | 50.4 | 1183.3
15:29:04:febtest:INFO: 05-04 | XA-000-09-004-017-011-026-06 | 40.9 | 1218.6
15:29:04:febtest:INFO: 12-05 | XA-000-09-004-017-005-013-08 | 50.4 | 1189.2
15:29:04:febtest:INFO: 07-06 | XA-000-09-004-017-014-026-13 | 50.4 | 1171.5
15:29:04:febtest:INFO: 14-07 | XA-000-09-004-017-002-013-00 | 40.9 | 1230.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_24-15_27_38
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3377| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.4250', '1.850', '2.3020', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9700', '1.850', '2.4750', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9590', '1.850', '0.5233', '0.000', '0.0000', '0.000', '0.0000']