FEB_3382 27.03.26 14:33:11
Info
14:33:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:33:11:ST3_Shared:INFO: FEB-Microcable
14:33:11:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:33:11:febtest:INFO: Testing FEB with SN 3382
14:33:13:smx_tester:INFO: Scanning setup
14:33:13:elinks:INFO: Disabling clock on downlink 0
14:33:13:elinks:INFO: Disabling clock on downlink 1
14:33:13:elinks:INFO: Disabling clock on downlink 2
14:33:13:elinks:INFO: Disabling clock on downlink 3
14:33:13:elinks:INFO: Disabling clock on downlink 4
14:33:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:33:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:13:elinks:INFO: Disabling clock on downlink 0
14:33:13:elinks:INFO: Disabling clock on downlink 1
14:33:13:elinks:INFO: Disabling clock on downlink 2
14:33:13:elinks:INFO: Disabling clock on downlink 3
14:33:13:elinks:INFO: Disabling clock on downlink 4
14:33:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:33:13:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:33:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:13:elinks:INFO: Disabling clock on downlink 0
14:33:13:elinks:INFO: Disabling clock on downlink 1
14:33:13:elinks:INFO: Disabling clock on downlink 2
14:33:13:elinks:INFO: Disabling clock on downlink 3
14:33:13:elinks:INFO: Disabling clock on downlink 4
14:33:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:33:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:13:elinks:INFO: Disabling clock on downlink 0
14:33:13:elinks:INFO: Disabling clock on downlink 1
14:33:13:elinks:INFO: Disabling clock on downlink 2
14:33:13:elinks:INFO: Disabling clock on downlink 3
14:33:13:elinks:INFO: Disabling clock on downlink 4
14:33:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:33:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:13:elinks:INFO: Disabling clock on downlink 0
14:33:13:elinks:INFO: Disabling clock on downlink 1
14:33:13:elinks:INFO: Disabling clock on downlink 2
14:33:13:elinks:INFO: Disabling clock on downlink 3
14:33:13:elinks:INFO: Disabling clock on downlink 4
14:33:13:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:33:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:33:13:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:33:13:setup_element:INFO: Scanning clock phase
14:33:13:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:33:14:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:33:14:setup_element:INFO: Eye window for uplink 0 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:33:14:setup_element:INFO: Eye window for uplink 1 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:33:14:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:33:14:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:33:14:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:33:14:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:33:14:setup_element:INFO: Eye window for uplink 6 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:33:14:setup_element:INFO: Eye window for uplink 7 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:33:14:setup_element:INFO: Eye window for uplink 8 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:33:14:setup_element:INFO: Eye window for uplink 9 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:33:14:setup_element:INFO: Eye window for uplink 10: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:33:14:setup_element:INFO: Eye window for uplink 11: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:33:14:setup_element:INFO: Eye window for uplink 12: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:33:14:setup_element:INFO: Eye window for uplink 13: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:33:14:setup_element:INFO: Eye window for uplink 14: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:33:14:setup_element:INFO: Eye window for uplink 15: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:33:14:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
14:33:14:setup_element:INFO: Scanning data phases
14:33:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:14:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:33:19:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:33:19:setup_element:INFO: Eye window for uplink 0 : __________XXXXXXXX______________________
Data delay found: 33
14:33:19:setup_element:INFO: Eye window for uplink 1 : _______XXXXXXXXX________________________
Data delay found: 31
14:33:19:setup_element:INFO: Eye window for uplink 2 : ___________XXXXXX_______________________
Data delay found: 33
14:33:19:setup_element:INFO: Eye window for uplink 3 : ___________XXXXX________________________
Data delay found: 33
14:33:19:setup_element:INFO: Eye window for uplink 4 : __________XXXXX_________________________
Data delay found: 32
14:33:19:setup_element:INFO: Eye window for uplink 5 : _________XXXXXX_________________________
Data delay found: 31
14:33:19:setup_element:INFO: Eye window for uplink 6 : ___XXXXX________________________________
Data delay found: 25
14:33:19:setup_element:INFO: Eye window for uplink 7 : _XXXXXX_______________________________XX
Data delay found: 22
14:33:19:setup_element:INFO: Eye window for uplink 8 : ____________________________XXXXXXXX____
Data delay found: 11
14:33:19:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___
Data delay found: 14
14:33:19:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXX___
Data delay found: 14
14:33:19:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
14:33:19:setup_element:INFO: Eye window for uplink 12: ________________________________XXXXXX__
Data delay found: 14
14:33:19:setup_element:INFO: Eye window for uplink 13: _________________________________XXXXX__
Data delay found: 15
14:33:19:setup_element:INFO: Eye window for uplink 14: ______________________________XXXXXXX___
Data delay found: 13
14:33:19:setup_element:INFO: Eye window for uplink 15: ______________________________XXXXXXX___
Data delay found: 13
14:33:19:setup_element:INFO: Setting the data phase to 33 for uplink 0
14:33:19:setup_element:INFO: Setting the data phase to 31 for uplink 1
14:33:19:setup_element:INFO: Setting the data phase to 33 for uplink 2
14:33:19:setup_element:INFO: Setting the data phase to 33 for uplink 3
14:33:19:setup_element:INFO: Setting the data phase to 32 for uplink 4
14:33:19:setup_element:INFO: Setting the data phase to 31 for uplink 5
14:33:19:setup_element:INFO: Setting the data phase to 25 for uplink 6
14:33:19:setup_element:INFO: Setting the data phase to 22 for uplink 7
14:33:19:setup_element:INFO: Setting the data phase to 11 for uplink 8
14:33:19:setup_element:INFO: Setting the data phase to 14 for uplink 9
14:33:19:setup_element:INFO: Setting the data phase to 14 for uplink 10
14:33:19:setup_element:INFO: Setting the data phase to 15 for uplink 11
14:33:19:setup_element:INFO: Setting the data phase to 14 for uplink 12
14:33:19:setup_element:INFO: Setting the data phase to 15 for uplink 13
14:33:19:setup_element:INFO: Setting the data phase to 13 for uplink 14
14:33:19:setup_element:INFO: Setting the data phase to 13 for uplink 15
14:33:19:setup_element:INFO: Beginning SMX ASICs map scan
14:33:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:33:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:33:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:33:19:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:33:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:33:19:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:33:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:33:19:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:33:19:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:33:19:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:33:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:33:20:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:33:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:33:20:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:33:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:33:20:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:33:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:33:20:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:33:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:33:20:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:33:22:setup_element:INFO: Performing Elink synchronization
14:33:22:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:33:22:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:33:22:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:33:22:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:33:22:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:33:22:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:33:22:febtest:INFO: Init all SMX (CSA): 30
14:33:37:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:33:37:febtest:INFO: 01-00 | XA-000-09-004-039-012-021-04 | 34.6 | 1171.5
14:33:37:febtest:INFO: 08-01 | XA-000-09-004-039-012-022-04 | 44.1 | 1141.9
14:33:37:febtest:INFO: 03-02 | XA-000-09-004-039-015-022-10 | 18.7 | 1224.5
14:33:37:febtest:INFO: 10-03 | XA-000-09-004-039-009-022-15 | 28.2 | 1206.9
14:33:38:febtest:INFO: 05-04 | XA-000-09-004-039-015-023-10 | 28.2 | 1201.0
14:33:38:febtest:INFO: 12-05 | XA-000-09-004-039-006-022-11 | 47.3 | 1130.0
14:33:38:febtest:INFO: 07-06 | XA-000-09-004-039-012-023-04 | 21.9 | 1218.6
14:33:38:febtest:INFO: 14-07 | XA-000-09-004-039-003-021-00 | 37.7 | 1171.5
14:33:39:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:33:41:ST3_smx:INFO: chip: 1-0 34.556970 C 1183.292940 mV
14:33:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:33:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:33:41:ST3_smx:INFO: Electrons
14:33:41:ST3_smx:INFO: # loops 0
14:33:43:ST3_smx:INFO: # loops 1
14:33:44:ST3_smx:INFO: # loops 2
14:33:46:ST3_smx:INFO: Total # of broken channels: 0
14:33:46:ST3_smx:INFO: List of broken channels: []
14:33:46:ST3_smx:INFO: Total # of broken channels: 0
14:33:46:ST3_smx:INFO: List of broken channels: []
14:33:47:ST3_smx:INFO: chip: 8-1 44.073563 C 1159.654860 mV
14:33:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:33:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:33:47:ST3_smx:INFO: Electrons
14:33:47:ST3_smx:INFO: # loops 0
14:33:49:ST3_smx:INFO: # loops 1
14:33:50:ST3_smx:INFO: # loops 2
14:33:52:ST3_smx:INFO: Total # of broken channels: 0
14:33:52:ST3_smx:INFO: List of broken channels: []
14:33:52:ST3_smx:INFO: Total # of broken channels: 0
14:33:52:ST3_smx:INFO: List of broken channels: []
14:33:54:ST3_smx:INFO: chip: 3-2 18.745682 C 1242.040240 mV
14:33:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:33:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:33:54:ST3_smx:INFO: Electrons
14:33:54:ST3_smx:INFO: # loops 0
14:33:56:ST3_smx:INFO: # loops 1
14:33:58:ST3_smx:INFO: # loops 2
14:34:00:ST3_smx:INFO: Total # of broken channels: 0
14:34:00:ST3_smx:INFO: List of broken channels: []
14:34:00:ST3_smx:INFO: Total # of broken channels: 0
14:34:00:ST3_smx:INFO: List of broken channels: []
14:34:01:ST3_smx:INFO: chip: 10-3 28.225000 C 1230.330540 mV
14:34:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:01:ST3_smx:INFO: Electrons
14:34:01:ST3_smx:INFO: # loops 0
14:34:03:ST3_smx:INFO: # loops 1
14:34:05:ST3_smx:INFO: # loops 2
14:34:07:ST3_smx:INFO: Total # of broken channels: 0
14:34:07:ST3_smx:INFO: List of broken channels: []
14:34:07:ST3_smx:INFO: Total # of broken channels: 0
14:34:07:ST3_smx:INFO: List of broken channels: []
14:34:08:ST3_smx:INFO: chip: 5-4 28.225000 C 1218.600960 mV
14:34:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:08:ST3_smx:INFO: Electrons
14:34:08:ST3_smx:INFO: # loops 0
14:34:10:ST3_smx:INFO: # loops 1
14:34:12:ST3_smx:INFO: # loops 2
14:34:13:ST3_smx:INFO: Total # of broken channels: 0
14:34:13:ST3_smx:INFO: List of broken channels: []
14:34:13:ST3_smx:INFO: Total # of broken channels: 0
14:34:13:ST3_smx:INFO: List of broken channels: []
14:34:15:ST3_smx:INFO: chip: 12-5 50.430383 C 1147.806000 mV
14:34:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:15:ST3_smx:INFO: Electrons
14:34:15:ST3_smx:INFO: # loops 0
14:34:16:ST3_smx:INFO: # loops 1
14:34:18:ST3_smx:INFO: # loops 2
14:34:19:ST3_smx:INFO: Total # of broken channels: 0
14:34:19:ST3_smx:INFO: List of broken channels: []
14:34:19:ST3_smx:INFO: Total # of broken channels: 0
14:34:19:ST3_smx:INFO: List of broken channels: []
14:34:21:ST3_smx:INFO: chip: 7-6 25.062742 C 1230.330540 mV
14:34:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:21:ST3_smx:INFO: Electrons
14:34:21:ST3_smx:INFO: # loops 0
14:34:22:ST3_smx:INFO: # loops 1
14:34:24:ST3_smx:INFO: # loops 2
14:34:25:ST3_smx:INFO: Total # of broken channels: 0
14:34:25:ST3_smx:INFO: List of broken channels: []
14:34:25:ST3_smx:INFO: Total # of broken channels: 0
14:34:25:ST3_smx:INFO: List of broken channels: []
14:34:27:ST3_smx:INFO: chip: 14-7 40.898880 C 1183.292940 mV
14:34:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:27:ST3_smx:INFO: Electrons
14:34:27:ST3_smx:INFO: # loops 0
14:34:29:ST3_smx:INFO: # loops 1
14:34:30:ST3_smx:INFO: # loops 2
14:34:32:ST3_smx:INFO: Total # of broken channels: 0
14:34:32:ST3_smx:INFO: List of broken channels: []
14:34:32:ST3_smx:INFO: Total # of broken channels: 0
14:34:32:ST3_smx:INFO: List of broken channels: []
14:34:32:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:34:32:febtest:INFO: 01-00 | XA-000-09-004-039-012-021-04 | 37.7 | 1206.9
14:34:32:febtest:INFO: 08-01 | XA-000-09-004-039-012-022-04 | 47.3 | 1183.3
14:34:33:febtest:INFO: 03-02 | XA-000-09-004-039-015-022-10 | 21.9 | 1259.6
14:34:33:febtest:INFO: 10-03 | XA-000-09-004-039-009-022-15 | 31.4 | 1247.9
14:34:33:febtest:INFO: 05-04 | XA-000-09-004-039-015-023-10 | 31.4 | 1242.0
14:34:33:febtest:INFO: 12-05 | XA-000-09-004-039-006-022-11 | 50.4 | 1171.5
14:34:33:febtest:INFO: 07-06 | XA-000-09-004-039-012-023-04 | 25.1 | 1253.7
14:34:34:febtest:INFO: 14-07 | XA-000-09-004-039-003-021-00 | 40.9 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_27-14_33_11
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3382| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.6040', '1.850', '2.1690', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9810', '1.850', '2.4220', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9700', '1.850', '0.5225', '0.000', '0.0000', '0.000', '0.0000']