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FEB_3386 25.03.26 14:34:12
Info
14:34:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:12:ST3_Shared:INFO: FEB-Microcable
14:34:12:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:34:12:febtest:INFO: Testing FEB with SN 3386
14:34:14:smx_tester:INFO: Scanning setup
14:34:14:elinks:INFO: Disabling clock on downlink 0
14:34:14:elinks:INFO: Disabling clock on downlink 1
14:34:14:elinks:INFO: Disabling clock on downlink 2
14:34:14:elinks:INFO: Disabling clock on downlink 3
14:34:14:elinks:INFO: Disabling clock on downlink 4
14:34:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:34:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:14:elinks:INFO: Disabling clock on downlink 0
14:34:14:elinks:INFO: Disabling clock on downlink 1
14:34:14:elinks:INFO: Disabling clock on downlink 2
14:34:14:elinks:INFO: Disabling clock on downlink 3
14:34:14:elinks:INFO: Disabling clock on downlink 4
14:34:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
14:34:14:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
14:34:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:14:elinks:INFO: Disabling clock on downlink 0
14:34:14:elinks:INFO: Disabling clock on downlink 1
14:34:14:elinks:INFO: Disabling clock on downlink 2
14:34:14:elinks:INFO: Disabling clock on downlink 3
14:34:14:elinks:INFO: Disabling clock on downlink 4
14:34:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:34:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:14:elinks:INFO: Disabling clock on downlink 0
14:34:14:elinks:INFO: Disabling clock on downlink 1
14:34:14:elinks:INFO: Disabling clock on downlink 2
14:34:14:elinks:INFO: Disabling clock on downlink 3
14:34:14:elinks:INFO: Disabling clock on downlink 4
14:34:14:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:14:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:34:14:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:14:elinks:INFO: Disabling clock on downlink 0
14:34:14:elinks:INFO: Disabling clock on downlink 1
14:34:14:elinks:INFO: Disabling clock on downlink 2
14:34:14:elinks:INFO: Disabling clock on downlink 3
14:34:15:elinks:INFO: Disabling clock on downlink 4
14:34:15:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:34:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:34:15:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:34:15:setup_element:INFO: Scanning clock phase
14:34:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:15:setup_element:INFO: Clock phase scan results for group 0, downlink 1
14:34:15:setup_element:INFO: Eye window for uplink 0 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:34:15:setup_element:INFO: Eye window for uplink 1 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:34:15:setup_element:INFO: Eye window for uplink 2 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:34:15:setup_element:INFO: Eye window for uplink 3 : _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:34:15:setup_element:INFO: Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:34:15:setup_element:INFO: Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
14:34:15:setup_element:INFO: Eye window for uplink 6 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:34:15:setup_element:INFO: Eye window for uplink 7 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
14:34:15:setup_element:INFO: Eye window for uplink 8 : ________________________________________________________________________________
Clock Delay: 40
14:34:15:setup_element:INFO: Eye window for uplink 9 : ________________________________________________________________________________
Clock Delay: 40
14:34:15:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:34:15:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
14:34:15:setup_element:INFO: Eye window for uplink 12: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:34:15:setup_element:INFO: Eye window for uplink 13: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
14:34:15:setup_element:INFO: Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:34:15:setup_element:INFO: Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:34:15:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
14:34:15:setup_element:INFO: Scanning data phases
14:34:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:20:setup_element:INFO: Data phase scan results for group 0, downlink 1
14:34:20:setup_element:INFO: Eye window for uplink 0 : ______________XXXXXX____________________
Data delay found: 36
14:34:20:setup_element:INFO: Eye window for uplink 1 : ___________XXXXXXX______________________
Data delay found: 34
14:34:20:setup_element:INFO: Eye window for uplink 2 : _________XXXXXXX________________________
Data delay found: 32
14:34:20:setup_element:INFO: Eye window for uplink 3 : ________XXXXXXX_________________________
Data delay found: 31
14:34:20:setup_element:INFO: Eye window for uplink 4 : _________XXXXX__________________________
Data delay found: 31
14:34:20:setup_element:INFO: Eye window for uplink 5 : _______XXXXXXX__________________________
Data delay found: 30
14:34:20:setup_element:INFO: Eye window for uplink 6 : XXXXXX_________________________________X
Data delay found: 22
14:34:20:setup_element:INFO: Eye window for uplink 7 : XXXXX________________________________XXX
Data delay found: 20
14:34:20:setup_element:INFO: Eye window for uplink 8 : _____________________________XXXXXX_____
Data delay found: 11
14:34:20:setup_element:INFO: Eye window for uplink 9 : ________________________________XXXXX___
Data delay found: 14
14:34:20:setup_element:INFO: Eye window for uplink 10: ________________________________XXXXXX__
Data delay found: 14
14:34:20:setup_element:INFO: Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
14:34:20:setup_element:INFO: Eye window for uplink 12: ________________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
14:34:20:setup_element:INFO: Eye window for uplink 13: ________________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
14:34:20:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXXXXXX__
Data delay found: 13
14:34:20:setup_element:INFO: Eye window for uplink 15: _______________________________XXXXXXX__
Data delay found: 14
14:34:20:setup_element:INFO: Setting the data phase to 36 for uplink 0
14:34:20:setup_element:INFO: Setting the data phase to 34 for uplink 1
14:34:20:setup_element:INFO: Setting the data phase to 32 for uplink 2
14:34:20:setup_element:INFO: Setting the data phase to 31 for uplink 3
14:34:20:setup_element:INFO: Setting the data phase to 31 for uplink 4
14:34:20:setup_element:INFO: Setting the data phase to 30 for uplink 5
14:34:20:setup_element:INFO: Setting the data phase to 22 for uplink 6
14:34:20:setup_element:INFO: Setting the data phase to 20 for uplink 7
14:34:20:setup_element:INFO: Setting the data phase to 11 for uplink 8
14:34:20:setup_element:INFO: Setting the data phase to 14 for uplink 9
14:34:20:setup_element:INFO: Setting the data phase to 14 for uplink 10
14:34:20:setup_element:INFO: Setting the data phase to 15 for uplink 11
14:34:20:setup_element:INFO: Setting the data phase to 7 for uplink 12
14:34:20:setup_element:INFO: Setting the data phase to 7 for uplink 13
14:34:20:setup_element:INFO: Setting the data phase to 13 for uplink 14
14:34:20:setup_element:INFO: Setting the data phase to 14 for uplink 15
14:34:20:setup_element:INFO: Beginning SMX ASICs map scan
14:34:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:34:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:34:20:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
14:34:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
14:34:20:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
14:34:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
14:34:21:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
14:34:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
14:34:21:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
14:34:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
14:34:21:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
14:34:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
14:34:21:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
14:34:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
14:34:21:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
14:34:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
14:34:21:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
14:34:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
14:34:22:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
14:34:23:setup_element:INFO: Performing Elink synchronization
14:34:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:34:23:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
14:34:23:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
14:34:23:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
14:34:23:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
14:34:23:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
14:34:24:febtest:INFO: Init all SMX (CSA): 30
14:34:41:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:34:41:febtest:INFO: 01-00 | XA-000-09-004-029-008-023-12 | 44.1 | 1135.9
14:34:41:febtest:INFO: 08-01 | XA-000-09-004-029-005-023-11 | 40.9 | 1147.8
14:34:42:febtest:INFO: 03-02 | XA-000-09-004-029-011-023-02 | 25.1 | 1212.7
14:34:42:febtest:INFO: 10-03 | XA-000-09-004-029-005-022-11 | 34.6 | 1183.3
14:34:42:febtest:INFO: 05-04 | XA-000-09-004-029-014-023-09 | 21.9 | 1218.6
14:34:42:febtest:INFO: 12-05 | XA-000-09-004-029-008-022-12 | 40.9 | 1153.7
14:34:42:febtest:INFO: 07-06 | XA-000-09-004-029-014-024-09 | 28.2 | 1189.2
14:34:43:febtest:INFO: 14-07 | XA-000-09-004-029-011-022-02 | 31.4 | 1189.2
14:34:44:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
14:34:46:ST3_smx:INFO: chip: 1-0 44.073563 C 1147.806000 mV
14:34:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:46:ST3_smx:INFO: Electrons
14:34:46:ST3_smx:INFO: # loops 0
14:34:48:ST3_smx:INFO: # loops 1
14:34:50:ST3_smx:INFO: # loops 2
14:34:52:ST3_smx:INFO: Total # of broken channels: 0
14:34:52:ST3_smx:INFO: List of broken channels: []
14:34:52:ST3_smx:INFO: Total # of broken channels: 0
14:34:52:ST3_smx:INFO: List of broken channels: []
14:34:54:ST3_smx:INFO: chip: 8-1 40.898880 C 1165.571835 mV
14:34:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:34:54:ST3_smx:INFO: Electrons
14:34:54:ST3_smx:INFO: # loops 0
14:34:56:ST3_smx:INFO: # loops 1
14:34:58:ST3_smx:INFO: # loops 2
14:35:00:ST3_smx:INFO: Total # of broken channels: 0
14:35:00:ST3_smx:INFO: List of broken channels: []
14:35:00:ST3_smx:INFO: Total # of broken channels: 0
14:35:00:ST3_smx:INFO: List of broken channels: []
14:35:01:ST3_smx:INFO: chip: 3-2 25.062742 C 1224.468235 mV
14:35:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:01:ST3_smx:INFO: Electrons
14:35:01:ST3_smx:INFO: # loops 0
14:35:03:ST3_smx:INFO: # loops 1
14:35:05:ST3_smx:INFO: # loops 2
14:35:07:ST3_smx:INFO: Total # of broken channels: 0
14:35:07:ST3_smx:INFO: List of broken channels: []
14:35:07:ST3_smx:INFO: Total # of broken channels: 0
14:35:07:ST3_smx:INFO: List of broken channels: []
14:35:09:ST3_smx:INFO: chip: 10-3 34.556970 C 1195.082160 mV
14:35:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:09:ST3_smx:INFO: Electrons
14:35:09:ST3_smx:INFO: # loops 0
14:35:11:ST3_smx:INFO: # loops 1
14:35:13:ST3_smx:INFO: # loops 2
14:35:15:ST3_smx:INFO: Total # of broken channels: 0
14:35:15:ST3_smx:INFO: List of broken channels: []
14:35:15:ST3_smx:INFO: Total # of broken channels: 0
14:35:15:ST3_smx:INFO: List of broken channels: []
14:35:17:ST3_smx:INFO: chip: 5-4 25.062742 C 1230.330540 mV
14:35:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:17:ST3_smx:INFO: Electrons
14:35:17:ST3_smx:INFO: # loops 0
14:35:19:ST3_smx:INFO: # loops 1
14:35:21:ST3_smx:INFO: # loops 2
14:35:23:ST3_smx:INFO: Total # of broken channels: 0
14:35:23:ST3_smx:INFO: List of broken channels: []
14:35:23:ST3_smx:INFO: Total # of broken channels: 0
14:35:23:ST3_smx:INFO: List of broken channels: []
14:35:25:ST3_smx:INFO: chip: 12-5 40.898880 C 1171.483840 mV
14:35:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:25:ST3_smx:INFO: Electrons
14:35:25:ST3_smx:INFO: # loops 0
14:35:27:ST3_smx:INFO: # loops 1
14:35:29:ST3_smx:INFO: # loops 2
14:35:30:ST3_smx:INFO: Total # of broken channels: 0
14:35:30:ST3_smx:INFO: List of broken channels: []
14:35:30:ST3_smx:INFO: Total # of broken channels: 0
14:35:30:ST3_smx:INFO: List of broken channels: []
14:35:32:ST3_smx:INFO: chip: 7-6 31.389742 C 1200.969315 mV
14:35:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:32:ST3_smx:INFO: Electrons
14:35:32:ST3_smx:INFO: # loops 0
14:35:34:ST3_smx:INFO: # loops 1
14:35:36:ST3_smx:INFO: # loops 2
14:35:39:ST3_smx:INFO: Total # of broken channels: 0
14:35:39:ST3_smx:INFO: List of broken channels: []
14:35:39:ST3_smx:INFO: Total # of broken channels: 0
14:35:39:ST3_smx:INFO: List of broken channels: []
14:35:40:ST3_smx:INFO: chip: 14-7 34.556970 C 1206.851500 mV
14:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:35:40:ST3_smx:INFO: Electrons
14:35:40:ST3_smx:INFO: # loops 0
14:35:42:ST3_smx:INFO: # loops 1
14:35:44:ST3_smx:INFO: # loops 2
14:35:46:ST3_smx:INFO: Total # of broken channels: 0
14:35:46:ST3_smx:INFO: List of broken channels: []
14:35:46:ST3_smx:INFO: Total # of broken channels: 0
14:35:46:ST3_smx:INFO: List of broken channels: []
14:35:46:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:35:47:febtest:INFO: 01-00 | XA-000-09-004-029-008-023-12 | 47.3 | 1171.5
14:35:47:febtest:INFO: 08-01 | XA-000-09-004-029-005-023-11 | 44.1 | 1183.3
14:35:47:febtest:INFO: 03-02 | XA-000-09-004-029-011-023-02 | 28.2 | 1247.9
14:35:47:febtest:INFO: 10-03 | XA-000-09-004-029-005-022-11 | 34.6 | 1218.6
14:35:47:febtest:INFO: 05-04 | XA-000-09-004-029-014-023-09 | 25.1 | 1253.7
14:35:48:febtest:INFO: 12-05 | XA-000-09-004-029-008-022-12 | 44.1 | 1189.2
14:35:48:febtest:INFO: 07-06 | XA-000-09-004-029-014-024-09 | 34.6 | 1224.5
14:35:48:febtest:INFO: 14-07 | XA-000-09-004-029-011-022-02 | 34.6 | 1224.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_25-14_34_12
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3386| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.449', '1.9760', '1.850', '2.6620', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9940', '1.850', '2.4190', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9590', '1.850', '0.5110', '0.000', '0.0000', '0.000', '0.0000']