08:04:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:04:37:ST3_Shared:INFO:	                         FEB-Sensor                         
08:04:37:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:04:39:ST3_ModuleSelector:INFO:	L2DR300012 M2DR3B0000120A2 42 B

08:04:39:ST3_ModuleSelector:INFO:	07372

08:04:39:febtest:INFO:	Testing FEB with SN 3386
08:04:40:smx_tester:INFO:	Scanning setup
08:04:40:elinks:INFO:	Disabling clock on downlink 0
08:04:40:elinks:INFO:	Disabling clock on downlink 1
08:04:40:elinks:INFO:	Disabling clock on downlink 2
08:04:40:elinks:INFO:	Disabling clock on downlink 3
08:04:40:elinks:INFO:	Disabling clock on downlink 4
08:04:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:04:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
08:04:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:04:40:elinks:INFO:	Disabling clock on downlink 0
08:04:40:elinks:INFO:	Disabling clock on downlink 1
08:04:40:elinks:INFO:	Disabling clock on downlink 2
08:04:40:elinks:INFO:	Disabling clock on downlink 3
08:04:40:elinks:INFO:	Disabling clock on downlink 4
08:04:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:04:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 0
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 1
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 2
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 3
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 4
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 5
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 6
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 7
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 8
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 9
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 10
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 11
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 12
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 13
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 14
08:04:41:setup_element:INFO:	SOS detected for group 0, downlink 1, uplink 15
08:04:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:04:41:elinks:INFO:	Disabling clock on downlink 0
08:04:41:elinks:INFO:	Disabling clock on downlink 1
08:04:41:elinks:INFO:	Disabling clock on downlink 2
08:04:41:elinks:INFO:	Disabling clock on downlink 3
08:04:41:elinks:INFO:	Disabling clock on downlink 4
08:04:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:04:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
08:04:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:04:41:elinks:INFO:	Disabling clock on downlink 0
08:04:41:elinks:INFO:	Disabling clock on downlink 1
08:04:41:elinks:INFO:	Disabling clock on downlink 2
08:04:41:elinks:INFO:	Disabling clock on downlink 3
08:04:41:elinks:INFO:	Disabling clock on downlink 4
08:04:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:04:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
08:04:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:04:41:elinks:INFO:	Disabling clock on downlink 0
08:04:41:elinks:INFO:	Disabling clock on downlink 1
08:04:41:elinks:INFO:	Disabling clock on downlink 2
08:04:41:elinks:INFO:	Disabling clock on downlink 3
08:04:41:elinks:INFO:	Disabling clock on downlink 4
08:04:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
08:04:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
08:04:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
08:04:41:setup_element:INFO:	Scanning clock phase
08:04:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:04:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:04:41:setup_element:INFO:	Clock phase scan results for group 0, downlink 1
08:04:41:setup_element:INFO:	Eye window for uplink 0 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:04:41:setup_element:INFO:	Eye window for uplink 1 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:04:41:setup_element:INFO:	Eye window for uplink 2 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:04:41:setup_element:INFO:	Eye window for uplink 3 : ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:04:41:setup_element:INFO:	Eye window for uplink 4 : ________________________________________________________________________XXXXX___
Clock Delay: 34
08:04:41:setup_element:INFO:	Eye window for uplink 5 : ________________________________________________________________________XXXXX___
Clock Delay: 34
08:04:41:setup_element:INFO:	Eye window for uplink 6 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:04:41:setup_element:INFO:	Eye window for uplink 7 : _____________________________________________________________________XXXXXXX____
Clock Delay: 32
08:04:41:setup_element:INFO:	Eye window for uplink 8 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:04:41:setup_element:INFO:	Eye window for uplink 9 : ______________________________________________________________________XXXXXXX___
Clock Delay: 33
08:04:41:setup_element:INFO:	Eye window for uplink 10: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:04:41:setup_element:INFO:	Eye window for uplink 11: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:04:41:setup_element:INFO:	Eye window for uplink 12: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
08:04:41:setup_element:INFO:	Eye window for uplink 13: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
08:04:41:setup_element:INFO:	Eye window for uplink 14: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:04:41:setup_element:INFO:	Eye window for uplink 15: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:04:41:setup_element:INFO:	Setting the clock phase to 32 for group 0, downlink 1
08:04:41:setup_element:INFO:	Scanning data phases
08:04:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:04:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:04:47:setup_element:INFO:	Data phase scan results for group 0, downlink 1
08:04:47:setup_element:INFO:	Eye window for uplink 0 : ______________XXXXXXX___________________
Data delay found: 37
08:04:47:setup_element:INFO:	Eye window for uplink 1 : ___________XXXXXXX______________________
Data delay found: 34
08:04:47:setup_element:INFO:	Eye window for uplink 2 : _________XXXXXXX________________________
Data delay found: 32
08:04:47:setup_element:INFO:	Eye window for uplink 3 : ________XXXXXXX_________________________
Data delay found: 31
08:04:47:setup_element:INFO:	Eye window for uplink 4 : _________XXXXXX_________________________
Data delay found: 31
08:04:47:setup_element:INFO:	Eye window for uplink 5 : ________XXXXXX__________________________
Data delay found: 30
08:04:47:setup_element:INFO:	Eye window for uplink 6 : XXXXXXX_________________________________
Data delay found: 23
08:04:47:setup_element:INFO:	Eye window for uplink 7 : XXXXXX______________________________XXXX
Data delay found: 20
08:04:47:setup_element:INFO:	Eye window for uplink 8 : ______________________________XXXXXX____
Data delay found: 12
08:04:47:setup_element:INFO:	Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
08:04:47:setup_element:INFO:	Eye window for uplink 10: ________________________________XXXXXX__
Data delay found: 14
08:04:47:setup_element:INFO:	Eye window for uplink 11: _________________________________XXXXXX_
Data delay found: 15
08:04:47:setup_element:INFO:	Eye window for uplink 12: ________________________________XXXXXX__
Data delay found: 14
08:04:47:setup_element:INFO:	Eye window for uplink 13: ________________________________XXXXXX__
Data delay found: 14
08:04:47:setup_element:INFO:	Eye window for uplink 14: _______________________________XXXXXXX__
Data delay found: 14
08:04:47:setup_element:INFO:	Eye window for uplink 15: _______________________________XXXXXXXX_
Data delay found: 14
08:04:47:setup_element:INFO:	Setting the data phase to 37 for uplink 0
08:04:47:setup_element:INFO:	Setting the data phase to 34 for uplink 1
08:04:47:setup_element:INFO:	Setting the data phase to 32 for uplink 2
08:04:47:setup_element:INFO:	Setting the data phase to 31 for uplink 3
08:04:47:setup_element:INFO:	Setting the data phase to 31 for uplink 4
08:04:47:setup_element:INFO:	Setting the data phase to 30 for uplink 5
08:04:47:setup_element:INFO:	Setting the data phase to 23 for uplink 6
08:04:47:setup_element:INFO:	Setting the data phase to 20 for uplink 7
08:04:47:setup_element:INFO:	Setting the data phase to 12 for uplink 8
08:04:47:setup_element:INFO:	Setting the data phase to 15 for uplink 9
08:04:47:setup_element:INFO:	Setting the data phase to 14 for uplink 10
08:04:47:setup_element:INFO:	Setting the data phase to 15 for uplink 11
08:04:47:setup_element:INFO:	Setting the data phase to 14 for uplink 12
08:04:47:setup_element:INFO:	Setting the data phase to 14 for uplink 13
08:04:47:setup_element:INFO:	Setting the data phase to 14 for uplink 14
08:04:47:setup_element:INFO:	Setting the data phase to 14 for uplink 15
08:04:47:setup_element:INFO:	Beginning SMX ASICs map scan
08:04:47:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:04:47:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:04:47:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:04:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:04:47:uplink:INFO:	Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:04:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:04:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:04:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:04:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:04:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:04:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:04:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:04:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:04:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:04:48:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:04:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:04:48:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:04:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:04:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:04:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:04:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:04:49:setup_element:INFO:	Performing Elink synchronization
08:04:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
08:04:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:04:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [1]
08:04:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [1]
08:04:49:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 1
08:04:49:uplink:INFO:	Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   1   |  0  |   [1]   |    2    | [(0, 1), (1, 0)]
 1   | [0]  |   1   |  0  |   [8]   |    2    | [(0, 8), (1, 9)]
 2   | [0]  |   1   |  0  |   [3]   |    2    | [(0, 3), (1, 2)]
 3   | [0]  |   1   |  0  |  [10]   |    2    | [(0, 10), (1, 11)]
 4   | [0]  |   1   |  0  |   [5]   |    2    | [(0, 5), (1, 4)]
 5   | [0]  |   1   |  0  |  [12]   |    2    | [(0, 12), (1, 13)]
 6   | [0]  |   1   |  0  |   [7]   |    2    | [(0, 7), (1, 6)]
 7   | [0]  |   1   |  0  |  [14]   |    2    | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:04:50:febtest:INFO:	Init all SMX (CSA): 30
08:05:07:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:05:08:febtest:INFO:	01-00 | XA-000-09-004-029-008-023-12 |  40.9 | 1135.9
08:05:08:febtest:INFO:	08-01 | XA-000-09-004-029-005-023-11 |  37.7 | 1153.7
08:05:08:febtest:INFO:	03-02 | XA-000-09-004-029-011-023-02 |  18.7 | 1212.7
08:05:08:febtest:INFO:	10-03 | XA-000-09-004-029-005-022-11 |  28.2 | 1183.3
08:05:08:febtest:INFO:	05-04 | XA-000-09-004-029-014-023-09 |  18.7 | 1218.6
08:05:09:febtest:INFO:	12-05 | XA-000-09-004-029-008-022-12 |  37.7 | 1153.7
08:05:09:febtest:INFO:	07-06 | XA-000-09-004-029-014-024-09 |  25.1 | 1195.1
08:05:09:febtest:INFO:	14-07 | XA-000-09-004-029-011-022-02 |  28.2 | 1195.1
08:05:10:febtest:INFO:	Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:05:12:ST3_smx:INFO:	chip: 1-0 	 40.898880 C 	 1147.806000 mV
08:05:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:12:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:12:ST3_smx:INFO:		Electrons
08:05:12:ST3_smx:INFO:	# loops 0
08:05:14:ST3_smx:INFO:	# loops 1
08:05:16:ST3_smx:INFO:	# loops 2
08:05:19:ST3_smx:INFO:	Total # of broken channels: 0
08:05:19:ST3_smx:INFO:	List of broken channels: []
08:05:19:ST3_smx:INFO:	Total # of broken channels: 0
08:05:19:ST3_smx:INFO:	List of broken channels: []
08:05:21:ST3_smx:INFO:	chip: 8-1 	 37.726682 C 	 1165.571835 mV
08:05:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:21:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:21:ST3_smx:INFO:		Electrons
08:05:21:ST3_smx:INFO:	# loops 0
08:05:23:ST3_smx:INFO:	# loops 1
08:05:24:ST3_smx:INFO:	# loops 2
08:05:26:ST3_smx:INFO:	Total # of broken channels: 0
08:05:26:ST3_smx:INFO:	List of broken channels: []
08:05:26:ST3_smx:INFO:	Total # of broken channels: 0
08:05:26:ST3_smx:INFO:	List of broken channels: []
08:05:28:ST3_smx:INFO:	chip: 3-2 	 21.902970 C 	 1230.330540 mV
08:05:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:28:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:28:ST3_smx:INFO:		Electrons
08:05:28:ST3_smx:INFO:	# loops 0
08:05:30:ST3_smx:INFO:	# loops 1
08:05:32:ST3_smx:INFO:	# loops 2
08:05:34:ST3_smx:INFO:	Total # of broken channels: 0
08:05:34:ST3_smx:INFO:	List of broken channels: []
08:05:34:ST3_smx:INFO:	Total # of broken channels: 0
08:05:34:ST3_smx:INFO:	List of broken channels: []
08:05:36:ST3_smx:INFO:	chip: 10-3 	 31.389742 C 	 1200.969315 mV
08:05:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:36:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:36:ST3_smx:INFO:		Electrons
08:05:36:ST3_smx:INFO:	# loops 0
08:05:38:ST3_smx:INFO:	# loops 1
08:05:40:ST3_smx:INFO:	# loops 2
08:05:42:ST3_smx:INFO:	Total # of broken channels: 0
08:05:42:ST3_smx:INFO:	List of broken channels: []
08:05:42:ST3_smx:INFO:	Total # of broken channels: 0
08:05:42:ST3_smx:INFO:	List of broken channels: []
08:05:44:ST3_smx:INFO:	chip: 5-4 	 21.902970 C 	 1230.330540 mV
08:05:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:44:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:44:ST3_smx:INFO:		Electrons
08:05:44:ST3_smx:INFO:	# loops 0
08:05:46:ST3_smx:INFO:	# loops 1
08:05:47:ST3_smx:INFO:	# loops 2
08:05:49:ST3_smx:INFO:	Total # of broken channels: 0
08:05:49:ST3_smx:INFO:	List of broken channels: []
08:05:49:ST3_smx:INFO:	Total # of broken channels: 0
08:05:49:ST3_smx:INFO:	List of broken channels: []
08:05:51:ST3_smx:INFO:	chip: 12-5 	 40.898880 C 	 1171.483840 mV
08:05:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:51:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:51:ST3_smx:INFO:		Electrons
08:05:51:ST3_smx:INFO:	# loops 0
08:05:53:ST3_smx:INFO:	# loops 1
08:05:55:ST3_smx:INFO:	# loops 2
08:05:57:ST3_smx:INFO:	Total # of broken channels: 0
08:05:57:ST3_smx:INFO:	List of broken channels: []
08:05:57:ST3_smx:INFO:	Total # of broken channels: 0
08:05:57:ST3_smx:INFO:	List of broken channels: []
08:05:59:ST3_smx:INFO:	chip: 7-6 	 31.389742 C 	 1206.851500 mV
08:05:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:59:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:05:59:ST3_smx:INFO:		Electrons
08:05:59:ST3_smx:INFO:	# loops 0
08:06:01:ST3_smx:INFO:	# loops 1
08:06:03:ST3_smx:INFO:	# loops 2
08:06:05:ST3_smx:INFO:	Total # of broken channels: 0
08:06:05:ST3_smx:INFO:	List of broken channels: []
08:06:05:ST3_smx:INFO:	Total # of broken channels: 0
08:06:05:ST3_smx:INFO:	List of broken channels: []
08:06:06:ST3_smx:INFO:	chip: 14-7 	 31.389742 C 	 1206.851500 mV
08:06:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:06:06:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
08:06:06:ST3_smx:INFO:		Electrons
08:06:06:ST3_smx:INFO:	# loops 0
08:06:08:ST3_smx:INFO:	# loops 1
08:06:10:ST3_smx:INFO:	# loops 2
08:06:12:ST3_smx:INFO:	Total # of broken channels: 0
08:06:12:ST3_smx:INFO:	List of broken channels: []
08:06:12:ST3_smx:INFO:	Total # of broken channels: 0
08:06:12:ST3_smx:INFO:	List of broken channels: []
08:06:12:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:06:12:febtest:INFO:	01-00 | XA-000-09-004-029-008-023-12 |  44.1 | 1171.5
08:06:13:febtest:INFO:	08-01 | XA-000-09-004-029-005-023-11 |  40.9 | 1189.2
08:06:13:febtest:INFO:	03-02 | XA-000-09-004-029-011-023-02 |  25.1 | 1253.7
08:06:13:febtest:INFO:	10-03 | XA-000-09-004-029-005-022-11 |  34.6 | 1218.6
08:06:13:febtest:INFO:	05-04 | XA-000-09-004-029-014-023-09 |  21.9 | 1247.9
08:06:13:febtest:INFO:	12-05 | XA-000-09-004-029-008-022-12 |  40.9 | 1189.2
08:06:14:febtest:INFO:	07-06 | XA-000-09-004-029-014-024-09 |  31.4 | 1224.5
08:06:14:febtest:INFO:	14-07 | XA-000-09-004-029-011-022-02 |  31.4 | 1224.5
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 26_03_31-08_04_37
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3386| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
SENSOR_ID:	07372

MODULE_NAME:	L2DR300012 M2DR3B0000120A2 42 B

MODULE_TYPE:	
MODULE_LADDER:	L2DR300012
MODULE_MODULE:	M2DR3B0000120A2
MODULE_SIZE:	42
MODULE_GRADE:	B
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5380', '1.849', '2.5610', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '1.9920', '1.850', '2.3750', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9580', '1.850', '0.5108', '0.000', '0.0000', '0.000', '0.0000']