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FEB_3388 25.03.26 08:27:43
Info
08:27:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:27:43:ST3_Shared:INFO: FEB-Microcable
08:27:43:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:27:43:febtest:INFO: Testing FEB with SN 3388
08:27:45:smx_tester:INFO: Scanning setup
08:27:45:elinks:INFO: Disabling clock on downlink 0
08:27:45:elinks:INFO: Disabling clock on downlink 1
08:27:45:elinks:INFO: Disabling clock on downlink 2
08:27:45:elinks:INFO: Disabling clock on downlink 3
08:27:45:elinks:INFO: Disabling clock on downlink 4
08:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:27:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:45:elinks:INFO: Disabling clock on downlink 0
08:27:45:elinks:INFO: Disabling clock on downlink 1
08:27:45:elinks:INFO: Disabling clock on downlink 2
08:27:45:elinks:INFO: Disabling clock on downlink 3
08:27:45:elinks:INFO: Disabling clock on downlink 4
08:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
08:27:45:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
08:27:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:45:elinks:INFO: Disabling clock on downlink 0
08:27:45:elinks:INFO: Disabling clock on downlink 1
08:27:45:elinks:INFO: Disabling clock on downlink 2
08:27:45:elinks:INFO: Disabling clock on downlink 3
08:27:45:elinks:INFO: Disabling clock on downlink 4
08:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:27:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:45:elinks:INFO: Disabling clock on downlink 0
08:27:45:elinks:INFO: Disabling clock on downlink 1
08:27:45:elinks:INFO: Disabling clock on downlink 2
08:27:45:elinks:INFO: Disabling clock on downlink 3
08:27:45:elinks:INFO: Disabling clock on downlink 4
08:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:27:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:45:elinks:INFO: Disabling clock on downlink 0
08:27:45:elinks:INFO: Disabling clock on downlink 1
08:27:45:elinks:INFO: Disabling clock on downlink 2
08:27:45:elinks:INFO: Disabling clock on downlink 3
08:27:45:elinks:INFO: Disabling clock on downlink 4
08:27:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:27:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:27:45:setup_element:INFO: Scanning clock phase
08:27:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:45:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:27:46:setup_element:INFO: Clock phase scan results for group 0, downlink 1
08:27:46:setup_element:INFO: Eye window for uplink 0 : ________________________________________________________________________XXXXX___
Clock Delay: 34
08:27:46:setup_element:INFO: Eye window for uplink 1 : ________________________________________________________________________XXXXX___
Clock Delay: 34
08:27:46:setup_element:INFO: Eye window for uplink 2 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:27:46:setup_element:INFO: Eye window for uplink 3 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
08:27:46:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:27:46:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:27:46:setup_element:INFO: Eye window for uplink 6 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:27:46:setup_element:INFO: Eye window for uplink 7 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:27:46:setup_element:INFO: Eye window for uplink 8 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:27:46:setup_element:INFO: Eye window for uplink 9 : _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:27:46:setup_element:INFO: Eye window for uplink 10: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:27:46:setup_element:INFO: Eye window for uplink 11: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:27:46:setup_element:INFO: Eye window for uplink 12: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
08:27:46:setup_element:INFO: Eye window for uplink 13: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
08:27:46:setup_element:INFO: Eye window for uplink 14: ____________________________________________________________________XXXXXX______
Clock Delay: 30
08:27:46:setup_element:INFO: Eye window for uplink 15: ____________________________________________________________________XXXXXX______
Clock Delay: 30
08:27:46:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 1
08:27:46:setup_element:INFO: Scanning data phases
08:27:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:27:51:setup_element:INFO: Data phase scan results for group 0, downlink 1
08:27:51:setup_element:INFO: Eye window for uplink 0 : ______________XXXXXX____________________
Data delay found: 36
08:27:51:setup_element:INFO: Eye window for uplink 1 : ___________XXXXXX_______________________
Data delay found: 33
08:27:51:setup_element:INFO: Eye window for uplink 2 : ____________XXXXXX______________________
Data delay found: 34
08:27:51:setup_element:INFO: Eye window for uplink 3 : ____________XXXXX_______________________
Data delay found: 34
08:27:51:setup_element:INFO: Eye window for uplink 4 : _________XXXXX__________________________
Data delay found: 31
08:27:51:setup_element:INFO: Eye window for uplink 5 : ________XXXXXX__________________________
Data delay found: 30
08:27:51:setup_element:INFO: Eye window for uplink 6 : ___XXXXXX_______________________________
Data delay found: 25
08:27:51:setup_element:INFO: Eye window for uplink 7 : _XXXXXX_________________________________
Data delay found: 23
08:27:51:setup_element:INFO: Eye window for uplink 8 : ______________________________XXXXXX____
Data delay found: 12
08:27:51:setup_element:INFO: Eye window for uplink 9 : _________________________________XXXXX__
Data delay found: 15
08:27:51:setup_element:INFO: Eye window for uplink 10: ______________________________XXXXXX____
Data delay found: 12
08:27:51:setup_element:INFO: Eye window for uplink 11: _______________________________XXXXXX___
Data delay found: 13
08:27:51:setup_element:INFO: Eye window for uplink 12: ______________________________XXXXXX____
Data delay found: 12
08:27:51:setup_element:INFO: Eye window for uplink 13: ______________________________XXXXXX____
Data delay found: 12
08:27:51:setup_element:INFO: Eye window for uplink 14: _____________________________XXXXXXX____
Data delay found: 12
08:27:51:setup_element:INFO: Eye window for uplink 15: _____________________________XXXXXXXX___
Data delay found: 12
08:27:51:setup_element:INFO: Setting the data phase to 36 for uplink 0
08:27:51:setup_element:INFO: Setting the data phase to 33 for uplink 1
08:27:51:setup_element:INFO: Setting the data phase to 34 for uplink 2
08:27:51:setup_element:INFO: Setting the data phase to 34 for uplink 3
08:27:51:setup_element:INFO: Setting the data phase to 31 for uplink 4
08:27:51:setup_element:INFO: Setting the data phase to 30 for uplink 5
08:27:51:setup_element:INFO: Setting the data phase to 25 for uplink 6
08:27:51:setup_element:INFO: Setting the data phase to 23 for uplink 7
08:27:51:setup_element:INFO: Setting the data phase to 12 for uplink 8
08:27:51:setup_element:INFO: Setting the data phase to 15 for uplink 9
08:27:51:setup_element:INFO: Setting the data phase to 12 for uplink 10
08:27:51:setup_element:INFO: Setting the data phase to 13 for uplink 11
08:27:51:setup_element:INFO: Setting the data phase to 12 for uplink 12
08:27:51:setup_element:INFO: Setting the data phase to 12 for uplink 13
08:27:51:setup_element:INFO: Setting the data phase to 12 for uplink 14
08:27:51:setup_element:INFO: Setting the data phase to 12 for uplink 15
08:27:51:setup_element:INFO: Beginning SMX ASICs map scan
08:27:51:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:51:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:27:51:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:27:51:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:27:51:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
08:27:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
08:27:51:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
08:27:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
08:27:51:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
08:27:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
08:27:51:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
08:27:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
08:27:51:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
08:27:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
08:27:52:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
08:27:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
08:27:52:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
08:27:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
08:27:52:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
08:27:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
08:27:52:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
08:27:53:setup_element:INFO: Performing Elink synchronization
08:27:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:27:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
08:27:53:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
08:27:54:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
08:27:54:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
08:27:54:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
08:27:54:febtest:INFO: Init all SMX (CSA): 30
08:28:08:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:28:08:febtest:INFO: 01-00 | XA-000-09-004-029-009-027-01 | 37.7 | 1153.7
08:28:09:febtest:INFO: 08-01 | XA-000-09-004-029-015-025-04 | 28.2 | 1189.2
08:28:09:febtest:INFO: 03-02 | XA-000-09-004-029-006-025-05 | 37.7 | 1153.7
08:28:09:febtest:INFO: 10-03 | XA-000-09-004-029-006-024-05 | 50.4 | 1130.0
08:28:09:febtest:INFO: 05-04 | XA-000-09-004-029-009-025-01 | 25.1 | 1201.0
08:28:09:febtest:INFO: 12-05 | XA-000-09-004-029-009-024-01 | 37.7 | 1165.6
08:28:10:febtest:INFO: 07-06 | XA-000-09-004-029-012-025-10 | 25.1 | 1201.0
08:28:10:febtest:INFO: 14-07 | XA-000-09-004-029-012-024-10 | 28.2 | 1212.7
08:28:11:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
08:28:13:ST3_smx:INFO: chip: 1-0 37.726682 C 1165.571835 mV
08:28:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:13:ST3_smx:INFO: Electrons
08:28:13:ST3_smx:INFO: # loops 0
08:28:14:ST3_smx:INFO: # loops 1
08:28:16:ST3_smx:INFO: # loops 2
08:28:18:ST3_smx:INFO: Total # of broken channels: 0
08:28:18:ST3_smx:INFO: List of broken channels: []
08:28:18:ST3_smx:INFO: Total # of broken channels: 0
08:28:18:ST3_smx:INFO: List of broken channels: []
08:28:19:ST3_smx:INFO: chip: 8-1 31.389742 C 1195.082160 mV
08:28:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:19:ST3_smx:INFO: Electrons
08:28:19:ST3_smx:INFO: # loops 0
08:28:21:ST3_smx:INFO: # loops 1
08:28:23:ST3_smx:INFO: # loops 2
08:28:24:ST3_smx:INFO: Total # of broken channels: 0
08:28:24:ST3_smx:INFO: List of broken channels: []
08:28:24:ST3_smx:INFO: Total # of broken channels: 0
08:28:24:ST3_smx:INFO: List of broken channels: []
08:28:26:ST3_smx:INFO: chip: 3-2 37.726682 C 1165.571835 mV
08:28:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:26:ST3_smx:INFO: Electrons
08:28:26:ST3_smx:INFO: # loops 0
08:28:27:ST3_smx:INFO: # loops 1
08:28:29:ST3_smx:INFO: # loops 2
08:28:30:ST3_smx:INFO: Total # of broken channels: 0
08:28:30:ST3_smx:INFO: List of broken channels: []
08:28:30:ST3_smx:INFO: Total # of broken channels: 0
08:28:30:ST3_smx:INFO: List of broken channels: []
08:28:32:ST3_smx:INFO: chip: 10-3 50.430383 C 1141.874115 mV
08:28:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:32:ST3_smx:INFO: Electrons
08:28:32:ST3_smx:INFO: # loops 0
08:28:34:ST3_smx:INFO: # loops 1
08:28:35:ST3_smx:INFO: # loops 2
08:28:37:ST3_smx:INFO: Total # of broken channels: 0
08:28:37:ST3_smx:INFO: List of broken channels: []
08:28:37:ST3_smx:INFO: Total # of broken channels: 0
08:28:37:ST3_smx:INFO: List of broken channels: []
08:28:38:ST3_smx:INFO: chip: 5-4 28.225000 C 1212.728715 mV
08:28:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:38:ST3_smx:INFO: Electrons
08:28:38:ST3_smx:INFO: # loops 0
08:28:40:ST3_smx:INFO: # loops 1
08:28:41:ST3_smx:INFO: # loops 2
08:28:43:ST3_smx:INFO: Total # of broken channels: 0
08:28:43:ST3_smx:INFO: List of broken channels: []
08:28:43:ST3_smx:INFO: Total # of broken channels: 0
08:28:43:ST3_smx:INFO: List of broken channels: []
08:28:45:ST3_smx:INFO: chip: 12-5 40.898880 C 1177.390875 mV
08:28:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:45:ST3_smx:INFO: Electrons
08:28:45:ST3_smx:INFO: # loops 0
08:28:46:ST3_smx:INFO: # loops 1
08:28:48:ST3_smx:INFO: # loops 2
08:28:50:ST3_smx:INFO: Total # of broken channels: 0
08:28:50:ST3_smx:INFO: List of broken channels: []
08:28:50:ST3_smx:INFO: Total # of broken channels: 0
08:28:50:ST3_smx:INFO: List of broken channels: []
08:28:51:ST3_smx:INFO: chip: 7-6 28.225000 C 1212.728715 mV
08:28:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:51:ST3_smx:INFO: Electrons
08:28:51:ST3_smx:INFO: # loops 0
08:28:53:ST3_smx:INFO: # loops 1
08:28:54:ST3_smx:INFO: # loops 2
08:28:56:ST3_smx:INFO: Total # of broken channels: 0
08:28:56:ST3_smx:INFO: List of broken channels: []
08:28:56:ST3_smx:INFO: Total # of broken channels: 0
08:28:56:ST3_smx:INFO: List of broken channels: []
08:28:57:ST3_smx:INFO: chip: 14-7 28.225000 C 1236.187875 mV
08:28:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:28:57:ST3_smx:INFO: Electrons
08:28:57:ST3_smx:INFO: # loops 0
08:28:59:ST3_smx:INFO: # loops 1
08:29:01:ST3_smx:INFO: # loops 2
08:29:02:ST3_smx:INFO: Total # of broken channels: 0
08:29:02:ST3_smx:INFO: List of broken channels: []
08:29:02:ST3_smx:INFO: Total # of broken channels: 0
08:29:02:ST3_smx:INFO: List of broken channels: []
08:29:03:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:29:03:febtest:INFO: 01-00 | XA-000-09-004-029-009-027-01 | 40.9 | 1189.2
08:29:03:febtest:INFO: 08-01 | XA-000-09-004-029-015-025-04 | 34.6 | 1218.6
08:29:03:febtest:INFO: 03-02 | XA-000-09-004-029-006-025-05 | 40.9 | 1183.3
08:29:03:febtest:INFO: 10-03 | XA-000-09-004-029-006-024-05 | 53.6 | 1159.7
08:29:04:febtest:INFO: 05-04 | XA-000-09-004-029-009-025-01 | 28.2 | 1230.3
08:29:04:febtest:INFO: 12-05 | XA-000-09-004-029-009-024-01 | 40.9 | 1206.9
08:29:04:febtest:INFO: 07-06 | XA-000-09-004-029-012-025-10 | 28.2 | 1230.3
08:29:04:febtest:INFO: 14-07 | XA-000-09-004-029-012-024-10 | 28.2 | 1346.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_25-08_27_43
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3388| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.6910', '1.850', '2.2400', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0180', '1.850', '2.4010', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9660', '1.850', '0.5143', '0.000', '0.0000', '0.000', '0.0000']