FEB_4308 17.12.25 10:55:53
Info
10:55:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:55:53:ST3_Shared:INFO: FEB-Microcable
10:55:53:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:55:53:febtest:INFO: Testing FEB with SN 4308
10:55:55:smx_tester:INFO: Scanning setup
10:55:55:elinks:INFO: Disabling clock on downlink 0
10:55:55:elinks:INFO: Disabling clock on downlink 1
10:55:55:elinks:INFO: Disabling clock on downlink 2
10:55:55:elinks:INFO: Disabling clock on downlink 3
10:55:55:elinks:INFO: Disabling clock on downlink 4
10:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:55:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:55:55:elinks:INFO: Disabling clock on downlink 0
10:55:55:elinks:INFO: Disabling clock on downlink 1
10:55:55:elinks:INFO: Disabling clock on downlink 2
10:55:55:elinks:INFO: Disabling clock on downlink 3
10:55:55:elinks:INFO: Disabling clock on downlink 4
10:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:55:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:55:55:elinks:INFO: Disabling clock on downlink 0
10:55:55:elinks:INFO: Disabling clock on downlink 1
10:55:55:elinks:INFO: Disabling clock on downlink 2
10:55:55:elinks:INFO: Disabling clock on downlink 3
10:55:55:elinks:INFO: Disabling clock on downlink 4
10:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:55:55:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:55:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:55:55:elinks:INFO: Disabling clock on downlink 0
10:55:55:elinks:INFO: Disabling clock on downlink 1
10:55:55:elinks:INFO: Disabling clock on downlink 2
10:55:55:elinks:INFO: Disabling clock on downlink 3
10:55:55:elinks:INFO: Disabling clock on downlink 4
10:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:55:55:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:55:55:elinks:INFO: Disabling clock on downlink 0
10:55:55:elinks:INFO: Disabling clock on downlink 1
10:55:55:elinks:INFO: Disabling clock on downlink 2
10:55:55:elinks:INFO: Disabling clock on downlink 3
10:55:55:elinks:INFO: Disabling clock on downlink 4
10:55:55:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:55:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:55:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:55:56:setup_element:INFO: Scanning clock phase
10:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:55:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:55:56:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:55:56:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:55:56:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
10:55:56:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
10:55:56:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
10:55:56:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
10:55:56:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
10:55:56:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXX____
Clock Delay: 33
10:55:56:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXX____
Clock Delay: 33
10:55:56:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
10:55:56:setup_element:INFO: Scanning data phases
10:55:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:55:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:01:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:56:01:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
10:56:01:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
10:56:01:setup_element:INFO: Eye window for uplink 26: _______XXXXXX_________________XXXXXXXXXX
Data delay found: 21
10:56:01:setup_element:INFO: Eye window for uplink 27: ___________XXXXXX_____________XXXXXXXXXX
Data delay found: 23
10:56:01:setup_element:INFO: Eye window for uplink 28: ___________XXXXX________________________
Data delay found: 33
10:56:01:setup_element:INFO: Eye window for uplink 29: _____________XXXXXX_____________________
Data delay found: 35
10:56:01:setup_element:INFO: Eye window for uplink 30: _____________XXXXXXX____________________
Data delay found: 36
10:56:01:setup_element:INFO: Eye window for uplink 31: ______________XXXXX_____________________
Data delay found: 36
10:56:01:setup_element:INFO: Setting the data phase to 29 for uplink 24
10:56:01:setup_element:INFO: Setting the data phase to 32 for uplink 25
10:56:01:setup_element:INFO: Setting the data phase to 21 for uplink 26
10:56:01:setup_element:INFO: Setting the data phase to 23 for uplink 27
10:56:01:setup_element:INFO: Setting the data phase to 33 for uplink 28
10:56:01:setup_element:INFO: Setting the data phase to 35 for uplink 29
10:56:01:setup_element:INFO: Setting the data phase to 36 for uplink 30
10:56:01:setup_element:INFO: Setting the data phase to 36 for uplink 31
10:56:01:setup_element:INFO: Beginning SMX ASICs map scan
10:56:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:56:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:56:01:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
10:56:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:56:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:56:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:56:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:56:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:56:02:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:56:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:56:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:56:04:setup_element:INFO: Performing Elink synchronization
10:56:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:56:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:56:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:56:04:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:56:04:febtest:INFO: Init all SMX (CSA): 30
10:56:13:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:56:13:febtest:INFO: 30-01 | XA-000-09-004-026-010-020-05 | 37.7 | 1159.7
10:56:14:febtest:INFO: 28-03 | XA-000-09-004-026-007-020-02 | 44.1 | 1141.9
10:56:14:febtest:INFO: 26-05 | XA-000-09-004-026-004-020-12 | 44.1 | 1147.8
10:56:14:febtest:INFO: 24-07 | XA-000-09-004-026-016-020-06 | 18.7 | 1224.5
10:56:15:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:56:17:ST3_smx:INFO: chip: 30-1 37.726682 C 1171.483840 mV
10:56:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:17:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:17:ST3_smx:INFO: Electrons
10:56:17:ST3_smx:INFO: # loops 0
10:56:19:ST3_smx:INFO: # loops 1
10:56:21:ST3_smx:INFO: # loops 2
10:56:23:ST3_smx:INFO: Total # of broken channels: 0
10:56:23:ST3_smx:INFO: List of broken channels: []
10:56:23:ST3_smx:INFO: Total # of broken channels: 0
10:56:23:ST3_smx:INFO: List of broken channels: []
10:56:24:ST3_smx:INFO: chip: 28-3 47.250730 C 1147.806000 mV
10:56:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:24:ST3_smx:INFO: Electrons
10:56:24:ST3_smx:INFO: # loops 0
10:56:26:ST3_smx:INFO: # loops 1
10:56:28:ST3_smx:INFO: # loops 2
10:56:30:ST3_smx:INFO: Total # of broken channels: 0
10:56:30:ST3_smx:INFO: List of broken channels: []
10:56:30:ST3_smx:INFO: Total # of broken channels: 0
10:56:30:ST3_smx:INFO: List of broken channels: []
10:56:32:ST3_smx:INFO: chip: 26-5 47.250730 C 1159.654860 mV
10:56:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:32:ST3_smx:INFO: Electrons
10:56:32:ST3_smx:INFO: # loops 0
10:56:34:ST3_smx:INFO: # loops 1
10:56:36:ST3_smx:INFO: # loops 2
10:56:38:ST3_smx:INFO: Total # of broken channels: 0
10:56:38:ST3_smx:INFO: List of broken channels: []
10:56:38:ST3_smx:INFO: Total # of broken channels: 0
10:56:38:ST3_smx:INFO: List of broken channels: []
10:56:39:ST3_smx:INFO: chip: 24-7 25.062742 C 1230.330540 mV
10:56:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:56:39:ST3_smx:INFO: Electrons
10:56:39:ST3_smx:INFO: # loops 0
10:56:41:ST3_smx:INFO: # loops 1
10:56:43:ST3_smx:INFO: # loops 2
10:56:45:ST3_smx:INFO: Total # of broken channels: 0
10:56:45:ST3_smx:INFO: List of broken channels: []
10:56:45:ST3_smx:INFO: Total # of broken channels: 0
10:56:45:ST3_smx:INFO: List of broken channels: []
10:56:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:56:45:febtest:INFO: 30-01 | XA-000-09-004-026-010-020-05 | 37.7 | 1195.1
10:56:46:febtest:INFO: 28-03 | XA-000-09-004-026-007-020-02 | 47.3 | 1177.4
10:56:46:febtest:INFO: 26-05 | XA-000-09-004-026-004-020-12 | 50.4 | 1183.3
10:56:46:febtest:INFO: 24-07 | XA-000-09-004-026-016-020-06 | 28.2 | 1253.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_12_17-10_55_53
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4308| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7313', '1.850', '1.6570']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0130', '1.850', '1.3000']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0020', '1.850', '0.2683']