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FEB_4310 15.12.25 10:56:50
Info
10:56:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:50:ST3_Shared:INFO: FEB-Microcable
10:56:50:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
10:56:50:febtest:INFO: Testing FEB with SN 4310
10:56:52:smx_tester:INFO: Scanning setup
10:56:52:elinks:INFO: Disabling clock on downlink 0
10:56:52:elinks:INFO: Disabling clock on downlink 1
10:56:52:elinks:INFO: Disabling clock on downlink 2
10:56:52:elinks:INFO: Disabling clock on downlink 3
10:56:52:elinks:INFO: Disabling clock on downlink 4
10:56:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
10:56:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:52:elinks:INFO: Disabling clock on downlink 0
10:56:52:elinks:INFO: Disabling clock on downlink 1
10:56:52:elinks:INFO: Disabling clock on downlink 2
10:56:52:elinks:INFO: Disabling clock on downlink 3
10:56:52:elinks:INFO: Disabling clock on downlink 4
10:56:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
10:56:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:52:elinks:INFO: Disabling clock on downlink 0
10:56:52:elinks:INFO: Disabling clock on downlink 1
10:56:52:elinks:INFO: Disabling clock on downlink 2
10:56:52:elinks:INFO: Disabling clock on downlink 3
10:56:52:elinks:INFO: Disabling clock on downlink 4
10:56:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
10:56:52:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
10:56:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:52:elinks:INFO: Disabling clock on downlink 0
10:56:52:elinks:INFO: Disabling clock on downlink 1
10:56:52:elinks:INFO: Disabling clock on downlink 2
10:56:52:elinks:INFO: Disabling clock on downlink 3
10:56:52:elinks:INFO: Disabling clock on downlink 4
10:56:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
10:56:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:52:elinks:INFO: Disabling clock on downlink 0
10:56:52:elinks:INFO: Disabling clock on downlink 1
10:56:52:elinks:INFO: Disabling clock on downlink 2
10:56:52:elinks:INFO: Disabling clock on downlink 3
10:56:52:elinks:INFO: Disabling clock on downlink 4
10:56:52:setup_element:INFO: Checking SOS, encoding_mode: SOS
10:56:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
10:56:52:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
10:56:52:setup_element:INFO: Scanning clock phase
10:56:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:53:setup_element:INFO: Clock phase scan results for group 0, downlink 2
10:56:53:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:56:53:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
10:56:53:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________________
Clock Delay: 40
10:56:53:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________________
Clock Delay: 40
10:56:53:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:56:53:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:56:53:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:56:53:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXX____
Clock Delay: 33
10:56:53:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:56:53:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXX_____
Clock Delay: 32
10:56:53:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:56:53:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
10:56:53:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________________
Clock Delay: 40
10:56:53:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________________
Clock Delay: 40
10:56:53:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________________XXXXX
Clock Delay: 37
10:56:53:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________________XXXXX
Clock Delay: 37
10:56:53:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
10:56:53:setup_element:INFO: Scanning data phases
10:56:53:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:53:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:58:setup_element:INFO: Data phase scan results for group 0, downlink 2
10:56:58:setup_element:INFO: Eye window for uplink 16: _________________________________XXXXXX_
Data delay found: 15
10:56:58:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXX___
Data delay found: 14
10:56:58:setup_element:INFO: Eye window for uplink 18: _________________________________XXXX___
Data delay found: 14
10:56:58:setup_element:INFO: Eye window for uplink 19: _______________________________XXXX_____
Data delay found: 12
10:56:58:setup_element:INFO: Eye window for uplink 20: _______________________________XXXX_____
Data delay found: 12
10:56:58:setup_element:INFO: Eye window for uplink 21: ______________________________XXXXX_____
Data delay found: 12
10:56:58:setup_element:INFO: Eye window for uplink 22: ________________________________XXXX____
Data delay found: 13
10:56:58:setup_element:INFO: Eye window for uplink 23: _____________________________XXX________
Data delay found: 10
10:56:58:setup_element:INFO: Eye window for uplink 24: __XXXXXX________________________________
Data delay found: 24
10:56:58:setup_element:INFO: Eye window for uplink 25: _____XXXX_______________________________
Data delay found: 26
10:56:58:setup_element:INFO: Eye window for uplink 26: __XXXXXX________________________________
Data delay found: 24
10:56:58:setup_element:INFO: Eye window for uplink 27: ______XXXXXX____________________________
Data delay found: 28
10:56:58:setup_element:INFO: Eye window for uplink 28: ________XXXXXX__________________________
Data delay found: 30
10:56:58:setup_element:INFO: Eye window for uplink 29: __________XXXXXX________________________
Data delay found: 32
10:56:58:setup_element:INFO: Eye window for uplink 30: ________________XXXXXX__________________
Data delay found: 38
10:56:58:setup_element:INFO: Eye window for uplink 31: _________________XXXXX__________________
Data delay found: 39
10:56:58:setup_element:INFO: Setting the data phase to 15 for uplink 16
10:56:58:setup_element:INFO: Setting the data phase to 14 for uplink 17
10:56:58:setup_element:INFO: Setting the data phase to 14 for uplink 18
10:56:58:setup_element:INFO: Setting the data phase to 12 for uplink 19
10:56:58:setup_element:INFO: Setting the data phase to 12 for uplink 20
10:56:58:setup_element:INFO: Setting the data phase to 12 for uplink 21
10:56:58:setup_element:INFO: Setting the data phase to 13 for uplink 22
10:56:58:setup_element:INFO: Setting the data phase to 10 for uplink 23
10:56:58:setup_element:INFO: Setting the data phase to 24 for uplink 24
10:56:58:setup_element:INFO: Setting the data phase to 26 for uplink 25
10:56:58:setup_element:INFO: Setting the data phase to 24 for uplink 26
10:56:58:setup_element:INFO: Setting the data phase to 28 for uplink 27
10:56:58:setup_element:INFO: Setting the data phase to 30 for uplink 28
10:56:58:setup_element:INFO: Setting the data phase to 32 for uplink 29
10:56:58:setup_element:INFO: Setting the data phase to 38 for uplink 30
10:56:58:setup_element:INFO: Setting the data phase to 39 for uplink 31
10:56:58:setup_element:INFO: Beginning SMX ASICs map scan
10:56:58:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:56:58:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:56:58:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:56:58:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:56:58:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
10:56:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
10:56:58:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
10:56:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
10:56:58:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
10:56:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
10:56:58:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
10:56:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
10:56:59:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
10:56:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
10:56:59:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
10:56:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
10:56:59:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
10:56:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
10:56:59:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
10:56:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
10:56:59:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
10:57:01:setup_element:INFO: Performing Elink synchronization
10:57:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
10:57:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
10:57:01:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
10:57:01:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
10:57:01:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
10:57:01:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
10:57:02:febtest:INFO: Init all SMX (CSA): 30
10:57:18:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:57:18:febtest:INFO: 23-00 | XA-000-09-004-026-009-021-11 | 50.4 | 1141.9
10:57:18:febtest:INFO: 30-01 | XA-000-09-004-026-003-008-03 | 50.4 | 1118.1
10:57:19:febtest:INFO: 21-02 | XA-000-09-004-026-012-021-00 | 50.4 | 1159.7
10:57:19:febtest:INFO: 28-03 | XA-000-09-004-026-012-009-07 | 37.7 | 1189.2
10:57:19:febtest:INFO: 19-04 | XA-000-09-004-026-015-021-14 | 44.1 | 1183.3
10:57:19:febtest:INFO: 26-05 | XA-000-09-004-026-009-009-12 | 37.7 | 1189.2
10:57:19:febtest:INFO: 17-06 | XA-000-09-004-026-003-021-04 | 66.4 | 1100.2
10:57:20:febtest:INFO: 24-07 | XA-000-09-004-026-006-021-15 | 47.3 | 1165.6
10:57:21:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
10:57:23:ST3_smx:INFO: chip: 23-0 50.430383 C 1153.732915 mV
10:57:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:23:ST3_smx:INFO: Electrons
10:57:23:ST3_smx:INFO: # loops 0
10:57:25:ST3_smx:INFO: # loops 1
10:57:27:ST3_smx:INFO: # loops 2
10:57:29:ST3_smx:INFO: Total # of broken channels: 0
10:57:29:ST3_smx:INFO: List of broken channels: []
10:57:29:ST3_smx:INFO: Total # of broken channels: 0
10:57:29:ST3_smx:INFO: List of broken channels: []
10:57:31:ST3_smx:INFO: chip: 30-1 50.430383 C 1135.937260 mV
10:57:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:31:ST3_smx:INFO: Electrons
10:57:31:ST3_smx:INFO: # loops 0
10:57:33:ST3_smx:INFO: # loops 1
10:57:35:ST3_smx:INFO: # loops 2
10:57:37:ST3_smx:INFO: Total # of broken channels: 0
10:57:37:ST3_smx:INFO: List of broken channels: []
10:57:37:ST3_smx:INFO: Total # of broken channels: 0
10:57:37:ST3_smx:INFO: List of broken channels: []
10:57:39:ST3_smx:INFO: chip: 21-2 50.430383 C 1171.483840 mV
10:57:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:39:ST3_smx:INFO: Electrons
10:57:39:ST3_smx:INFO: # loops 0
10:57:41:ST3_smx:INFO: # loops 1
10:57:43:ST3_smx:INFO: # loops 2
10:57:45:ST3_smx:INFO: Total # of broken channels: 0
10:57:45:ST3_smx:INFO: List of broken channels: []
10:57:45:ST3_smx:INFO: Total # of broken channels: 0
10:57:45:ST3_smx:INFO: List of broken channels: []
10:57:47:ST3_smx:INFO: chip: 28-3 37.726682 C 1206.851500 mV
10:57:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:47:ST3_smx:INFO: Electrons
10:57:47:ST3_smx:INFO: # loops 0
10:57:49:ST3_smx:INFO: # loops 1
10:57:51:ST3_smx:INFO: # loops 2
10:57:53:ST3_smx:INFO: Total # of broken channels: 0
10:57:53:ST3_smx:INFO: List of broken channels: []
10:57:53:ST3_smx:INFO: Total # of broken channels: 0
10:57:53:ST3_smx:INFO: List of broken channels: []
10:57:55:ST3_smx:INFO: chip: 19-4 47.250730 C 1195.082160 mV
10:57:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:57:55:ST3_smx:INFO: Electrons
10:57:55:ST3_smx:INFO: # loops 0
10:57:57:ST3_smx:INFO: # loops 1
10:57:59:ST3_smx:INFO: # loops 2
10:58:01:ST3_smx:INFO: Total # of broken channels: 0
10:58:01:ST3_smx:INFO: List of broken channels: []
10:58:01:ST3_smx:INFO: Total # of broken channels: 0
10:58:01:ST3_smx:INFO: List of broken channels: []
10:58:02:ST3_smx:INFO: chip: 26-5 37.726682 C 1200.969315 mV
10:58:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:02:ST3_smx:INFO: Electrons
10:58:02:ST3_smx:INFO: # loops 0
10:58:04:ST3_smx:INFO: # loops 1
10:58:06:ST3_smx:INFO: # loops 2
10:58:08:ST3_smx:INFO: Total # of broken channels: 0
10:58:08:ST3_smx:INFO: List of broken channels: []
10:58:08:ST3_smx:INFO: Total # of broken channels: 0
10:58:08:ST3_smx:INFO: List of broken channels: []
10:58:10:ST3_smx:INFO: chip: 17-6 69.560482 C 1118.096875 mV
10:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:10:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:10:ST3_smx:INFO: Electrons
10:58:10:ST3_smx:INFO: # loops 0
10:58:12:ST3_smx:INFO: # loops 1
10:58:14:ST3_smx:INFO: # loops 2
10:58:16:ST3_smx:INFO: Total # of broken channels: 0
10:58:16:ST3_smx:INFO: List of broken channels: []
10:58:16:ST3_smx:INFO: Total # of broken channels: 0
10:58:16:ST3_smx:INFO: List of broken channels: []
10:58:18:ST3_smx:INFO: chip: 24-7 50.430383 C 1177.390875 mV
10:58:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:18:ST3_discr_histo:WARNING: Not enough entries for fit!!!
10:58:18:ST3_smx:INFO: Electrons
10:58:18:ST3_smx:INFO: # loops 0
10:58:20:ST3_smx:INFO: # loops 1
10:58:22:ST3_smx:INFO: # loops 2
10:58:24:ST3_smx:INFO: Total # of broken channels: 0
10:58:24:ST3_smx:INFO: List of broken channels: []
10:58:24:ST3_smx:INFO: Total # of broken channels: 0
10:58:24:ST3_smx:INFO: List of broken channels: []
10:58:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
10:58:25:febtest:INFO: 23-00 | XA-000-09-004-026-009-021-11 | 53.6 | 1177.4
10:58:25:febtest:INFO: 30-01 | XA-000-09-004-026-003-008-03 | 50.4 | 1153.7
10:58:25:febtest:INFO: 21-02 | XA-000-09-004-026-012-021-00 | 53.6 | 1195.1
10:58:25:febtest:INFO: 28-03 | XA-000-09-004-026-012-009-07 | 37.7 | 1242.0
10:58:26:febtest:INFO: 19-04 | XA-000-09-004-026-015-021-14 | 47.3 | 1218.6
10:58:26:febtest:INFO: 26-05 | XA-000-09-004-026-009-009-12 | 40.9 | 1224.5
10:58:26:febtest:INFO: 17-06 | XA-000-09-004-026-003-021-04 | 69.6 | 1135.9
10:58:26:febtest:INFO: 24-07 | XA-000-09-004-026-006-021-15 | 53.6 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 25_12_15-10_56_50
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4310| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5290', '1.851', '2.6000']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0310', '1.850', '2.5920']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0030', '1.850', '0.5286']