DTL-STS tests database

FEB_4330 29.01.26 12:13:21

link: XA-000-09-004-023-012-023-12
...SMX_0.root
link: XA-000-09-004-017-011-006-01
...SMX_2.root
link: XA-000-09-004-023-006-023-03
...SMX_4.root
link: XA-000-09-004-023-003-022-08
...SMX_6.root
link: XA-000-09-004-023-015-022-02
...SMX_1.root
link: XA-000-09-004-023-012-022-12
...SMX_3.root
link: XA-000-09-004-023-009-022-07
...SMX_5.root
link: XA-000-09-004-023-006-022-03
...SMX_7.root
link: XA-000-09-004-023-006-022-03
...VddmCSAstatus.root
Info
            12:13:21:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:13:21:ST3_Shared:INFO:	                       FEB-Microcable                       
12:13:21:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:13:21:febtest:INFO:	Testing FEB with SN 4330
12:13:23:smx_tester:INFO:	Scanning setup
12:13:23:elinks:INFO:	Disabling clock on downlink 0
12:13:23:elinks:INFO:	Disabling clock on downlink 1
12:13:23:elinks:INFO:	Disabling clock on downlink 2
12:13:23:elinks:INFO:	Disabling clock on downlink 3
12:13:23:elinks:INFO:	Disabling clock on downlink 4
12:13:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:13:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:13:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:13:23:elinks:INFO:	Disabling clock on downlink 0
12:13:23:elinks:INFO:	Disabling clock on downlink 1
12:13:23:elinks:INFO:	Disabling clock on downlink 2
12:13:23:elinks:INFO:	Disabling clock on downlink 3
12:13:23:elinks:INFO:	Disabling clock on downlink 4
12:13:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:13:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:13:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:13:23:elinks:INFO:	Disabling clock on downlink 0
12:13:23:elinks:INFO:	Disabling clock on downlink 1
12:13:23:elinks:INFO:	Disabling clock on downlink 2
12:13:23:elinks:INFO:	Disabling clock on downlink 3
12:13:23:elinks:INFO:	Disabling clock on downlink 4
12:13:23:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:13:23:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:13:23:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:13:23:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:13:23:elinks:INFO:	Disabling clock on downlink 0
12:13:23:elinks:INFO:	Disabling clock on downlink 1
12:13:23:elinks:INFO:	Disabling clock on downlink 2
12:13:23:elinks:INFO:	Disabling clock on downlink 3
12:13:23:elinks:INFO:	Disabling clock on downlink 4
12:13:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:13:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:13:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:13:24:elinks:INFO:	Disabling clock on downlink 0
12:13:24:elinks:INFO:	Disabling clock on downlink 1
12:13:24:elinks:INFO:	Disabling clock on downlink 2
12:13:24:elinks:INFO:	Disabling clock on downlink 3
12:13:24:elinks:INFO:	Disabling clock on downlink 4
12:13:24:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:13:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:13:24:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:13:24:setup_element:INFO:	Scanning clock phase
12:13:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:13:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:13:24:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:13:24:setup_element:INFO:	Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:13:24:setup_element:INFO:	Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
12:13:24:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:13:24:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:13:24:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:13:24:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:13:24:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:13:24:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:13:24:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:13:24:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:13:24:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:13:24:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:13:24:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:13:24:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:13:24:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:13:24:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________________XXXXXX_
Clock Delay: 35
12:13:24:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
12:13:24:setup_element:INFO:	Scanning data phases
12:13:24:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:13:24:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:13:29:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:13:29:setup_element:INFO:	Eye window for uplink 16: _XXXXX__________________________________
Data delay found: 23
12:13:29:setup_element:INFO:	Eye window for uplink 17: XXXXX__________________________________X
Data delay found: 21
12:13:29:setup_element:INFO:	Eye window for uplink 18: XXXX__________________________________XX
Data delay found: 20
12:13:29:setup_element:INFO:	Eye window for uplink 19: XXXX__________________________________XX
Data delay found: 20
12:13:29:setup_element:INFO:	Eye window for uplink 20: X__________________________________XXXXX
Data delay found: 17
12:13:29:setup_element:INFO:	Eye window for uplink 21: XXX__________________________________XXX
Data delay found: 19
12:13:29:setup_element:INFO:	Eye window for uplink 22: XXXX__________________________________XX
Data delay found: 20
12:13:29:setup_element:INFO:	Eye window for uplink 23: X__________________________________XXXXX
Data delay found: 17
12:13:29:setup_element:INFO:	Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
12:13:29:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
12:13:29:setup_element:INFO:	Eye window for uplink 26: _________XXXXXXX________________________
Data delay found: 32
12:13:29:setup_element:INFO:	Eye window for uplink 27: ___________XXXXXXXX_____________________
Data delay found: 34
12:13:29:setup_element:INFO:	Eye window for uplink 28: ________________XXXXXX__________________
Data delay found: 38
12:13:29:setup_element:INFO:	Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
12:13:29:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXXXXX______________
Data delay found: 1
12:13:29:setup_element:INFO:	Eye window for uplink 31: ________________XXXXXXX_________________
Data delay found: 39
12:13:29:setup_element:INFO:	Setting the data phase to 23 for uplink 16
12:13:29:setup_element:INFO:	Setting the data phase to 21 for uplink 17
12:13:29:setup_element:INFO:	Setting the data phase to 20 for uplink 18
12:13:29:setup_element:INFO:	Setting the data phase to 20 for uplink 19
12:13:29:setup_element:INFO:	Setting the data phase to 17 for uplink 20
12:13:29:setup_element:INFO:	Setting the data phase to 19 for uplink 21
12:13:29:setup_element:INFO:	Setting the data phase to 20 for uplink 22
12:13:29:setup_element:INFO:	Setting the data phase to 17 for uplink 23
12:13:29:setup_element:INFO:	Setting the data phase to 30 for uplink 24
12:13:29:setup_element:INFO:	Setting the data phase to 32 for uplink 25
12:13:29:setup_element:INFO:	Setting the data phase to 32 for uplink 26
12:13:29:setup_element:INFO:	Setting the data phase to 34 for uplink 27
12:13:29:setup_element:INFO:	Setting the data phase to 38 for uplink 28
12:13:29:setup_element:INFO:	Setting the data phase to 38 for uplink 29
12:13:29:setup_element:INFO:	Setting the data phase to 1 for uplink 30
12:13:29:setup_element:INFO:	Setting the data phase to 39 for uplink 31
12:13:29:setup_element:INFO:	Beginning SMX ASICs map scan
12:13:29:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:13:29:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:13:29:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:13:29:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:13:29:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:13:29:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:13:29:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:13:30:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:13:30:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:13:30:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:13:30:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:13:30:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:13:30:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:13:30:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:13:30:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:13:30:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:13:30:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:13:31:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:13:31:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:13:31:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:13:31:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:13:32:setup_element:INFO:	Performing Elink synchronization
12:13:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:13:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:13:32:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:13:32:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:13:32:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:13:32:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:13:33:febtest:INFO:	Init all SMX (CSA): 30
12:13:49:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:13:49:febtest:INFO:	23-00 | XA-000-09-004-023-012-023-12 |  28.2 | 1171.5
12:13:49:febtest:INFO:	30-01 | XA-000-09-004-023-015-022-02 |  21.9 | 1195.1
12:13:49:febtest:INFO:	21-02 | XA-000-09-004-017-011-006-01 |  31.4 | 1177.4
12:13:50:febtest:INFO:	28-03 | XA-000-09-004-023-012-022-12 |  28.2 | 1183.3
12:13:50:febtest:INFO:	19-04 | XA-000-09-004-023-006-023-03 |  44.1 | 1130.0
12:13:50:febtest:INFO:	26-05 | XA-000-09-004-023-009-022-07 |  31.4 | 1171.5
12:13:50:febtest:INFO:	17-06 | XA-000-09-004-023-003-022-08 |  31.4 | 1171.5
12:13:50:febtest:INFO:	24-07 | XA-000-09-004-023-006-022-03 |  34.6 | 1165.6
12:13:51:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:13:53:ST3_smx:INFO:	chip: 23-0 	 31.389742 C 	 1183.292940 mV
12:13:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:13:53:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:13:53:ST3_smx:INFO:		Electrons
12:13:53:ST3_smx:INFO:	# loops 0
12:13:55:ST3_smx:INFO:	# loops 1
12:13:57:ST3_smx:INFO:	# loops 2
12:13:59:ST3_smx:INFO:	Total # of broken channels: 0
12:13:59:ST3_smx:INFO:	List of broken channels: []
12:13:59:ST3_smx:INFO:	Total # of broken channels: 2
12:13:59:ST3_smx:INFO:	List of broken channels: [51, 107]
12:14:00:ST3_smx:INFO:	chip: 30-1 	 25.062742 C 	 1212.728715 mV
12:14:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:00:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:00:ST3_smx:INFO:		Electrons
12:14:00:ST3_smx:INFO:	# loops 0
12:14:02:ST3_smx:INFO:	# loops 1
12:14:04:ST3_smx:INFO:	# loops 2
12:14:05:ST3_smx:INFO:	Total # of broken channels: 0
12:14:05:ST3_smx:INFO:	List of broken channels: []
12:14:05:ST3_smx:INFO:	Total # of broken channels: 1
12:14:05:ST3_smx:INFO:	List of broken channels: [73]
12:14:07:ST3_smx:INFO:	chip: 21-2 	 31.389742 C 	 1195.082160 mV
12:14:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:07:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:07:ST3_smx:INFO:		Electrons
12:14:07:ST3_smx:INFO:	# loops 0
12:14:08:ST3_smx:INFO:	# loops 1
12:14:10:ST3_smx:INFO:	# loops 2
12:14:12:ST3_smx:INFO:	Total # of broken channels: 0
12:14:12:ST3_smx:INFO:	List of broken channels: []
12:14:12:ST3_smx:INFO:	Total # of broken channels: 0
12:14:12:ST3_smx:INFO:	List of broken channels: []
12:14:13:ST3_smx:INFO:	chip: 28-3 	 28.225000 C 	 1200.969315 mV
12:14:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:13:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:13:ST3_smx:INFO:		Electrons
12:14:13:ST3_smx:INFO:	# loops 0
12:14:15:ST3_smx:INFO:	# loops 1
12:14:17:ST3_smx:INFO:	# loops 2
12:14:18:ST3_smx:INFO:	Total # of broken channels: 0
12:14:18:ST3_smx:INFO:	List of broken channels: []
12:14:18:ST3_smx:INFO:	Total # of broken channels: 4
12:14:18:ST3_smx:INFO:	List of broken channels: [47, 53, 77, 105]
12:14:20:ST3_smx:INFO:	chip: 19-4 	 47.250730 C 	 1141.874115 mV
12:14:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:20:ST3_smx:INFO:		Electrons
12:14:20:ST3_smx:INFO:	# loops 0
12:14:22:ST3_smx:INFO:	# loops 1
12:14:23:ST3_smx:INFO:	# loops 2
12:14:25:ST3_smx:INFO:	Total # of broken channels: 0
12:14:25:ST3_smx:INFO:	List of broken channels: []
12:14:25:ST3_smx:INFO:	Total # of broken channels: 0
12:14:25:ST3_smx:INFO:	List of broken channels: []
12:14:26:ST3_smx:INFO:	chip: 26-5 	 34.556970 C 	 1189.190035 mV
12:14:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:26:ST3_smx:INFO:		Electrons
12:14:26:ST3_smx:INFO:	# loops 0
12:14:28:ST3_smx:INFO:	# loops 1
12:14:29:ST3_smx:INFO:	# loops 2
12:14:31:ST3_smx:INFO:	Total # of broken channels: 0
12:14:31:ST3_smx:INFO:	List of broken channels: []
12:14:31:ST3_smx:INFO:	Total # of broken channels: 0
12:14:31:ST3_smx:INFO:	List of broken channels: []
12:14:33:ST3_smx:INFO:	chip: 17-6 	 34.556970 C 	 1183.292940 mV
12:14:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:33:ST3_smx:INFO:		Electrons
12:14:33:ST3_smx:INFO:	# loops 0
12:14:34:ST3_smx:INFO:	# loops 1
12:14:36:ST3_smx:INFO:	# loops 2
12:14:37:ST3_smx:INFO:	Total # of broken channels: 0
12:14:37:ST3_smx:INFO:	List of broken channels: []
12:14:37:ST3_smx:INFO:	Total # of broken channels: 0
12:14:37:ST3_smx:INFO:	List of broken channels: []
12:14:39:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1177.390875 mV
12:14:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:14:39:ST3_smx:INFO:		Electrons
12:14:39:ST3_smx:INFO:	# loops 0
12:14:41:ST3_smx:INFO:	# loops 1
12:14:42:ST3_smx:INFO:	# loops 2
12:14:44:ST3_smx:INFO:	Total # of broken channels: 0
12:14:44:ST3_smx:INFO:	List of broken channels: []
12:14:44:ST3_smx:INFO:	Total # of broken channels: 0
12:14:44:ST3_smx:INFO:	List of broken channels: []
12:14:44:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:14:44:febtest:INFO:	23-00 | XA-000-09-004-023-012-023-12 |  31.4 | 1206.9
12:14:44:febtest:INFO:	30-01 | XA-000-09-004-023-015-022-02 |  25.1 | 1236.2
12:14:45:febtest:INFO:	21-02 | XA-000-09-004-017-011-006-01 |  34.6 | 1218.6
12:14:45:febtest:INFO:	28-03 | XA-000-09-004-023-012-022-12 |  31.4 | 1218.6
12:14:45:febtest:INFO:	19-04 | XA-000-09-004-023-006-023-03 |  47.3 | 1165.6
12:14:45:febtest:INFO:	26-05 | XA-000-09-004-023-009-022-07 |  34.6 | 1212.7
12:14:45:febtest:INFO:	17-06 | XA-000-09-004-023-003-022-08 |  34.6 | 1206.9
12:14:46:febtest:INFO:	24-07 | XA-000-09-004-023-006-022-03 |  37.7 | 1201.0
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_01_29-12_13_21
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4330| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4690', '1.850', '2.8620']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0000', '1.850', '2.5970']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9680', '1.850', '0.5247']
Comment