FEB_4336 29.01.26 08:54:09
Info
08:54:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:09:ST3_Shared:INFO: FEB-Microcable
08:54:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:54:09:febtest:INFO: Testing FEB with SN 4336
08:54:10:smx_tester:INFO: Scanning setup
08:54:10:elinks:INFO: Disabling clock on downlink 0
08:54:10:elinks:INFO: Disabling clock on downlink 1
08:54:10:elinks:INFO: Disabling clock on downlink 2
08:54:10:elinks:INFO: Disabling clock on downlink 3
08:54:10:elinks:INFO: Disabling clock on downlink 4
08:54:10:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:54:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:11:elinks:INFO: Disabling clock on downlink 0
08:54:11:elinks:INFO: Disabling clock on downlink 1
08:54:11:elinks:INFO: Disabling clock on downlink 2
08:54:11:elinks:INFO: Disabling clock on downlink 3
08:54:11:elinks:INFO: Disabling clock on downlink 4
08:54:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:54:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:11:elinks:INFO: Disabling clock on downlink 0
08:54:11:elinks:INFO: Disabling clock on downlink 1
08:54:11:elinks:INFO: Disabling clock on downlink 2
08:54:11:elinks:INFO: Disabling clock on downlink 3
08:54:11:elinks:INFO: Disabling clock on downlink 4
08:54:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:54:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:54:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:54:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:54:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:54:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:54:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:54:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:54:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:11:elinks:INFO: Disabling clock on downlink 0
08:54:11:elinks:INFO: Disabling clock on downlink 1
08:54:11:elinks:INFO: Disabling clock on downlink 2
08:54:11:elinks:INFO: Disabling clock on downlink 3
08:54:11:elinks:INFO: Disabling clock on downlink 4
08:54:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:54:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:11:elinks:INFO: Disabling clock on downlink 0
08:54:11:elinks:INFO: Disabling clock on downlink 1
08:54:11:elinks:INFO: Disabling clock on downlink 2
08:54:11:elinks:INFO: Disabling clock on downlink 3
08:54:11:elinks:INFO: Disabling clock on downlink 4
08:54:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:54:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:54:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:54:11:setup_element:INFO: Scanning clock phase
08:54:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:11:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:11:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:54:11:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:54:11:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:54:11:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:54:11:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:54:11:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:54:11:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:54:11:setup_element:INFO: Eye window for uplink 30: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:54:11:setup_element:INFO: Eye window for uplink 31: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:54:11:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
08:54:11:setup_element:INFO: Scanning data phases
08:54:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:16:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:54:16:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
08:54:16:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
08:54:16:setup_element:INFO: Eye window for uplink 26: ____________XXXXXX______________________
Data delay found: 34
08:54:16:setup_element:INFO: Eye window for uplink 27: ______________XXXXXXXX__________________
Data delay found: 37
08:54:16:setup_element:INFO: Eye window for uplink 28: __________________XXXXX_________________
Data delay found: 0
08:54:16:setup_element:INFO: Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
08:54:16:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXXX______________
Data delay found: 2
08:54:16:setup_element:INFO: Eye window for uplink 31: __________________XXXXX_________________
Data delay found: 0
08:54:16:setup_element:INFO: Setting the data phase to 31 for uplink 24
08:54:16:setup_element:INFO: Setting the data phase to 32 for uplink 25
08:54:16:setup_element:INFO: Setting the data phase to 34 for uplink 26
08:54:16:setup_element:INFO: Setting the data phase to 37 for uplink 27
08:54:16:setup_element:INFO: Setting the data phase to 0 for uplink 28
08:54:17:setup_element:INFO: Setting the data phase to 39 for uplink 29
08:54:17:setup_element:INFO: Setting the data phase to 2 for uplink 30
08:54:17:setup_element:INFO: Setting the data phase to 0 for uplink 31
08:54:17:setup_element:INFO: Beginning SMX ASICs map scan
08:54:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:54:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:54:17:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:54:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:54:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:54:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:54:17:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:54:17:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:54:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:54:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:54:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:54:19:setup_element:INFO: Performing Elink synchronization
08:54:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:54:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:54:19:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:54:19:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:54:19:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:54:19:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:54:20:febtest:INFO: Init all SMX (CSA): 30
08:54:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:27:febtest:INFO: 30-01 | XA-000-09-004-023-016-017-10 | 18.7 | 1212.7
08:54:27:febtest:INFO: 28-03 | XA-000-09-004-023-013-017-01 | 28.2 | 1183.3
08:54:28:febtest:INFO: 26-05 | XA-000-09-004-023-010-017-09 | 44.1 | 1130.0
08:54:28:febtest:INFO: 24-07 | XA-000-09-004-023-007-018-14 | 44.1 | 1130.0
08:54:29:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:54:31:ST3_smx:INFO: chip: 30-1 18.745682 C 1230.330540 mV
08:54:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:31:ST3_smx:INFO: Electrons
08:54:31:ST3_smx:INFO: # loops 0
08:54:32:ST3_smx:INFO: # loops 1
08:54:34:ST3_smx:INFO: # loops 2
08:54:36:ST3_smx:INFO: Total # of broken channels: 0
08:54:36:ST3_smx:INFO: List of broken channels: []
08:54:36:ST3_smx:INFO: Total # of broken channels: 0
08:54:36:ST3_smx:INFO: List of broken channels: []
08:54:37:ST3_smx:INFO: chip: 28-3 31.389742 C 1195.082160 mV
08:54:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:37:ST3_smx:INFO: Electrons
08:54:37:ST3_smx:INFO: # loops 0
08:54:39:ST3_smx:INFO: # loops 1
08:54:40:ST3_smx:INFO: # loops 2
08:54:42:ST3_smx:INFO: Total # of broken channels: 0
08:54:42:ST3_smx:INFO: List of broken channels: []
08:54:42:ST3_smx:INFO: Total # of broken channels: 0
08:54:42:ST3_smx:INFO: List of broken channels: []
08:54:44:ST3_smx:INFO: chip: 26-5 47.250730 C 1141.874115 mV
08:54:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:44:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:44:ST3_smx:INFO: Electrons
08:54:44:ST3_smx:INFO: # loops 0
08:54:45:ST3_smx:INFO: # loops 1
08:54:47:ST3_smx:INFO: # loops 2
08:54:48:ST3_smx:INFO: Total # of broken channels: 0
08:54:48:ST3_smx:INFO: List of broken channels: []
08:54:48:ST3_smx:INFO: Total # of broken channels: 0
08:54:48:ST3_smx:INFO: List of broken channels: []
08:54:50:ST3_smx:INFO: chip: 24-7 44.073563 C 1141.874115 mV
08:54:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:54:50:ST3_smx:INFO: Electrons
08:54:50:ST3_smx:INFO: # loops 0
08:54:52:ST3_smx:INFO: # loops 1
08:54:53:ST3_smx:INFO: # loops 2
08:54:55:ST3_smx:INFO: Total # of broken channels: 0
08:54:55:ST3_smx:INFO: List of broken channels: []
08:54:55:ST3_smx:INFO: Total # of broken channels: 0
08:54:55:ST3_smx:INFO: List of broken channels: []
08:54:55:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:54:55:febtest:INFO: 30-01 | XA-000-09-004-023-016-017-10 | 21.9 | 1247.9
08:54:56:febtest:INFO: 28-03 | XA-000-09-004-023-013-017-01 | 31.4 | 1218.6
08:54:56:febtest:INFO: 26-05 | XA-000-09-004-023-010-017-09 | 47.3 | 1159.7
08:54:56:febtest:INFO: 24-07 | XA-000-09-004-023-007-018-14 | 47.3 | 1165.6
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_01_29-08_54_09
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4336| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7790', '1.847', '0.9990']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0080', '1.850', '1.3040']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9999', '1.851', '0.2683']