DTL-STS tests database

FEB_4336 04.02.26 15:38:36

link: XA-000-09-004-023-004-018-00
...SMX_0.root
link: XA-000-09-004-023-004-017-00
...SMX_2.root
link: XA-000-09-004-023-011-006-03
...SMX_4.root
link: XA-000-09-004-023-014-006-08
...SMX_6.root
link: XA-000-09-004-023-016-017-10
...SMX_1.root
link: XA-000-09-004-023-013-017-01
...SMX_3.root
link: XA-000-09-004-023-010-017-09
...SMX_5.root
link: XA-000-09-004-023-007-018-14
...SMX_7.root
link: XA-000-09-004-023-007-018-14
...VddmCSAstatus.root
Info
            15:38:36:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:38:36:ST3_Shared:INFO:	                         FEB-Sensor                         
15:38:36:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:38:39:ST3_ModuleSelector:INFO:	L3UR401113 M3UR4T3011133A2 124 C

15:38:39:ST3_ModuleSelector:INFO:	11244

15:38:39:febtest:INFO:	Testing FEB with SN 4336
15:38:40:smx_tester:INFO:	Scanning setup
15:38:40:elinks:INFO:	Disabling clock on downlink 0
15:38:40:elinks:INFO:	Disabling clock on downlink 1
15:38:40:elinks:INFO:	Disabling clock on downlink 2
15:38:40:elinks:INFO:	Disabling clock on downlink 3
15:38:40:elinks:INFO:	Disabling clock on downlink 4
15:38:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:38:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
15:38:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:38:40:elinks:INFO:	Disabling clock on downlink 0
15:38:40:elinks:INFO:	Disabling clock on downlink 1
15:38:40:elinks:INFO:	Disabling clock on downlink 2
15:38:40:elinks:INFO:	Disabling clock on downlink 3
15:38:40:elinks:INFO:	Disabling clock on downlink 4
15:38:40:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:38:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
15:38:40:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:38:40:elinks:INFO:	Disabling clock on downlink 0
15:38:40:elinks:INFO:	Disabling clock on downlink 1
15:38:40:elinks:INFO:	Disabling clock on downlink 2
15:38:40:elinks:INFO:	Disabling clock on downlink 3
15:38:40:elinks:INFO:	Disabling clock on downlink 4
15:38:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:38:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
15:38:41:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
15:38:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:38:41:elinks:INFO:	Disabling clock on downlink 0
15:38:41:elinks:INFO:	Disabling clock on downlink 1
15:38:41:elinks:INFO:	Disabling clock on downlink 2
15:38:41:elinks:INFO:	Disabling clock on downlink 3
15:38:41:elinks:INFO:	Disabling clock on downlink 4
15:38:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:38:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
15:38:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:38:41:elinks:INFO:	Disabling clock on downlink 0
15:38:41:elinks:INFO:	Disabling clock on downlink 1
15:38:41:elinks:INFO:	Disabling clock on downlink 2
15:38:41:elinks:INFO:	Disabling clock on downlink 3
15:38:41:elinks:INFO:	Disabling clock on downlink 4
15:38:41:setup_element:INFO:	Checking SOS, encoding_mode: SOS
15:38:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
15:38:41:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
15:38:41:setup_element:INFO:	Scanning clock phase
15:38:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:38:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:41:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
15:38:41:setup_element:INFO:	Eye window for uplink 16: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXX_____
Clock Delay: 32
15:38:41:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXX_____
Clock Delay: 32
15:38:41:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXX_____
Clock Delay: 32
15:38:41:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXX_____
Clock Delay: 32
15:38:41:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 28: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 29: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:38:41:setup_element:INFO:	Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:38:41:setup_element:INFO:	Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:38:41:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
15:38:41:setup_element:INFO:	Scanning data phases
15:38:41:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:38:41:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:46:setup_element:INFO:	Data phase scan results for group 0, downlink 2
15:38:46:setup_element:INFO:	Eye window for uplink 16: XXXX_________________________________XXX
Data delay found: 20
15:38:46:setup_element:INFO:	Eye window for uplink 17: XX__________________________________XXXX
Data delay found: 18
15:38:46:setup_element:INFO:	Eye window for uplink 18: X__________________________________XXXXX
Data delay found: 17
15:38:46:setup_element:INFO:	Eye window for uplink 19: X_________________________________XXXXXX
Data delay found: 17
15:38:46:setup_element:INFO:	Eye window for uplink 20: XXX__________________________________XXX
Data delay found: 19
15:38:46:setup_element:INFO:	Eye window for uplink 21: XXXXX_________________________________XX
Data delay found: 21
15:38:46:setup_element:INFO:	Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
15:38:46:setup_element:INFO:	Eye window for uplink 23: _________________________________XXXXXX_
Data delay found: 15
15:38:46:setup_element:INFO:	Eye window for uplink 24: ______XXXXX_____________________________
Data delay found: 28
15:38:46:setup_element:INFO:	Eye window for uplink 25: ________XXXX____________________________
Data delay found: 29
15:38:46:setup_element:INFO:	Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
15:38:46:setup_element:INFO:	Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
15:38:46:setup_element:INFO:	Eye window for uplink 28: ________________XXXXXX__________________
Data delay found: 38
15:38:46:setup_element:INFO:	Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
15:38:46:setup_element:INFO:	Eye window for uplink 30: __________________XXXXXXX_______________
Data delay found: 1
15:38:46:setup_element:INFO:	Eye window for uplink 31: _________________XXXXX__________________
Data delay found: 39
15:38:46:setup_element:INFO:	Setting the data phase to 20 for uplink 16
15:38:46:setup_element:INFO:	Setting the data phase to 18 for uplink 17
15:38:46:setup_element:INFO:	Setting the data phase to 17 for uplink 18
15:38:46:setup_element:INFO:	Setting the data phase to 17 for uplink 19
15:38:46:setup_element:INFO:	Setting the data phase to 19 for uplink 20
15:38:46:setup_element:INFO:	Setting the data phase to 21 for uplink 21
15:38:46:setup_element:INFO:	Setting the data phase to 18 for uplink 22
15:38:46:setup_element:INFO:	Setting the data phase to 15 for uplink 23
15:38:46:setup_element:INFO:	Setting the data phase to 28 for uplink 24
15:38:46:setup_element:INFO:	Setting the data phase to 29 for uplink 25
15:38:46:setup_element:INFO:	Setting the data phase to 32 for uplink 26
15:38:46:setup_element:INFO:	Setting the data phase to 35 for uplink 27
15:38:46:setup_element:INFO:	Setting the data phase to 38 for uplink 28
15:38:46:setup_element:INFO:	Setting the data phase to 38 for uplink 29
15:38:46:setup_element:INFO:	Setting the data phase to 1 for uplink 30
15:38:46:setup_element:INFO:	Setting the data phase to 39 for uplink 31
15:38:46:setup_element:INFO:	Beginning SMX ASICs map scan
15:38:46:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:38:46:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:46:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:38:47:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:38:47:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:38:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:38:47:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:38:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:38:47:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:38:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:38:47:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:38:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:38:47:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:38:47:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:38:47:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:38:47:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:38:47:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:38:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:38:48:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:38:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:38:48:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:38:49:setup_element:INFO:	Performing Elink synchronization
15:38:49:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
15:38:49:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:49:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
15:38:49:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
15:38:49:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
15:38:49:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:38:50:febtest:INFO:	Init all SMX (CSA): 30
15:39:03:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:39:03:febtest:INFO:	23-00 | XA-000-09-004-023-004-018-00 |  37.7 | 1189.2
15:39:03:febtest:INFO:	30-01 | XA-000-09-004-023-016-017-10 |  31.4 | 1201.0
15:39:04:febtest:INFO:	21-02 | XA-000-09-004-023-004-017-00 |  47.3 | 1177.4
15:39:04:febtest:INFO:	28-03 | XA-000-09-004-023-013-017-01 |  47.3 | 1171.5
15:39:04:febtest:INFO:	19-04 | XA-000-09-004-023-011-006-03 |  44.1 | 1177.4
15:39:04:febtest:INFO:	26-05 | XA-000-09-004-023-010-017-09 |  63.2 | 1118.1
15:39:04:febtest:INFO:	17-06 | XA-000-09-004-023-014-006-08 |  47.3 | 1165.6
15:39:05:febtest:INFO:	24-07 | XA-000-09-004-023-007-018-14 |  63.2 | 1124.0
15:39:06:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:39:08:ST3_smx:INFO:	chip: 23-0 	 37.726682 C 	 1212.728715 mV
15:39:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:08:ST3_smx:INFO:		Electrons
15:39:08:ST3_smx:INFO:	# loops 0
15:39:09:ST3_smx:INFO:	# loops 1
15:39:11:ST3_smx:INFO:	# loops 2
15:39:12:ST3_smx:INFO:	Total # of broken channels: 0
15:39:12:ST3_smx:INFO:	List of broken channels: []
15:39:12:ST3_smx:INFO:	Total # of broken channels: 0
15:39:12:ST3_smx:INFO:	List of broken channels: []
15:39:14:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1224.468235 mV
15:39:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:14:ST3_smx:INFO:		Electrons
15:39:14:ST3_smx:INFO:	# loops 0
15:39:15:ST3_smx:INFO:	# loops 1
15:39:17:ST3_smx:INFO:	# loops 2
15:39:18:ST3_smx:INFO:	Total # of broken channels: 0
15:39:18:ST3_smx:INFO:	List of broken channels: []
15:39:18:ST3_smx:INFO:	Total # of broken channels: 0
15:39:18:ST3_smx:INFO:	List of broken channels: []
15:39:20:ST3_smx:INFO:	chip: 21-2 	 44.073563 C 	 1282.867635 mV
15:39:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:20:ST3_smx:INFO:		Electrons
15:39:20:ST3_smx:INFO:	# loops 0
15:39:22:ST3_smx:INFO:	# loops 1
15:39:23:ST3_smx:INFO:	# loops 2
15:39:25:ST3_smx:INFO:	Total # of broken channels: 0
15:39:25:ST3_smx:INFO:	List of broken channels: []
15:39:25:ST3_smx:INFO:	Total # of broken channels: 0
15:39:25:ST3_smx:INFO:	List of broken channels: []
15:39:26:ST3_smx:INFO:	chip: 28-3 	 50.430383 C 	 1189.190035 mV
15:39:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:26:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:26:ST3_smx:INFO:		Electrons
15:39:26:ST3_smx:INFO:	# loops 0
15:39:28:ST3_smx:INFO:	# loops 1
15:39:29:ST3_smx:INFO:	# loops 2
15:39:31:ST3_smx:INFO:	Total # of broken channels: 0
15:39:31:ST3_smx:INFO:	List of broken channels: []
15:39:31:ST3_smx:INFO:	Total # of broken channels: 0
15:39:31:ST3_smx:INFO:	List of broken channels: []
15:39:33:ST3_smx:INFO:	chip: 19-4 	 50.430383 C 	 1189.190035 mV
15:39:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:33:ST3_smx:INFO:		Electrons
15:39:33:ST3_smx:INFO:	# loops 0
15:39:34:ST3_smx:INFO:	# loops 1
15:39:36:ST3_smx:INFO:	# loops 2
15:39:37:ST3_smx:INFO:	Total # of broken channels: 0
15:39:37:ST3_smx:INFO:	List of broken channels: []
15:39:37:ST3_smx:INFO:	Total # of broken channels: 0
15:39:37:ST3_smx:INFO:	List of broken channels: []
15:39:39:ST3_smx:INFO:	chip: 26-5 	 69.560482 C 	 1135.937260 mV
15:39:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:39:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:39:ST3_smx:INFO:		Electrons
15:39:39:ST3_smx:INFO:	# loops 0
15:39:40:ST3_smx:INFO:	# loops 1
15:39:42:ST3_smx:INFO:	# loops 2
15:39:44:ST3_smx:INFO:	Total # of broken channels: 0
15:39:44:ST3_smx:INFO:	List of broken channels: []
15:39:44:ST3_smx:INFO:	Total # of broken channels: 0
15:39:44:ST3_smx:INFO:	List of broken channels: []
15:39:45:ST3_smx:INFO:	chip: 17-6 	 56.797143 C 	 1183.292940 mV
15:39:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:45:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:45:ST3_smx:INFO:		Electrons
15:39:45:ST3_smx:INFO:	# loops 0
15:39:47:ST3_smx:INFO:	# loops 1
15:39:48:ST3_smx:INFO:	# loops 2
15:39:50:ST3_smx:INFO:	Total # of broken channels: 0
15:39:50:ST3_smx:INFO:	List of broken channels: []
15:39:50:ST3_smx:INFO:	Total # of broken channels: 0
15:39:50:ST3_smx:INFO:	List of broken channels: []
15:39:52:ST3_smx:INFO:	chip: 24-7 	 72.757530 C 	 1135.937260 mV
15:39:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:52:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
15:39:52:ST3_smx:INFO:		Electrons
15:39:52:ST3_smx:INFO:	# loops 0
15:39:53:ST3_smx:INFO:	# loops 1
15:39:55:ST3_smx:INFO:	# loops 2
15:39:56:ST3_smx:INFO:	Total # of broken channels: 0
15:39:56:ST3_smx:INFO:	List of broken channels: []
15:39:56:ST3_smx:INFO:	Total # of broken channels: 0
15:39:56:ST3_smx:INFO:	List of broken channels: []
15:39:56:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:39:57:febtest:INFO:	23-00 | XA-000-09-004-023-004-018-00 |  40.9 | 1253.7
15:39:57:febtest:INFO:	30-01 | XA-000-09-004-023-016-017-10 |  37.7 | 1247.9
15:39:57:febtest:INFO:	21-02 | XA-000-09-004-023-004-017-00 |  21.9 | 1578.5
15:39:57:febtest:INFO:	28-03 | XA-000-09-004-023-013-017-01 |  53.6 | 1212.7
15:39:57:febtest:INFO:	19-04 | XA-000-09-004-023-011-006-03 |  56.8 | 1212.7
15:39:58:febtest:INFO:	26-05 | XA-000-09-004-023-010-017-09 |  72.8 | 1159.7
15:39:58:febtest:INFO:	17-06 | XA-000-09-004-023-014-006-08 |  63.2 | 1201.0
15:39:58:febtest:INFO:	24-07 | XA-000-09-004-023-007-018-14 |  76.0 | 1159.7
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 26_02_04-15_38_36
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4336| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	11244

MODULE_NAME:	L3UR401113 M3UR4T3011133A2 124 C

MODULE_TYPE:	
MODULE_LADDER:	L3UR401113
MODULE_MODULE:	M3UR4T1011131A2
MODULE_SIZE:	42
MODULE_GRADE:	C
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9600', '1.850', '2.2400']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0180', '1.850', '2.6010']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9970', '1.850', '0.5357']
Comment