DTL-STS tests database

FEB_4341 09.02.26 12:23:11

link: XA-000-09-004-023-011-010-03
...SMX_0.root
link: XA-000-09-004-023-014-010-08
...SMX_2.root
link: XA-000-09-004-023-008-011-13
...SMX_4.root
link: XA-000-09-004-023-005-011-10
...SMX_6.root
link: XA-000-09-004-023-014-009-08
...SMX_1.root
link: XA-000-09-004-023-017-009-00
...SMX_3.root
link: XA-000-09-004-023-005-010-10
...SMX_5.root
link: XA-000-09-004-023-008-010-13
...SMX_7.root
link: XA-000-09-004-023-008-010-13
...VddmCSAstatus.root
Info
            12:23:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:23:11:ST3_Shared:INFO:	                       FEB-Microcable                       
12:23:11:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
12:23:11:febtest:INFO:	Testing FEB with SN 4341
12:23:12:smx_tester:INFO:	Scanning setup
12:23:12:elinks:INFO:	Disabling clock on downlink 0
12:23:12:elinks:INFO:	Disabling clock on downlink 1
12:23:12:elinks:INFO:	Disabling clock on downlink 2
12:23:12:elinks:INFO:	Disabling clock on downlink 3
12:23:12:elinks:INFO:	Disabling clock on downlink 4
12:23:12:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:23:12:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
12:23:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:23:13:elinks:INFO:	Disabling clock on downlink 0
12:23:13:elinks:INFO:	Disabling clock on downlink 1
12:23:13:elinks:INFO:	Disabling clock on downlink 2
12:23:13:elinks:INFO:	Disabling clock on downlink 3
12:23:13:elinks:INFO:	Disabling clock on downlink 4
12:23:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:23:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
12:23:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:23:13:elinks:INFO:	Disabling clock on downlink 0
12:23:13:elinks:INFO:	Disabling clock on downlink 1
12:23:13:elinks:INFO:	Disabling clock on downlink 2
12:23:13:elinks:INFO:	Disabling clock on downlink 3
12:23:13:elinks:INFO:	Disabling clock on downlink 4
12:23:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:23:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
12:23:13:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
12:23:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:23:13:elinks:INFO:	Disabling clock on downlink 0
12:23:13:elinks:INFO:	Disabling clock on downlink 1
12:23:13:elinks:INFO:	Disabling clock on downlink 2
12:23:13:elinks:INFO:	Disabling clock on downlink 3
12:23:13:elinks:INFO:	Disabling clock on downlink 4
12:23:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:23:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
12:23:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:23:13:elinks:INFO:	Disabling clock on downlink 0
12:23:13:elinks:INFO:	Disabling clock on downlink 1
12:23:13:elinks:INFO:	Disabling clock on downlink 2
12:23:13:elinks:INFO:	Disabling clock on downlink 3
12:23:13:elinks:INFO:	Disabling clock on downlink 4
12:23:13:setup_element:INFO:	Checking SOS, encoding_mode: SOS
12:23:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
12:23:13:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
12:23:13:setup_element:INFO:	Scanning clock phase
12:23:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:23:13:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:23:13:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
12:23:13:setup_element:INFO:	Eye window for uplink 16: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 17: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 20: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 21: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:23:13:setup_element:INFO:	Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
12:23:13:setup_element:INFO:	Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:23:13:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
12:23:13:setup_element:INFO:	Eye window for uplink 30: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:23:13:setup_element:INFO:	Eye window for uplink 31: _______________________________________________________________________XXXXX____
Clock Delay: 33
12:23:13:setup_element:INFO:	Setting the clock phase to 33 for group 0, downlink 2
12:23:13:setup_element:INFO:	Scanning data phases
12:23:13:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:23:14:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:23:19:setup_element:INFO:	Data phase scan results for group 0, downlink 2
12:23:19:setup_element:INFO:	Eye window for uplink 16: _XXXXX__________________________________
Data delay found: 23
12:23:19:setup_element:INFO:	Eye window for uplink 17: XXXX___________________________________X
Data delay found: 21
12:23:19:setup_element:INFO:	Eye window for uplink 18: XXXX___________________________________X
Data delay found: 21
12:23:19:setup_element:INFO:	Eye window for uplink 19: XXXX__________________________________XX
Data delay found: 20
12:23:19:setup_element:INFO:	Eye window for uplink 20: XXX__________________________________XXX
Data delay found: 19
12:23:19:setup_element:INFO:	Eye window for uplink 21: XXXXX__________________________________X
Data delay found: 21
12:23:19:setup_element:INFO:	Eye window for uplink 22: XXXX___________________________________X
Data delay found: 21
12:23:19:setup_element:INFO:	Eye window for uplink 23: XX__________________________________XXXX
Data delay found: 18
12:23:19:setup_element:INFO:	Eye window for uplink 24: ________XXXXXX__________________________
Data delay found: 30
12:23:19:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
12:23:19:setup_element:INFO:	Eye window for uplink 26: ___________XXXXXX_______________________
Data delay found: 33
12:23:19:setup_element:INFO:	Eye window for uplink 27: ______________XXXXXX____________________
Data delay found: 36
12:23:19:setup_element:INFO:	Eye window for uplink 28: _________________XXXXXXX________________
Data delay found: 0
12:23:19:setup_element:INFO:	Eye window for uplink 29: _________________XXXXXX_________________
Data delay found: 39
12:23:19:setup_element:INFO:	Eye window for uplink 30: _________________XXXXXX_________________
Data delay found: 39
12:23:19:setup_element:INFO:	Eye window for uplink 31: ________________XXX_X___________________
Data delay found: 38
12:23:19:setup_element:INFO:	Setting the data phase to 23 for uplink 16
12:23:19:setup_element:INFO:	Setting the data phase to 21 for uplink 17
12:23:19:setup_element:INFO:	Setting the data phase to 21 for uplink 18
12:23:19:setup_element:INFO:	Setting the data phase to 20 for uplink 19
12:23:19:setup_element:INFO:	Setting the data phase to 19 for uplink 20
12:23:19:setup_element:INFO:	Setting the data phase to 21 for uplink 21
12:23:19:setup_element:INFO:	Setting the data phase to 21 for uplink 22
12:23:19:setup_element:INFO:	Setting the data phase to 18 for uplink 23
12:23:19:setup_element:INFO:	Setting the data phase to 30 for uplink 24
12:23:19:setup_element:INFO:	Setting the data phase to 32 for uplink 25
12:23:19:setup_element:INFO:	Setting the data phase to 33 for uplink 26
12:23:19:setup_element:INFO:	Setting the data phase to 36 for uplink 27
12:23:19:setup_element:INFO:	Setting the data phase to 0 for uplink 28
12:23:19:setup_element:INFO:	Setting the data phase to 39 for uplink 29
12:23:19:setup_element:INFO:	Setting the data phase to 39 for uplink 30
12:23:19:setup_element:INFO:	Setting the data phase to 38 for uplink 31
12:23:19:setup_element:INFO:	Beginning SMX ASICs map scan
12:23:19:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:23:19:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:23:19:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:23:19:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:23:19:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
12:23:19:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
12:23:19:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
12:23:19:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
12:23:19:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
12:23:19:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
12:23:19:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
12:23:19:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
12:23:19:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
12:23:19:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
12:23:20:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
12:23:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
12:23:20:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
12:23:20:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
12:23:20:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
12:23:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
12:23:20:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
12:23:21:setup_element:INFO:	Performing Elink synchronization
12:23:21:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
12:23:21:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
12:23:21:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
12:23:21:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
12:23:21:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
12:23:21:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
12:23:22:febtest:INFO:	Init all SMX (CSA): 30
12:23:38:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:23:38:febtest:INFO:	23-00 | XA-000-09-004-023-011-010-03 |  47.3 | 1130.0
12:23:38:febtest:INFO:	30-01 | XA-000-09-004-023-014-009-08 |  31.4 | 1183.3
12:23:39:febtest:INFO:	21-02 | XA-000-09-004-023-014-010-08 |  37.7 | 1159.7
12:23:39:febtest:INFO:	28-03 | XA-000-09-004-023-017-009-00 |  31.4 | 1183.3
12:23:39:febtest:INFO:	19-04 | XA-000-09-004-023-008-011-13 |  37.7 | 1165.6
12:23:39:febtest:INFO:	26-05 | XA-000-09-004-023-005-010-10 |  47.3 | 1135.9
12:23:40:febtest:INFO:	17-06 | XA-000-09-004-023-005-011-10 |  37.7 | 1171.5
12:23:40:febtest:INFO:	24-07 | XA-000-09-004-023-008-010-13 |  37.7 | 1177.4
12:23:41:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
12:23:43:ST3_smx:INFO:	chip: 23-0 	 47.250730 C 	 1147.806000 mV
12:23:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:23:43:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:23:43:ST3_smx:INFO:		Electrons
12:23:43:ST3_smx:INFO:	# loops 0
12:23:45:ST3_smx:INFO:	# loops 1
12:23:46:ST3_smx:INFO:	# loops 2
12:23:48:ST3_smx:INFO:	Total # of broken channels: 0
12:23:48:ST3_smx:INFO:	List of broken channels: []
12:23:48:ST3_smx:INFO:	Total # of broken channels: 0
12:23:48:ST3_smx:INFO:	List of broken channels: []
12:23:50:ST3_smx:INFO:	chip: 30-1 	 31.389742 C 	 1200.969315 mV
12:23:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:23:50:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:23:50:ST3_smx:INFO:		Electrons
12:23:50:ST3_smx:INFO:	# loops 0
12:23:51:ST3_smx:INFO:	# loops 1
12:23:53:ST3_smx:INFO:	# loops 2
12:23:55:ST3_smx:INFO:	Total # of broken channels: 0
12:23:55:ST3_smx:INFO:	List of broken channels: []
12:23:55:ST3_smx:INFO:	Total # of broken channels: 0
12:23:55:ST3_smx:INFO:	List of broken channels: []
12:23:57:ST3_smx:INFO:	chip: 21-2 	 37.726682 C 	 1183.292940 mV
12:23:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:23:57:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:23:57:ST3_smx:INFO:		Electrons
12:23:57:ST3_smx:INFO:	# loops 0
12:23:59:ST3_smx:INFO:	# loops 1
12:24:00:ST3_smx:INFO:	# loops 2
12:24:02:ST3_smx:INFO:	Total # of broken channels: 0
12:24:02:ST3_smx:INFO:	List of broken channels: []
12:24:02:ST3_smx:INFO:	Total # of broken channels: 0
12:24:02:ST3_smx:INFO:	List of broken channels: []
12:24:04:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1200.969315 mV
12:24:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:04:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:04:ST3_smx:INFO:		Electrons
12:24:04:ST3_smx:INFO:	# loops 0
12:24:06:ST3_smx:INFO:	# loops 1
12:24:07:ST3_smx:INFO:	# loops 2
12:24:09:ST3_smx:INFO:	Total # of broken channels: 0
12:24:09:ST3_smx:INFO:	List of broken channels: []
12:24:09:ST3_smx:INFO:	Total # of broken channels: 0
12:24:09:ST3_smx:INFO:	List of broken channels: []
12:24:11:ST3_smx:INFO:	chip: 19-4 	 37.726682 C 	 1183.292940 mV
12:24:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:11:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:11:ST3_smx:INFO:		Electrons
12:24:11:ST3_smx:INFO:	# loops 0
12:24:13:ST3_smx:INFO:	# loops 1
12:24:14:ST3_smx:INFO:	# loops 2
12:24:16:ST3_smx:INFO:	Total # of broken channels: 0
12:24:16:ST3_smx:INFO:	List of broken channels: []
12:24:16:ST3_smx:INFO:	Total # of broken channels: 1
12:24:16:ST3_smx:INFO:	List of broken channels: [3]
12:24:18:ST3_smx:INFO:	chip: 26-5 	 50.430383 C 	 1159.654860 mV
12:24:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:18:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:18:ST3_smx:INFO:		Electrons
12:24:18:ST3_smx:INFO:	# loops 0
12:24:20:ST3_smx:INFO:	# loops 1
12:24:21:ST3_smx:INFO:	# loops 2
12:24:23:ST3_smx:INFO:	Total # of broken channels: 0
12:24:23:ST3_smx:INFO:	List of broken channels: []
12:24:23:ST3_smx:INFO:	Total # of broken channels: 0
12:24:23:ST3_smx:INFO:	List of broken channels: []
12:24:25:ST3_smx:INFO:	chip: 17-6 	 37.726682 C 	 1189.190035 mV
12:24:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:25:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:25:ST3_smx:INFO:		Electrons
12:24:25:ST3_smx:INFO:	# loops 0
12:24:27:ST3_smx:INFO:	# loops 1
12:24:28:ST3_smx:INFO:	# loops 2
12:24:30:ST3_smx:INFO:	Total # of broken channels: 0
12:24:30:ST3_smx:INFO:	List of broken channels: []
12:24:30:ST3_smx:INFO:	Total # of broken channels: 0
12:24:30:ST3_smx:INFO:	List of broken channels: []
12:24:32:ST3_smx:INFO:	chip: 24-7 	 40.898880 C 	 1195.082160 mV
12:24:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:32:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
12:24:32:ST3_smx:INFO:		Electrons
12:24:32:ST3_smx:INFO:	# loops 0
12:24:34:ST3_smx:INFO:	# loops 1
12:24:35:ST3_smx:INFO:	# loops 2
12:24:37:ST3_smx:INFO:	Total # of broken channels: 0
12:24:37:ST3_smx:INFO:	List of broken channels: []
12:24:37:ST3_smx:INFO:	Total # of broken channels: 0
12:24:37:ST3_smx:INFO:	List of broken channels: []
12:24:38:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
12:24:38:febtest:INFO:	23-00 | XA-000-09-004-023-011-010-03 |  47.3 | 1171.5
12:24:38:febtest:INFO:	30-01 | XA-000-09-004-023-014-009-08 |  34.6 | 1224.5
12:24:38:febtest:INFO:	21-02 | XA-000-09-004-023-014-010-08 |  40.9 | 1206.9
12:24:38:febtest:INFO:	28-03 | XA-000-09-004-023-017-009-00 |  34.6 | 1224.5
12:24:39:febtest:INFO:	19-04 | XA-000-09-004-023-008-011-13 |  40.9 | 1206.9
12:24:39:febtest:INFO:	26-05 | XA-000-09-004-023-005-010-10 |  50.4 | 1183.3
12:24:39:febtest:INFO:	17-06 | XA-000-09-004-023-005-011-10 |  40.9 | 1206.9
12:24:39:febtest:INFO:	24-07 | XA-000-09-004-023-008-010-13 |  40.9 | 1218.6
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_09-12_23_11
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4341| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5540', '1.849', '2.1040']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0140', '1.850', '2.5410']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9870', '1.850', '0.5248']
Comment