FEB_4342 06.02.26 09:34:07
Info
09:34:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:34:07:ST3_Shared:INFO: FEB-Microcable
09:34:07:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:34:07:febtest:INFO: Testing FEB with SN 4342
09:34:08:smx_tester:INFO: Scanning setup
09:34:08:elinks:INFO: Disabling clock on downlink 0
09:34:08:elinks:INFO: Disabling clock on downlink 1
09:34:08:elinks:INFO: Disabling clock on downlink 2
09:34:08:elinks:INFO: Disabling clock on downlink 3
09:34:08:elinks:INFO: Disabling clock on downlink 4
09:34:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:34:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:34:08:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:34:08:elinks:INFO: Disabling clock on downlink 0
09:34:08:elinks:INFO: Disabling clock on downlink 1
09:34:08:elinks:INFO: Disabling clock on downlink 2
09:34:08:elinks:INFO: Disabling clock on downlink 3
09:34:08:elinks:INFO: Disabling clock on downlink 4
09:34:08:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:34:08:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:34:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:34:09:elinks:INFO: Disabling clock on downlink 0
09:34:09:elinks:INFO: Disabling clock on downlink 1
09:34:09:elinks:INFO: Disabling clock on downlink 2
09:34:09:elinks:INFO: Disabling clock on downlink 3
09:34:09:elinks:INFO: Disabling clock on downlink 4
09:34:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:34:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:34:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:34:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:34:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:34:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:34:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:34:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:34:09:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:34:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:34:09:elinks:INFO: Disabling clock on downlink 0
09:34:09:elinks:INFO: Disabling clock on downlink 1
09:34:09:elinks:INFO: Disabling clock on downlink 2
09:34:09:elinks:INFO: Disabling clock on downlink 3
09:34:09:elinks:INFO: Disabling clock on downlink 4
09:34:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:34:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:34:09:elinks:INFO: Disabling clock on downlink 0
09:34:09:elinks:INFO: Disabling clock on downlink 1
09:34:09:elinks:INFO: Disabling clock on downlink 2
09:34:09:elinks:INFO: Disabling clock on downlink 3
09:34:09:elinks:INFO: Disabling clock on downlink 4
09:34:09:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:34:09:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:34:09:setup_element:INFO: Scanning clock phase
09:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:34:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:34:09:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:34:09:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:34:09:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXXX____
Clock Delay: 32
09:34:09:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:34:09:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
09:34:09:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:34:09:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:34:09:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________________
Clock Delay: 40
09:34:09:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________________
Clock Delay: 40
09:34:09:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
09:34:09:setup_element:INFO: Scanning data phases
09:34:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:34:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:34:14:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:34:14:setup_element:INFO: Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
09:34:14:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
09:34:14:setup_element:INFO: Eye window for uplink 26: ___________XXXXXX_______________________
Data delay found: 33
09:34:14:setup_element:INFO: Eye window for uplink 27: ______________XXXXXXX___________________
Data delay found: 37
09:34:14:setup_element:INFO: Eye window for uplink 28: __________________XXXXXXX_______________
Data delay found: 1
09:34:15:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
09:34:15:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________
Data delay found: 2
09:34:15:setup_element:INFO: Eye window for uplink 31: ___________________XXXXX________________
Data delay found: 1
09:34:15:setup_element:INFO: Setting the data phase to 32 for uplink 24
09:34:15:setup_element:INFO: Setting the data phase to 34 for uplink 25
09:34:15:setup_element:INFO: Setting the data phase to 33 for uplink 26
09:34:15:setup_element:INFO: Setting the data phase to 37 for uplink 27
09:34:15:setup_element:INFO: Setting the data phase to 1 for uplink 28
09:34:15:setup_element:INFO: Setting the data phase to 0 for uplink 29
09:34:15:setup_element:INFO: Setting the data phase to 2 for uplink 30
09:34:15:setup_element:INFO: Setting the data phase to 1 for uplink 31
09:34:15:setup_element:INFO: Beginning SMX ASICs map scan
09:34:15:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:34:15:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:34:15:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:34:15:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:34:15:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:34:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:34:15:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:34:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:34:15:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:34:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:34:16:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:34:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:34:16:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:34:17:setup_element:INFO: Performing Elink synchronization
09:34:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:34:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:34:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:34:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:34:17:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:34:17:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:34:18:febtest:INFO: Init all SMX (CSA): 30
09:34:27:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:34:27:febtest:INFO: 30-01 | XA-000-09-004-023-002-011-02 | 28.2 | 1183.3
09:34:27:febtest:INFO: 28-03 | XA-000-09-004-023-002-010-02 | 37.7 | 1153.7
09:34:28:febtest:INFO: 26-05 | XA-000-09-004-023-011-011-03 | 44.1 | 1141.9
09:34:28:febtest:INFO: 24-07 | XA-000-09-004-023-014-011-08 | 40.9 | 1141.9
09:34:29:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:34:31:ST3_smx:INFO: chip: 30-1 31.389742 C 1195.082160 mV
09:34:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:34:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:34:31:ST3_smx:INFO: Electrons
09:34:31:ST3_smx:INFO: # loops 0
09:34:33:ST3_smx:INFO: # loops 1
09:34:35:ST3_smx:INFO: # loops 2
09:34:37:ST3_smx:INFO: Total # of broken channels: 0
09:34:37:ST3_smx:INFO: List of broken channels: []
09:34:37:ST3_smx:INFO: Total # of broken channels: 0
09:34:37:ST3_smx:INFO: List of broken channels: []
09:34:39:ST3_smx:INFO: chip: 28-3 37.726682 C 1165.571835 mV
09:34:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:34:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:34:39:ST3_smx:INFO: Electrons
09:34:39:ST3_smx:INFO: # loops 0
09:34:41:ST3_smx:INFO: # loops 1
09:34:43:ST3_smx:INFO: # loops 2
09:34:45:ST3_smx:INFO: Total # of broken channels: 0
09:34:45:ST3_smx:INFO: List of broken channels: []
09:34:45:ST3_smx:INFO: Total # of broken channels: 0
09:34:45:ST3_smx:INFO: List of broken channels: []
09:34:47:ST3_smx:INFO: chip: 26-5 44.073563 C 1153.732915 mV
09:34:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:34:47:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:34:47:ST3_smx:INFO: Electrons
09:34:47:ST3_smx:INFO: # loops 0
09:34:49:ST3_smx:INFO: # loops 1
09:34:51:ST3_smx:INFO: # loops 2
09:34:53:ST3_smx:INFO: Total # of broken channels: 0
09:34:53:ST3_smx:INFO: List of broken channels: []
09:34:53:ST3_smx:INFO: Total # of broken channels: 0
09:34:53:ST3_smx:INFO: List of broken channels: []
09:34:54:ST3_smx:INFO: chip: 24-7 44.073563 C 1147.806000 mV
09:34:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:34:54:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:34:54:ST3_smx:INFO: Electrons
09:34:54:ST3_smx:INFO: # loops 0
09:34:56:ST3_smx:INFO: # loops 1
09:34:58:ST3_smx:INFO: # loops 2
09:35:00:ST3_smx:INFO: Total # of broken channels: 0
09:35:00:ST3_smx:INFO: List of broken channels: []
09:35:00:ST3_smx:INFO: Total # of broken channels: 0
09:35:00:ST3_smx:INFO: List of broken channels: []
09:35:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:35:01:febtest:INFO: 30-01 | XA-000-09-004-023-002-011-02 | 31.4 | 1218.6
09:35:01:febtest:INFO: 28-03 | XA-000-09-004-023-002-010-02 | 40.9 | 1189.2
09:35:01:febtest:INFO: 26-05 | XA-000-09-004-023-011-011-03 | 47.3 | 1177.4
09:35:02:febtest:INFO: 24-07 | XA-000-09-004-023-014-011-08 | 47.3 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_06-09_34_07
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4342| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7998', '1.848', '1.2570']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0120', '1.850', '1.1710']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9896', '1.850', '0.2611']