FEB_4344 09.02.26 09:21:54
Info
09:21:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:21:54:ST3_Shared:INFO: FEB-Microcable
09:21:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:21:54:febtest:INFO: Testing FEB with SN 4344
09:21:56:smx_tester:INFO: Scanning setup
09:21:56:elinks:INFO: Disabling clock on downlink 0
09:21:56:elinks:INFO: Disabling clock on downlink 1
09:21:56:elinks:INFO: Disabling clock on downlink 2
09:21:56:elinks:INFO: Disabling clock on downlink 3
09:21:56:elinks:INFO: Disabling clock on downlink 4
09:21:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:21:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:56:elinks:INFO: Disabling clock on downlink 0
09:21:56:elinks:INFO: Disabling clock on downlink 1
09:21:56:elinks:INFO: Disabling clock on downlink 2
09:21:56:elinks:INFO: Disabling clock on downlink 3
09:21:56:elinks:INFO: Disabling clock on downlink 4
09:21:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:21:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:56:elinks:INFO: Disabling clock on downlink 0
09:21:56:elinks:INFO: Disabling clock on downlink 1
09:21:56:elinks:INFO: Disabling clock on downlink 2
09:21:56:elinks:INFO: Disabling clock on downlink 3
09:21:56:elinks:INFO: Disabling clock on downlink 4
09:21:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:21:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:21:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:21:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:21:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:21:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:21:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:21:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:21:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:21:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:56:elinks:INFO: Disabling clock on downlink 0
09:21:56:elinks:INFO: Disabling clock on downlink 1
09:21:56:elinks:INFO: Disabling clock on downlink 2
09:21:56:elinks:INFO: Disabling clock on downlink 3
09:21:56:elinks:INFO: Disabling clock on downlink 4
09:21:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:21:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:56:elinks:INFO: Disabling clock on downlink 0
09:21:56:elinks:INFO: Disabling clock on downlink 1
09:21:56:elinks:INFO: Disabling clock on downlink 2
09:21:56:elinks:INFO: Disabling clock on downlink 3
09:21:56:elinks:INFO: Disabling clock on downlink 4
09:21:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:21:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:21:57:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:21:57:setup_element:INFO: Scanning clock phase
09:21:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:21:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:21:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:21:57:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:21:57:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:21:57:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:21:57:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
09:21:57:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXXX__
Clock Delay: 34
09:21:57:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
09:21:57:setup_element:INFO: Scanning data phases
09:21:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:21:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:22:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:22:02:setup_element:INFO: Eye window for uplink 24: _________XXXXXXX________________________
Data delay found: 32
09:22:02:setup_element:INFO: Eye window for uplink 25: ___________XXXXXX_______________________
Data delay found: 33
09:22:02:setup_element:INFO: Eye window for uplink 26: ___________XXXXXXX______________________
Data delay found: 34
09:22:02:setup_element:INFO: Eye window for uplink 27: ______________XXXXXXXX__________________
Data delay found: 37
09:22:02:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXXX______________
Data delay found: 2
09:22:02:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXXX______________
Data delay found: 2
09:22:02:setup_element:INFO: Eye window for uplink 30: _____________________XXXXXX_____________
Data delay found: 3
09:22:02:setup_element:INFO: Eye window for uplink 31: ___________________XXXXX________________
Data delay found: 1
09:22:02:setup_element:INFO: Setting the data phase to 32 for uplink 24
09:22:02:setup_element:INFO: Setting the data phase to 33 for uplink 25
09:22:02:setup_element:INFO: Setting the data phase to 34 for uplink 26
09:22:02:setup_element:INFO: Setting the data phase to 37 for uplink 27
09:22:02:setup_element:INFO: Setting the data phase to 2 for uplink 28
09:22:02:setup_element:INFO: Setting the data phase to 2 for uplink 29
09:22:02:setup_element:INFO: Setting the data phase to 3 for uplink 30
09:22:02:setup_element:INFO: Setting the data phase to 1 for uplink 31
09:22:02:setup_element:INFO: Beginning SMX ASICs map scan
09:22:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:22:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:22:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:22:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:22:02:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:22:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:22:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:22:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:22:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:22:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:22:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:22:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:22:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:22:05:setup_element:INFO: Performing Elink synchronization
09:22:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:22:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:22:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:22:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:22:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:22:05:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:22:05:febtest:INFO: Init all SMX (CSA): 30
09:22:12:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:22:12:febtest:INFO: 30-01 | XA-000-09-004-017-004-008-05 | 31.4 | 1165.6
09:22:12:febtest:INFO: 28-03 | XA-000-09-004-017-004-007-05 | 31.4 | 1171.5
09:22:12:febtest:INFO: 26-05 | XA-000-09-004-017-010-007-12 | 28.2 | 1183.3
09:22:13:febtest:INFO: 24-07 | XA-000-09-004-017-008-007-15 | 34.6 | 1159.7
09:22:14:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:22:15:ST3_smx:INFO: chip: 30-1 34.556970 C 1177.390875 mV
09:22:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:15:ST3_smx:INFO: Electrons
09:22:15:ST3_smx:INFO: # loops 0
09:22:17:ST3_smx:INFO: # loops 1
09:22:18:ST3_smx:INFO: # loops 2
09:22:20:ST3_smx:INFO: Total # of broken channels: 0
09:22:20:ST3_smx:INFO: List of broken channels: []
09:22:20:ST3_smx:INFO: Total # of broken channels: 0
09:22:20:ST3_smx:INFO: List of broken channels: []
09:22:22:ST3_smx:INFO: chip: 28-3 31.389742 C 1183.292940 mV
09:22:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:22:ST3_smx:INFO: Electrons
09:22:22:ST3_smx:INFO: # loops 0
09:22:23:ST3_smx:INFO: # loops 1
09:22:25:ST3_smx:INFO: # loops 2
09:22:26:ST3_smx:INFO: Total # of broken channels: 0
09:22:26:ST3_smx:INFO: List of broken channels: []
09:22:26:ST3_smx:INFO: Total # of broken channels: 1
09:22:26:ST3_smx:INFO: List of broken channels: [125]
09:22:28:ST3_smx:INFO: chip: 26-5 31.389742 C 1195.082160 mV
09:22:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:28:ST3_smx:INFO: Electrons
09:22:28:ST3_smx:INFO: # loops 0
09:22:30:ST3_smx:INFO: # loops 1
09:22:31:ST3_smx:INFO: # loops 2
09:22:33:ST3_smx:INFO: Total # of broken channels: 0
09:22:33:ST3_smx:INFO: List of broken channels: []
09:22:33:ST3_smx:INFO: Total # of broken channels: 0
09:22:33:ST3_smx:INFO: List of broken channels: []
09:22:34:ST3_smx:INFO: chip: 24-7 34.556970 C 1165.571835 mV
09:22:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:22:34:ST3_smx:INFO: Electrons
09:22:34:ST3_smx:INFO: # loops 0
09:22:36:ST3_smx:INFO: # loops 1
09:22:38:ST3_smx:INFO: # loops 2
09:22:39:ST3_smx:INFO: Total # of broken channels: 0
09:22:39:ST3_smx:INFO: List of broken channels: []
09:22:39:ST3_smx:INFO: Total # of broken channels: 0
09:22:39:ST3_smx:INFO: List of broken channels: []
09:22:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:22:40:febtest:INFO: 30-01 | XA-000-09-004-017-004-008-05 | 34.6 | 1201.0
09:22:40:febtest:INFO: 28-03 | XA-000-09-004-017-004-007-05 | 31.4 | 1206.9
09:22:40:febtest:INFO: 26-05 | XA-000-09-004-017-010-007-12 | 31.4 | 1218.6
09:22:40:febtest:INFO: 24-07 | XA-000-09-004-017-008-007-15 | 37.7 | 1189.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_09-09_21_54
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4344| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7946', '1.847', '1.2120']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0070', '1.850', '1.1870']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9907', '1.851', '0.2679']