FEB_4346 10.02.26 13:34:54
Info
13:34:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:54:ST3_Shared:INFO: FEB-Microcable
13:34:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:34:54:febtest:INFO: Testing FEB with SN 4346
13:34:56:smx_tester:INFO: Scanning setup
13:34:56:elinks:INFO: Disabling clock on downlink 0
13:34:56:elinks:INFO: Disabling clock on downlink 1
13:34:56:elinks:INFO: Disabling clock on downlink 2
13:34:56:elinks:INFO: Disabling clock on downlink 3
13:34:56:elinks:INFO: Disabling clock on downlink 4
13:34:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:34:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:56:elinks:INFO: Disabling clock on downlink 0
13:34:56:elinks:INFO: Disabling clock on downlink 1
13:34:56:elinks:INFO: Disabling clock on downlink 2
13:34:56:elinks:INFO: Disabling clock on downlink 3
13:34:56:elinks:INFO: Disabling clock on downlink 4
13:34:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:34:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:56:elinks:INFO: Disabling clock on downlink 0
13:34:56:elinks:INFO: Disabling clock on downlink 1
13:34:56:elinks:INFO: Disabling clock on downlink 2
13:34:56:elinks:INFO: Disabling clock on downlink 3
13:34:56:elinks:INFO: Disabling clock on downlink 4
13:34:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:34:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:34:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:34:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:34:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:34:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:34:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:34:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:34:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:56:elinks:INFO: Disabling clock on downlink 0
13:34:56:elinks:INFO: Disabling clock on downlink 1
13:34:56:elinks:INFO: Disabling clock on downlink 2
13:34:56:elinks:INFO: Disabling clock on downlink 3
13:34:56:elinks:INFO: Disabling clock on downlink 4
13:34:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:34:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:56:elinks:INFO: Disabling clock on downlink 0
13:34:56:elinks:INFO: Disabling clock on downlink 1
13:34:56:elinks:INFO: Disabling clock on downlink 2
13:34:56:elinks:INFO: Disabling clock on downlink 3
13:34:56:elinks:INFO: Disabling clock on downlink 4
13:34:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:34:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:34:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:34:56:setup_element:INFO: Scanning clock phase
13:34:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:34:57:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:34:57:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXX_____
Clock Delay: 32
13:34:57:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXX_____
Clock Delay: 32
13:34:57:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________________________
Clock Delay: 40
13:34:57:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________________________
Clock Delay: 40
13:34:57:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:34:57:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:34:57:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXX____
Clock Delay: 33
13:34:57:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXX____
Clock Delay: 33
13:34:57:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
13:34:57:setup_element:INFO: Scanning data phases
13:34:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:34:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:35:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:35:02:setup_element:INFO: Eye window for uplink 24: __________XXXXX_________________________
Data delay found: 32
13:35:02:setup_element:INFO: Eye window for uplink 25: ____________XXXXX_______________________
Data delay found: 34
13:35:02:setup_element:INFO: Eye window for uplink 26: _____________XXXXXX_____________________
Data delay found: 35
13:35:02:setup_element:INFO: Eye window for uplink 27: _______________XXXXXXXX_________________
Data delay found: 38
13:35:02:setup_element:INFO: Eye window for uplink 28: __________________XXXXXXX_______________
Data delay found: 1
13:35:02:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
13:35:02:setup_element:INFO: Eye window for uplink 30: _________________XXXXXXXXXXX____________
Data delay found: 2
13:35:02:setup_element:INFO: Eye window for uplink 31: ___________________XXXXX________________
Data delay found: 1
13:35:02:setup_element:INFO: Setting the data phase to 32 for uplink 24
13:35:02:setup_element:INFO: Setting the data phase to 34 for uplink 25
13:35:02:setup_element:INFO: Setting the data phase to 35 for uplink 26
13:35:02:setup_element:INFO: Setting the data phase to 38 for uplink 27
13:35:02:setup_element:INFO: Setting the data phase to 1 for uplink 28
13:35:02:setup_element:INFO: Setting the data phase to 0 for uplink 29
13:35:02:setup_element:INFO: Setting the data phase to 2 for uplink 30
13:35:02:setup_element:INFO: Setting the data phase to 1 for uplink 31
13:35:02:setup_element:INFO: Beginning SMX ASICs map scan
13:35:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:35:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:35:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:35:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:35:02:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:35:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:35:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:35:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:35:03:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:35:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:35:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:35:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:35:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:35:05:setup_element:INFO: Performing Elink synchronization
13:35:05:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:35:05:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:35:05:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:35:05:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:35:05:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:35:05:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:35:05:febtest:INFO: Init all SMX (CSA): 30
13:35:15:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:35:15:febtest:INFO: 30-01 | XA-000-09-004-023-006-004-04 | 34.6 | 1165.6
13:35:16:febtest:INFO: 28-03 | XA-000-09-004-023-009-004-00 | 31.4 | 1177.4
13:35:16:febtest:INFO: 26-05 | XA-000-09-004-023-012-004-11 | 31.4 | 1171.5
13:35:16:febtest:INFO: 24-07 | XA-000-09-004-017-016-013-15 | 31.4 | 1171.5
13:35:17:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:35:19:ST3_smx:INFO: chip: 30-1 34.556970 C 1177.390875 mV
13:35:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:19:ST3_smx:INFO: Electrons
13:35:19:ST3_smx:INFO: # loops 0
13:35:21:ST3_smx:INFO: # loops 1
13:35:23:ST3_smx:INFO: # loops 2
13:35:25:ST3_smx:INFO: Total # of broken channels: 0
13:35:25:ST3_smx:INFO: List of broken channels: []
13:35:25:ST3_smx:INFO: Total # of broken channels: 0
13:35:25:ST3_smx:INFO: List of broken channels: []
13:35:27:ST3_smx:INFO: chip: 28-3 31.389742 C 1189.190035 mV
13:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:27:ST3_smx:INFO: Electrons
13:35:27:ST3_smx:INFO: # loops 0
13:35:29:ST3_smx:INFO: # loops 1
13:35:31:ST3_smx:INFO: # loops 2
13:35:33:ST3_smx:INFO: Total # of broken channels: 0
13:35:33:ST3_smx:INFO: List of broken channels: []
13:35:33:ST3_smx:INFO: Total # of broken channels: 0
13:35:33:ST3_smx:INFO: List of broken channels: []
13:35:34:ST3_smx:INFO: chip: 26-5 34.556970 C 1183.292940 mV
13:35:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:34:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:34:ST3_smx:INFO: Electrons
13:35:34:ST3_smx:INFO: # loops 0
13:35:36:ST3_smx:INFO: # loops 1
13:35:38:ST3_smx:INFO: # loops 2
13:35:41:ST3_smx:INFO: Total # of broken channels: 0
13:35:41:ST3_smx:INFO: List of broken channels: []
13:35:41:ST3_smx:INFO: Total # of broken channels: 0
13:35:41:ST3_smx:INFO: List of broken channels: []
13:35:42:ST3_smx:INFO: chip: 24-7 34.556970 C 1183.292940 mV
13:35:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:42:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:35:42:ST3_smx:INFO: Electrons
13:35:42:ST3_smx:INFO: # loops 0
13:35:45:ST3_smx:INFO: # loops 1
13:35:47:ST3_smx:INFO: # loops 2
13:35:49:ST3_smx:INFO: Total # of broken channels: 0
13:35:49:ST3_smx:INFO: List of broken channels: []
13:35:49:ST3_smx:INFO: Total # of broken channels: 0
13:35:49:ST3_smx:INFO: List of broken channels: []
13:35:49:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:35:49:febtest:INFO: 30-01 | XA-000-09-004-023-006-004-04 | 37.7 | 1201.0
13:35:50:febtest:INFO: 28-03 | XA-000-09-004-023-009-004-00 | 34.6 | 1212.7
13:35:50:febtest:INFO: 26-05 | XA-000-09-004-023-012-004-11 | 37.7 | 1206.9
13:35:50:febtest:INFO: 24-07 | XA-000-09-004-017-016-013-15 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_10-13_34_54
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4346| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7277', '1.850', '1.2340']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0040', '1.850', '1.2160']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9986', '1.850', '0.2651']