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FEB_4349 18.02.26 15:37:54
Info
15:37:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:37:54:ST3_Shared:INFO: FEB-Microcable
15:37:54:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:37:54:febtest:INFO: Testing FEB with SN 4349
15:37:55:smx_tester:INFO: Scanning setup
15:37:56:elinks:INFO: Disabling clock on downlink 0
15:37:56:elinks:INFO: Disabling clock on downlink 1
15:37:56:elinks:INFO: Disabling clock on downlink 2
15:37:56:elinks:INFO: Disabling clock on downlink 3
15:37:56:elinks:INFO: Disabling clock on downlink 4
15:37:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:37:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:37:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:37:56:elinks:INFO: Disabling clock on downlink 0
15:37:56:elinks:INFO: Disabling clock on downlink 1
15:37:56:elinks:INFO: Disabling clock on downlink 2
15:37:56:elinks:INFO: Disabling clock on downlink 3
15:37:56:elinks:INFO: Disabling clock on downlink 4
15:37:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:37:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:37:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:37:56:elinks:INFO: Disabling clock on downlink 0
15:37:56:elinks:INFO: Disabling clock on downlink 1
15:37:56:elinks:INFO: Disabling clock on downlink 2
15:37:56:elinks:INFO: Disabling clock on downlink 3
15:37:56:elinks:INFO: Disabling clock on downlink 4
15:37:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:37:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:37:56:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:37:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:37:56:elinks:INFO: Disabling clock on downlink 0
15:37:56:elinks:INFO: Disabling clock on downlink 1
15:37:56:elinks:INFO: Disabling clock on downlink 2
15:37:56:elinks:INFO: Disabling clock on downlink 3
15:37:56:elinks:INFO: Disabling clock on downlink 4
15:37:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:37:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:37:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:37:56:elinks:INFO: Disabling clock on downlink 0
15:37:56:elinks:INFO: Disabling clock on downlink 1
15:37:56:elinks:INFO: Disabling clock on downlink 2
15:37:56:elinks:INFO: Disabling clock on downlink 3
15:37:56:elinks:INFO: Disabling clock on downlink 4
15:37:56:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:37:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:37:56:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:37:56:setup_element:INFO: Scanning clock phase
15:37:56:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:37:56:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:37:56:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:37:56:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:37:56:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:37:57:setup_element:INFO: Eye window for uplink 18: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:37:57:setup_element:INFO: Eye window for uplink 19: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:37:57:setup_element:INFO: Eye window for uplink 20: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:37:57:setup_element:INFO: Eye window for uplink 21: _______________________________________________________________________XXXXXX___
Clock Delay: 33
15:37:57:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:37:57:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:37:57:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:37:57:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
15:37:57:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXX_____
Clock Delay: 32
15:37:57:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXX_____
Clock Delay: 32
15:37:57:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:37:57:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:37:57:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:37:57:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:37:57:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
15:37:57:setup_element:INFO: Scanning data phases
15:37:57:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:37:57:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:02:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:38:02:setup_element:INFO: Eye window for uplink 16: ___XXXXX________________________________
Data delay found: 25
15:38:02:setup_element:INFO: Eye window for uplink 17: __XXXX__________________________________
Data delay found: 23
15:38:02:setup_element:INFO: Eye window for uplink 18: _XXXXX__________________________________
Data delay found: 23
15:38:02:setup_element:INFO: Eye window for uplink 19: _XXXXX__________________________________
Data delay found: 23
15:38:02:setup_element:INFO: Eye window for uplink 20: XXXXXX_________________________________X
Data delay found: 22
15:38:02:setup_element:INFO: Eye window for uplink 21: __XXXXX_________________________________
Data delay found: 24
15:38:02:setup_element:INFO: Eye window for uplink 22: ___XXXXX________________________________
Data delay found: 25
15:38:02:setup_element:INFO: Eye window for uplink 23: _XXXXX__________________________________
Data delay found: 23
15:38:02:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
15:38:02:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
15:38:02:setup_element:INFO: Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
15:38:02:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
15:38:02:setup_element:INFO: Eye window for uplink 28: __________________XXXXXX________________
Data delay found: 0
15:38:02:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
15:38:02:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXXX_____________
Data delay found: 3
15:38:02:setup_element:INFO: Eye window for uplink 31: ___________________XXXXX________________
Data delay found: 1
15:38:02:setup_element:INFO: Setting the data phase to 25 for uplink 16
15:38:02:setup_element:INFO: Setting the data phase to 23 for uplink 17
15:38:02:setup_element:INFO: Setting the data phase to 23 for uplink 18
15:38:02:setup_element:INFO: Setting the data phase to 23 for uplink 19
15:38:02:setup_element:INFO: Setting the data phase to 22 for uplink 20
15:38:02:setup_element:INFO: Setting the data phase to 24 for uplink 21
15:38:02:setup_element:INFO: Setting the data phase to 25 for uplink 22
15:38:02:setup_element:INFO: Setting the data phase to 23 for uplink 23
15:38:02:setup_element:INFO: Setting the data phase to 30 for uplink 24
15:38:02:setup_element:INFO: Setting the data phase to 32 for uplink 25
15:38:02:setup_element:INFO: Setting the data phase to 32 for uplink 26
15:38:02:setup_element:INFO: Setting the data phase to 34 for uplink 27
15:38:02:setup_element:INFO: Setting the data phase to 0 for uplink 28
15:38:02:setup_element:INFO: Setting the data phase to 0 for uplink 29
15:38:02:setup_element:INFO: Setting the data phase to 3 for uplink 30
15:38:02:setup_element:INFO: Setting the data phase to 1 for uplink 31
15:38:02:setup_element:INFO: Beginning SMX ASICs map scan
15:38:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:38:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:38:02:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:38:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:38:02:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:38:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:38:02:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:38:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:38:02:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:38:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:38:02:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:38:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:38:03:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:38:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:38:03:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:38:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:38:03:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:38:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:38:03:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:38:04:setup_element:INFO: Performing Elink synchronization
15:38:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:38:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:38:04:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:38:04:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:38:04:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:38:05:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:38:05:febtest:INFO: Init all SMX (CSA): 30
15:38:20:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:38:20:febtest:INFO: 23-00 | XA-000-09-004-017-018-020-11 | 40.9 | 1147.8
15:38:20:febtest:INFO: 30-01 | XA-000-09-004-017-010-020-11 | 50.4 | 1124.0
15:38:20:febtest:INFO: 21-02 | XA-000-09-004-017-016-020-08 | 40.9 | 1153.7
15:38:21:febtest:INFO: 28-03 | XA-000-09-004-017-013-020-03 | 40.9 | 1159.7
15:38:21:febtest:INFO: 19-04 | XA-000-09-004-017-004-014-05 | 50.4 | 1118.1
15:38:21:febtest:INFO: 26-05 | XA-000-09-004-017-013-021-03 | 47.3 | 1135.9
15:38:21:febtest:INFO: 17-06 | XA-000-09-004-017-004-013-05 | 40.9 | 1153.7
15:38:21:febtest:INFO: 24-07 | XA-000-09-004-017-016-021-08 | 34.6 | 1171.5
15:38:23:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:38:24:ST3_smx:INFO: chip: 23-0 40.898880 C 1165.571835 mV
15:38:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:24:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:24:ST3_smx:INFO: Electrons
15:38:24:ST3_smx:INFO: # loops 0
15:38:26:ST3_smx:INFO: # loops 1
15:38:28:ST3_smx:INFO: # loops 2
15:38:30:ST3_smx:INFO: Total # of broken channels: 0
15:38:30:ST3_smx:INFO: List of broken channels: []
15:38:30:ST3_smx:INFO: Total # of broken channels: 0
15:38:30:ST3_smx:INFO: List of broken channels: []
15:38:32:ST3_smx:INFO: chip: 30-1 50.430383 C 1141.874115 mV
15:38:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:32:ST3_smx:INFO: Electrons
15:38:32:ST3_smx:INFO: # loops 0
15:38:33:ST3_smx:INFO: # loops 1
15:38:35:ST3_smx:INFO: # loops 2
15:38:37:ST3_smx:INFO: Total # of broken channels: 0
15:38:37:ST3_smx:INFO: List of broken channels: []
15:38:37:ST3_smx:INFO: Total # of broken channels: 0
15:38:37:ST3_smx:INFO: List of broken channels: []
15:38:38:ST3_smx:INFO: chip: 21-2 40.898880 C 1177.390875 mV
15:38:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:38:ST3_smx:INFO: Electrons
15:38:38:ST3_smx:INFO: # loops 0
15:38:40:ST3_smx:INFO: # loops 1
15:38:41:ST3_smx:INFO: # loops 2
15:38:43:ST3_smx:INFO: Total # of broken channels: 0
15:38:43:ST3_smx:INFO: List of broken channels: []
15:38:43:ST3_smx:INFO: Total # of broken channels: 0
15:38:43:ST3_smx:INFO: List of broken channels: []
15:38:45:ST3_smx:INFO: chip: 28-3 44.073563 C 1177.390875 mV
15:38:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:45:ST3_smx:INFO: Electrons
15:38:45:ST3_smx:INFO: # loops 0
15:38:46:ST3_smx:INFO: # loops 1
15:38:48:ST3_smx:INFO: # loops 2
15:38:50:ST3_smx:INFO: Total # of broken channels: 0
15:38:50:ST3_smx:INFO: List of broken channels: []
15:38:50:ST3_smx:INFO: Total # of broken channels: 0
15:38:50:ST3_smx:INFO: List of broken channels: []
15:38:51:ST3_smx:INFO: chip: 19-4 53.612520 C 1135.937260 mV
15:38:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:51:ST3_smx:INFO: Electrons
15:38:51:ST3_smx:INFO: # loops 0
15:38:53:ST3_smx:INFO: # loops 1
15:38:55:ST3_smx:INFO: # loops 2
15:38:57:ST3_smx:INFO: Total # of broken channels: 0
15:38:57:ST3_smx:INFO: List of broken channels: []
15:38:57:ST3_smx:INFO: Total # of broken channels: 0
15:38:57:ST3_smx:INFO: List of broken channels: []
15:38:58:ST3_smx:INFO: chip: 26-5 50.430383 C 1153.732915 mV
15:38:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:38:58:ST3_smx:INFO: Electrons
15:38:58:ST3_smx:INFO: # loops 0
15:39:00:ST3_smx:INFO: # loops 1
15:39:02:ST3_smx:INFO: # loops 2
15:39:03:ST3_smx:INFO: Total # of broken channels: 0
15:39:03:ST3_smx:INFO: List of broken channels: []
15:39:03:ST3_smx:INFO: Total # of broken channels: 0
15:39:03:ST3_smx:INFO: List of broken channels: []
15:39:05:ST3_smx:INFO: chip: 17-6 47.250730 C 1177.390875 mV
15:39:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:05:ST3_smx:INFO: Electrons
15:39:05:ST3_smx:INFO: # loops 0
15:39:07:ST3_smx:INFO: # loops 1
15:39:08:ST3_smx:INFO: # loops 2
15:39:10:ST3_smx:INFO: Total # of broken channels: 0
15:39:10:ST3_smx:INFO: List of broken channels: []
15:39:10:ST3_smx:INFO: Total # of broken channels: 0
15:39:10:ST3_smx:INFO: List of broken channels: []
15:39:11:ST3_smx:INFO: chip: 24-7 40.898880 C 1183.292940 mV
15:39:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:11:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:39:11:ST3_smx:INFO: Electrons
15:39:11:ST3_smx:INFO: # loops 0
15:39:13:ST3_smx:INFO: # loops 1
15:39:15:ST3_smx:INFO: # loops 2
15:39:16:ST3_smx:INFO: Total # of broken channels: 0
15:39:16:ST3_smx:INFO: List of broken channels: []
15:39:16:ST3_smx:INFO: Total # of broken channels: 3
15:39:16:ST3_smx:INFO: List of broken channels: [90, 92, 98]
15:39:17:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:39:17:febtest:INFO: 23-00 | XA-000-09-004-017-018-020-11 | 47.3 | 1189.2
15:39:17:febtest:INFO: 30-01 | XA-000-09-004-017-010-020-11 | 53.6 | 1165.6
15:39:17:febtest:INFO: 21-02 | XA-000-09-004-017-016-020-08 | 47.3 | 1195.1
15:39:17:febtest:INFO: 28-03 | XA-000-09-004-017-013-020-03 | 47.3 | 1201.0
15:39:18:febtest:INFO: 19-04 | XA-000-09-004-017-004-014-05 | 56.8 | 1159.7
15:39:18:febtest:INFO: 26-05 | XA-000-09-004-017-013-021-03 | 53.6 | 1171.5
15:39:18:febtest:INFO: 17-06 | XA-000-09-004-017-004-013-05 | 47.3 | 1189.2
15:39:18:febtest:INFO: 24-07 | XA-000-09-004-017-016-021-08 | 44.1 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_18-15_37_54
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4349| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5440', '1.849', '2.0390']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0110', '1.850', '2.5990']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9860', '1.851', '0.5303']