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FEB_4350 17.02.26 08:56:52
Info
08:56:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:52:ST3_Shared:INFO: FEB-Microcable
08:56:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:56:52:febtest:INFO: Testing FEB with SN 4350
08:56:54:smx_tester:INFO: Scanning setup
08:56:54:elinks:INFO: Disabling clock on downlink 0
08:56:54:elinks:INFO: Disabling clock on downlink 1
08:56:54:elinks:INFO: Disabling clock on downlink 2
08:56:54:elinks:INFO: Disabling clock on downlink 3
08:56:54:elinks:INFO: Disabling clock on downlink 4
08:56:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:56:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:54:elinks:INFO: Disabling clock on downlink 0
08:56:54:elinks:INFO: Disabling clock on downlink 1
08:56:54:elinks:INFO: Disabling clock on downlink 2
08:56:54:elinks:INFO: Disabling clock on downlink 3
08:56:54:elinks:INFO: Disabling clock on downlink 4
08:56:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:56:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:54:elinks:INFO: Disabling clock on downlink 0
08:56:54:elinks:INFO: Disabling clock on downlink 1
08:56:54:elinks:INFO: Disabling clock on downlink 2
08:56:54:elinks:INFO: Disabling clock on downlink 3
08:56:54:elinks:INFO: Disabling clock on downlink 4
08:56:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:56:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:56:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:56:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:56:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:56:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:56:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:56:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:56:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:54:elinks:INFO: Disabling clock on downlink 0
08:56:54:elinks:INFO: Disabling clock on downlink 1
08:56:54:elinks:INFO: Disabling clock on downlink 2
08:56:54:elinks:INFO: Disabling clock on downlink 3
08:56:54:elinks:INFO: Disabling clock on downlink 4
08:56:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:56:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:54:elinks:INFO: Disabling clock on downlink 0
08:56:54:elinks:INFO: Disabling clock on downlink 1
08:56:54:elinks:INFO: Disabling clock on downlink 2
08:56:54:elinks:INFO: Disabling clock on downlink 3
08:56:54:elinks:INFO: Disabling clock on downlink 4
08:56:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:56:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:56:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:56:54:setup_element:INFO: Scanning clock phase
08:56:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:54:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:56:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:56:55:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
08:56:55:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXXX_____
Clock Delay: 31
08:56:55:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:56:55:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:56:55:setup_element:INFO: Eye window for uplink 28: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:56:55:setup_element:INFO: Eye window for uplink 29: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:56:55:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:56:55:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXX___
Clock Delay: 34
08:56:55:setup_element:INFO: Setting the clock phase to 32 for group 0, downlink 2
08:56:55:setup_element:INFO: Scanning data phases
08:56:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:56:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:57:00:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:57:00:setup_element:INFO: Eye window for uplink 24: ________XXXXX___________________________
Data delay found: 30
08:57:00:setup_element:INFO: Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
08:57:00:setup_element:INFO: Eye window for uplink 26: _____________XXXXX______________________
Data delay found: 35
08:57:00:setup_element:INFO: Eye window for uplink 27: _______________XXXXXXX__________________
Data delay found: 38
08:57:00:setup_element:INFO: Eye window for uplink 28: __________________XXXXXXX_______________
Data delay found: 1
08:57:00:setup_element:INFO: Eye window for uplink 29: __________________XXXXXX________________
Data delay found: 0
08:57:00:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXXX_____________
Data delay found: 3
08:57:00:setup_element:INFO: Eye window for uplink 31: ___________________XXXXXX_______________
Data delay found: 1
08:57:00:setup_element:INFO: Setting the data phase to 30 for uplink 24
08:57:00:setup_element:INFO: Setting the data phase to 32 for uplink 25
08:57:00:setup_element:INFO: Setting the data phase to 35 for uplink 26
08:57:00:setup_element:INFO: Setting the data phase to 38 for uplink 27
08:57:00:setup_element:INFO: Setting the data phase to 1 for uplink 28
08:57:00:setup_element:INFO: Setting the data phase to 0 for uplink 29
08:57:00:setup_element:INFO: Setting the data phase to 3 for uplink 30
08:57:00:setup_element:INFO: Setting the data phase to 1 for uplink 31
08:57:00:setup_element:INFO: Beginning SMX ASICs map scan
08:57:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:57:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:57:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:57:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:57:00:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:57:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:57:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:57:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:57:00:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:57:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:57:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:57:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:57:01:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:57:02:setup_element:INFO: Performing Elink synchronization
08:57:02:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:57:02:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:57:02:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:57:02:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:57:02:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:57:02:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:57:03:febtest:INFO: Init all SMX (CSA): 30
08:57:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:57:12:febtest:INFO: 30-01 | XA-000-09-004-017-005-008-08 | 31.4 | 1183.3
08:57:12:febtest:INFO: 28-03 | XA-000-09-004-017-008-008-15 | 50.4 | 1130.0
08:57:12:febtest:INFO: 26-05 | XA-000-09-004-017-011-008-01 | 44.1 | 1147.8
08:57:12:febtest:INFO: 24-07 | XA-000-09-004-017-011-009-01 | 31.4 | 1183.3
08:57:13:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:57:15:ST3_smx:INFO: chip: 30-1 31.389742 C 1195.082160 mV
08:57:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:15:ST3_smx:INFO: Electrons
08:57:15:ST3_smx:INFO: # loops 0
08:57:17:ST3_smx:INFO: # loops 1
08:57:19:ST3_smx:INFO: # loops 2
08:57:21:ST3_smx:INFO: Total # of broken channels: 0
08:57:21:ST3_smx:INFO: List of broken channels: []
08:57:21:ST3_smx:INFO: Total # of broken channels: 0
08:57:21:ST3_smx:INFO: List of broken channels: []
08:57:23:ST3_smx:INFO: chip: 28-3 50.430383 C 1135.937260 mV
08:57:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:23:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:23:ST3_smx:INFO: Electrons
08:57:23:ST3_smx:INFO: # loops 0
08:57:25:ST3_smx:INFO: # loops 1
08:57:27:ST3_smx:INFO: # loops 2
08:57:29:ST3_smx:INFO: Total # of broken channels: 0
08:57:29:ST3_smx:INFO: List of broken channels: []
08:57:29:ST3_smx:INFO: Total # of broken channels: 0
08:57:29:ST3_smx:INFO: List of broken channels: []
08:57:31:ST3_smx:INFO: chip: 26-5 47.250730 C 1153.732915 mV
08:57:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:31:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:31:ST3_smx:INFO: Electrons
08:57:31:ST3_smx:INFO: # loops 0
08:57:33:ST3_smx:INFO: # loops 1
08:57:34:ST3_smx:INFO: # loops 2
08:57:36:ST3_smx:INFO: Total # of broken channels: 0
08:57:36:ST3_smx:INFO: List of broken channels: []
08:57:36:ST3_smx:INFO: Total # of broken channels: 0
08:57:36:ST3_smx:INFO: List of broken channels: []
08:57:38:ST3_smx:INFO: chip: 24-7 34.556970 C 1189.190035 mV
08:57:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:38:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:57:38:ST3_smx:INFO: Electrons
08:57:38:ST3_smx:INFO: # loops 0
08:57:40:ST3_smx:INFO: # loops 1
08:57:42:ST3_smx:INFO: # loops 2
08:57:44:ST3_smx:INFO: Total # of broken channels: 0
08:57:44:ST3_smx:INFO: List of broken channels: []
08:57:44:ST3_smx:INFO: Total # of broken channels: 0
08:57:44:ST3_smx:INFO: List of broken channels: []
08:57:44:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:57:45:febtest:INFO: 30-01 | XA-000-09-004-017-005-008-08 | 34.6 | 1218.6
08:57:45:febtest:INFO: 28-03 | XA-000-09-004-017-008-008-15 | 53.6 | 1165.6
08:57:45:febtest:INFO: 26-05 | XA-000-09-004-017-011-008-01 | 50.4 | 1177.4
08:57:45:febtest:INFO: 24-07 | XA-000-09-004-017-011-009-01 | 37.7 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_17-08_56_52
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4350| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7921', '1.846', '1.6250']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0080', '1.850', '1.3080']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '0.2681']