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FEB_4350 18.02.26 15:03:33
Info
15:03:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:03:33:ST3_Shared:INFO: FEB-Microcable
15:03:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:03:33:febtest:INFO: Testing FEB with SN 3350
15:03:34:smx_tester:INFO: Scanning setup
15:03:34:elinks:INFO: Disabling clock on downlink 0
15:03:34:elinks:INFO: Disabling clock on downlink 1
15:03:34:elinks:INFO: Disabling clock on downlink 2
15:03:34:elinks:INFO: Disabling clock on downlink 3
15:03:34:elinks:INFO: Disabling clock on downlink 4
15:03:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:03:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:34:elinks:INFO: Disabling clock on downlink 0
15:03:34:elinks:INFO: Disabling clock on downlink 1
15:03:34:elinks:INFO: Disabling clock on downlink 2
15:03:34:elinks:INFO: Disabling clock on downlink 3
15:03:34:elinks:INFO: Disabling clock on downlink 4
15:03:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 0
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 1
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 2
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 3
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 4
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 5
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 6
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 7
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 8
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 9
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 10
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 11
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 12
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 13
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 14
15:03:35:setup_element:INFO: SOS detected for group 0, downlink 1, uplink 15
15:03:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:35:elinks:INFO: Disabling clock on downlink 0
15:03:35:elinks:INFO: Disabling clock on downlink 1
15:03:35:elinks:INFO: Disabling clock on downlink 2
15:03:35:elinks:INFO: Disabling clock on downlink 3
15:03:35:elinks:INFO: Disabling clock on downlink 4
15:03:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:03:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:35:elinks:INFO: Disabling clock on downlink 0
15:03:35:elinks:INFO: Disabling clock on downlink 1
15:03:35:elinks:INFO: Disabling clock on downlink 2
15:03:35:elinks:INFO: Disabling clock on downlink 3
15:03:35:elinks:INFO: Disabling clock on downlink 4
15:03:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:03:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:35:elinks:INFO: Disabling clock on downlink 0
15:03:35:elinks:INFO: Disabling clock on downlink 1
15:03:35:elinks:INFO: Disabling clock on downlink 2
15:03:35:elinks:INFO: Disabling clock on downlink 3
15:03:35:elinks:INFO: Disabling clock on downlink 4
15:03:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:03:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:03:35:setup_element:INFO: Scanning clock phase
15:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:03:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:03:35:setup_element:INFO: Clock phase scan results for group 0, downlink 1
15:03:35:setup_element:INFO: Eye window for uplink 0 : __________________________________________________________________________XXXXX_
Clock Delay: 36
15:03:35:setup_element:INFO: Eye window for uplink 1 : __________________________________________________________________________XXXXX_
Clock Delay: 36
15:03:35:setup_element:INFO: Eye window for uplink 2 : ________________________________________________________________________________
Clock Delay: 40
15:03:35:setup_element:INFO: Eye window for uplink 3 : ________________________________________________________________________________
Clock Delay: 40
15:03:35:setup_element:INFO: Eye window for uplink 4 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:03:35:setup_element:INFO: Eye window for uplink 5 : _______________________________________________________________________XXXXXXX__
Clock Delay: 34
15:03:35:setup_element:INFO: Eye window for uplink 6 : _________________________________________________________________________XXXXX__
Clock Delay: 35
15:03:35:setup_element:INFO: Eye window for uplink 7 : _________________________________________________________________________XXXXX__
Clock Delay: 35
15:03:35:setup_element:INFO: Eye window for uplink 8 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:03:35:setup_element:INFO: Eye window for uplink 9 : _________________________________________________________________________XXXXXX_
Clock Delay: 35
15:03:35:setup_element:INFO: Eye window for uplink 10: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:03:35:setup_element:INFO: Eye window for uplink 11: ________________________________________________________________________XXXXXX__
Clock Delay: 34
15:03:35:setup_element:INFO: Eye window for uplink 12: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:03:35:setup_element:INFO: Eye window for uplink 13: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
15:03:35:setup_element:INFO: Eye window for uplink 14: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:03:35:setup_element:INFO: Eye window for uplink 15: ________________________________________________________________________XXXXX___
Clock Delay: 34
15:03:35:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 1
15:03:35:setup_element:INFO: Scanning data phases
15:03:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:03:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:03:41:setup_element:INFO: Data phase scan results for group 0, downlink 1
15:03:41:setup_element:INFO: Eye window for uplink 0 : ________________XXXXX___________________
Data delay found: 38
15:03:41:setup_element:INFO: Eye window for uplink 1 : ______________XXXX______________________
Data delay found: 35
15:03:41:setup_element:INFO: Eye window for uplink 2 : ____________XXXX________________________
Data delay found: 33
15:03:41:setup_element:INFO: Eye window for uplink 3 : __________XXXXX_________________________
Data delay found: 32
15:03:41:setup_element:INFO: Eye window for uplink 4 : _______XXXX_____________________________
Data delay found: 28
15:03:41:setup_element:INFO: Eye window for uplink 5 : ______XXXXX_____________________________
Data delay found: 28
15:03:41:setup_element:INFO: Eye window for uplink 6 : ___XXXX_________________________________
Data delay found: 24
15:03:41:setup_element:INFO: Eye window for uplink 7 : _XXXXX__________________________________
Data delay found: 23
15:03:41:setup_element:INFO: Eye window for uplink 8 : ________________________________XXXXX___
Data delay found: 14
15:03:41:setup_element:INFO: Eye window for uplink 9 : __________________________________XXXXX_
Data delay found: 16
15:03:41:setup_element:INFO: Eye window for uplink 10: _________________________________XXXXX__
Data delay found: 15
15:03:41:setup_element:INFO: Eye window for uplink 11: ___________________________________XXXXX
Data delay found: 17
15:03:41:setup_element:INFO: Eye window for uplink 12: __________________________________XXXX__
Data delay found: 15
15:03:41:setup_element:INFO: Eye window for uplink 13: __________________________________XXXX__
Data delay found: 15
15:03:41:setup_element:INFO: Eye window for uplink 14: _________________________________XXXXX__
Data delay found: 15
15:03:41:setup_element:INFO: Eye window for uplink 15: _________________________________XXXXXX_
Data delay found: 15
15:03:41:setup_element:INFO: Setting the data phase to 38 for uplink 0
15:03:41:setup_element:INFO: Setting the data phase to 35 for uplink 1
15:03:41:setup_element:INFO: Setting the data phase to 33 for uplink 2
15:03:41:setup_element:INFO: Setting the data phase to 32 for uplink 3
15:03:41:setup_element:INFO: Setting the data phase to 28 for uplink 4
15:03:41:setup_element:INFO: Setting the data phase to 28 for uplink 5
15:03:41:setup_element:INFO: Setting the data phase to 24 for uplink 6
15:03:41:setup_element:INFO: Setting the data phase to 23 for uplink 7
15:03:41:setup_element:INFO: Setting the data phase to 14 for uplink 8
15:03:41:setup_element:INFO: Setting the data phase to 16 for uplink 9
15:03:41:setup_element:INFO: Setting the data phase to 15 for uplink 10
15:03:41:setup_element:INFO: Setting the data phase to 17 for uplink 11
15:03:41:setup_element:INFO: Setting the data phase to 15 for uplink 12
15:03:41:setup_element:INFO: Setting the data phase to 15 for uplink 13
15:03:41:setup_element:INFO: Setting the data phase to 15 for uplink 14
15:03:41:setup_element:INFO: Setting the data phase to 15 for uplink 15
15:03:41:setup_element:INFO: Beginning SMX ASICs map scan
15:03:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:03:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:03:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:03:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:03:41:uplink:INFO: Setting uplinks mask [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
15:03:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 1
15:03:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 0
15:03:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 8
15:03:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 9
15:03:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 3
15:03:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 2
15:03:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 10
15:03:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 11
15:03:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 5
15:03:42:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 4
15:03:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 12
15:03:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 13
15:03:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 7
15:03:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 6
15:03:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 14
15:03:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 15
15:03:43:setup_element:INFO: Performing Elink synchronization
15:03:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:03:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [1]
15:03:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [1]
15:03:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [1]
15:03:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 1
15:03:43:uplink:INFO: Enabling uplinks [0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 1 | 0 | [1] | 2 | [(0, 1), (1, 0)]
1 | [0] | 1 | 0 | [8] | 2 | [(0, 8), (1, 9)]
2 | [0] | 1 | 0 | [3] | 2 | [(0, 3), (1, 2)]
3 | [0] | 1 | 0 | [10] | 2 | [(0, 10), (1, 11)]
4 | [0] | 1 | 0 | [5] | 2 | [(0, 5), (1, 4)]
5 | [0] | 1 | 0 | [12] | 2 | [(0, 12), (1, 13)]
6 | [0] | 1 | 0 | [7] | 2 | [(0, 7), (1, 6)]
7 | [0] | 1 | 0 | [14] | 2 | [(0, 14), (1, 15)]
|_________________________________________________________________________|
15:03:44:febtest:INFO: Init all SMX (CSA): 30
15:04:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:04:01:febtest:INFO: 01-00 | XA-000-09-004-017-013-022-03 | 34.6 | 1159.7
15:04:01:febtest:INFO: 08-01 | XA-000-09-004-017-004-022-02 | 31.4 | 1159.7
15:04:01:febtest:INFO: 03-02 | XA-000-09-004-017-010-022-11 | 31.4 | 1171.5
15:04:02:febtest:INFO: 10-03 | XA-000-09-004-017-007-022-12 | 34.6 | 1141.9
15:04:02:febtest:INFO: 05-04 | XA-000-09-004-017-007-021-12 | 37.7 | 1147.8
15:04:02:febtest:INFO: 12-05 | XA-000-09-004-017-005-006-08 | 37.7 | 1147.8
15:04:02:febtest:INFO: 07-06 | XA-000-09-004-017-004-021-02 | 34.6 | 1165.6
15:04:02:febtest:INFO: 14-07 | XA-000-09-004-017-008-006-15 | 18.7 | 1206.9
15:04:03:febtest:INFO: Set all CSA to ZERO
FEB type: A FEB_A: 1 FEB_B: 0
15:04:05:ST3_smx:INFO: chip: 1-0 34.556970 C 1177.390875 mV
15:04:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:06:ST3_smx:INFO: Electrons
15:04:06:ST3_smx:INFO: # loops 0
15:04:07:ST3_smx:INFO: # loops 1
15:04:09:ST3_smx:INFO: # loops 2
15:04:11:ST3_smx:INFO: Total # of broken channels: 0
15:04:11:ST3_smx:INFO: List of broken channels: []
15:04:11:ST3_smx:INFO: Total # of broken channels: 0
15:04:11:ST3_smx:INFO: List of broken channels: []
15:04:13:ST3_smx:INFO: chip: 8-1 31.389742 C 1183.292940 mV
15:04:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:13:ST3_smx:INFO: Electrons
15:04:13:ST3_smx:INFO: # loops 0
15:04:15:ST3_smx:INFO: # loops 1
15:04:17:ST3_smx:INFO: # loops 2
15:04:19:ST3_smx:INFO: Total # of broken channels: 0
15:04:19:ST3_smx:INFO: List of broken channels: []
15:04:19:ST3_smx:INFO: Total # of broken channels: 0
15:04:19:ST3_smx:INFO: List of broken channels: []
15:04:20:ST3_smx:INFO: chip: 3-2 31.389742 C 1189.190035 mV
15:04:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:20:ST3_smx:INFO: Electrons
15:04:20:ST3_smx:INFO: # loops 0
15:04:23:ST3_smx:INFO: # loops 1
15:04:24:ST3_smx:INFO: # loops 2
15:04:26:ST3_smx:INFO: Total # of broken channels: 0
15:04:26:ST3_smx:INFO: List of broken channels: []
15:04:26:ST3_smx:INFO: Total # of broken channels: 0
15:04:26:ST3_smx:INFO: List of broken channels: []
15:04:28:ST3_smx:INFO: chip: 10-3 37.726682 C 1159.654860 mV
15:04:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:28:ST3_smx:INFO: Electrons
15:04:28:ST3_smx:INFO: # loops 0
15:04:30:ST3_smx:INFO: # loops 1
15:04:32:ST3_smx:INFO: # loops 2
15:04:34:ST3_smx:INFO: Total # of broken channels: 0
15:04:34:ST3_smx:INFO: List of broken channels: []
15:04:34:ST3_smx:INFO: Total # of broken channels: 0
15:04:34:ST3_smx:INFO: List of broken channels: []
15:04:36:ST3_smx:INFO: chip: 5-4 37.726682 C 1159.654860 mV
15:04:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:36:ST3_smx:INFO: Electrons
15:04:36:ST3_smx:INFO: # loops 0
15:04:38:ST3_smx:INFO: # loops 1
15:04:40:ST3_smx:INFO: # loops 2
15:04:41:ST3_smx:INFO: Total # of broken channels: 0
15:04:41:ST3_smx:INFO: List of broken channels: []
15:04:41:ST3_smx:INFO: Total # of broken channels: 0
15:04:41:ST3_smx:INFO: List of broken channels: []
15:04:43:ST3_smx:INFO: chip: 12-5 37.726682 C 1165.571835 mV
15:04:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:43:ST3_smx:INFO: Electrons
15:04:43:ST3_smx:INFO: # loops 0
15:04:44:ST3_smx:INFO: # loops 1
15:04:46:ST3_smx:INFO: # loops 2
15:04:47:ST3_smx:INFO: Total # of broken channels: 1
15:04:47:ST3_smx:INFO: List of broken channels: [41]
15:04:47:ST3_smx:INFO: Total # of broken channels: 0
15:04:47:ST3_smx:INFO: List of broken channels: []
15:04:49:ST3_smx:INFO: chip: 7-6 37.726682 C 1183.292940 mV
15:04:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:49:ST3_smx:INFO: Electrons
15:04:49:ST3_smx:INFO: # loops 0
15:04:51:ST3_smx:INFO: # loops 1
15:04:52:ST3_smx:INFO: # loops 2
15:04:54:ST3_smx:INFO: Total # of broken channels: 0
15:04:54:ST3_smx:INFO: List of broken channels: []
15:04:54:ST3_smx:INFO: Total # of broken channels: 0
15:04:54:ST3_smx:INFO: List of broken channels: []
15:04:55:ST3_smx:INFO: chip: 14-7 21.902970 C 1224.468235 mV
15:04:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:04:55:ST3_smx:INFO: Electrons
15:04:55:ST3_smx:INFO: # loops 0
15:04:57:ST3_smx:INFO: # loops 1
15:04:58:ST3_smx:INFO: # loops 2
15:05:00:ST3_smx:INFO: Total # of broken channels: 0
15:05:00:ST3_smx:INFO: List of broken channels: []
15:05:00:ST3_smx:INFO: Total # of broken channels: 0
15:05:00:ST3_smx:INFO: List of broken channels: []
15:05:00:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:05:00:febtest:INFO: 01-00 | XA-000-09-004-017-013-022-03 | 34.6 | 1206.9
15:05:01:febtest:INFO: 08-01 | XA-000-09-004-017-004-022-02 | 31.4 | 1201.0
15:05:01:febtest:INFO: 03-02 | XA-000-09-004-017-010-022-11 | 34.6 | 1206.9
15:05:01:febtest:INFO: 10-03 | XA-000-09-004-017-007-022-12 | 37.7 | 1183.3
15:05:01:febtest:INFO: 05-04 | XA-000-09-004-017-007-021-12 | 40.9 | 1183.3
15:05:02:febtest:INFO: 12-05 | XA-000-09-004-017-005-006-08 | 37.7 | 1189.2
15:05:02:febtest:INFO: 07-06 | XA-000-09-004-017-004-021-02 | 37.7 | 1212.7
15:05:02:febtest:INFO: 14-07 | XA-000-09-004-017-008-006-15 | 25.1 | 1242.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_18-15_03_33
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 3350| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_A
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['2.450', '1.5360', '1.850', '2.6570', '0.000', '0.0000', '0.000', '0.0000']
VI_after__Init : ['2.450', '2.0100', '1.850', '2.4170', '0.000', '0.0000', '0.000', '0.0000']
VI_at__the_End : ['2.450', '1.9670', '1.850', '0.5267', '0.000', '0.0000', '0.000', '0.0000']
15:08:24:febtest:INFO: FEB type: 8.2
15:08:24:febtest:INFO: FEB SN: 4350