FEB_4354 20.02.26 14:07:09
Info
14:07:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:07:09:ST3_Shared:INFO: FEB-Microcable
14:07:09:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
14:07:09:febtest:INFO: Testing FEB with SN 4354
14:07:11:smx_tester:INFO: Scanning setup
14:07:11:elinks:INFO: Disabling clock on downlink 0
14:07:11:elinks:INFO: Disabling clock on downlink 1
14:07:11:elinks:INFO: Disabling clock on downlink 2
14:07:11:elinks:INFO: Disabling clock on downlink 3
14:07:11:elinks:INFO: Disabling clock on downlink 4
14:07:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
14:07:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:11:elinks:INFO: Disabling clock on downlink 0
14:07:11:elinks:INFO: Disabling clock on downlink 1
14:07:11:elinks:INFO: Disabling clock on downlink 2
14:07:11:elinks:INFO: Disabling clock on downlink 3
14:07:11:elinks:INFO: Disabling clock on downlink 4
14:07:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
14:07:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:11:elinks:INFO: Disabling clock on downlink 0
14:07:11:elinks:INFO: Disabling clock on downlink 1
14:07:11:elinks:INFO: Disabling clock on downlink 2
14:07:11:elinks:INFO: Disabling clock on downlink 3
14:07:11:elinks:INFO: Disabling clock on downlink 4
14:07:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:07:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
14:07:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
14:07:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
14:07:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
14:07:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
14:07:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
14:07:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
14:07:11:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
14:07:11:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:11:elinks:INFO: Disabling clock on downlink 0
14:07:11:elinks:INFO: Disabling clock on downlink 1
14:07:11:elinks:INFO: Disabling clock on downlink 2
14:07:11:elinks:INFO: Disabling clock on downlink 3
14:07:11:elinks:INFO: Disabling clock on downlink 4
14:07:11:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:11:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
14:07:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:12:elinks:INFO: Disabling clock on downlink 0
14:07:12:elinks:INFO: Disabling clock on downlink 1
14:07:12:elinks:INFO: Disabling clock on downlink 2
14:07:12:elinks:INFO: Disabling clock on downlink 3
14:07:12:elinks:INFO: Disabling clock on downlink 4
14:07:12:setup_element:INFO: Checking SOS, encoding_mode: SOS
14:07:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
14:07:12:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
14:07:12:setup_element:INFO: Scanning clock phase
14:07:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:07:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:07:12:setup_element:INFO: Clock phase scan results for group 0, downlink 2
14:07:12:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:07:12:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
14:07:12:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXX_____
Clock Delay: 32
14:07:12:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXX_____
Clock Delay: 32
14:07:12:setup_element:INFO: Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:07:12:setup_element:INFO: Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
14:07:12:setup_element:INFO: Eye window for uplink 30: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:07:12:setup_element:INFO: Eye window for uplink 31: _______________________________________________________________________XXXXXX___
Clock Delay: 33
14:07:12:setup_element:INFO: Setting the clock phase to 33 for group 0, downlink 2
14:07:12:setup_element:INFO: Scanning data phases
14:07:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:07:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:07:17:setup_element:INFO: Data phase scan results for group 0, downlink 2
14:07:17:setup_element:INFO: Eye window for uplink 24: _________XXXXXX_________________________
Data delay found: 31
14:07:17:setup_element:INFO: Eye window for uplink 25: ___________XXXXXX_______________________
Data delay found: 33
14:07:17:setup_element:INFO: Eye window for uplink 26: ___________XXXXX________________________
Data delay found: 33
14:07:17:setup_element:INFO: Eye window for uplink 27: _____________XXXXXX_____________________
Data delay found: 35
14:07:17:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXXX______________
Data delay found: 2
14:07:17:setup_element:INFO: Eye window for uplink 29: ___________________XXXXXX_______________
Data delay found: 1
14:07:17:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________
Data delay found: 2
14:07:17:setup_element:INFO: Eye window for uplink 31: ___________________XXXX_________________
Data delay found: 0
14:07:17:setup_element:INFO: Setting the data phase to 31 for uplink 24
14:07:17:setup_element:INFO: Setting the data phase to 33 for uplink 25
14:07:17:setup_element:INFO: Setting the data phase to 33 for uplink 26
14:07:17:setup_element:INFO: Setting the data phase to 35 for uplink 27
14:07:17:setup_element:INFO: Setting the data phase to 2 for uplink 28
14:07:17:setup_element:INFO: Setting the data phase to 1 for uplink 29
14:07:17:setup_element:INFO: Setting the data phase to 2 for uplink 30
14:07:17:setup_element:INFO: Setting the data phase to 0 for uplink 31
14:07:17:setup_element:INFO: Beginning SMX ASICs map scan
14:07:17:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:07:17:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:07:17:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:07:17:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:07:17:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
14:07:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
14:07:17:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
14:07:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
14:07:18:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
14:07:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
14:07:18:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
14:07:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
14:07:18:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
14:07:20:setup_element:INFO: Performing Elink synchronization
14:07:20:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
14:07:20:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
14:07:20:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
14:07:20:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
14:07:20:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
14:07:20:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
14:07:20:febtest:INFO: Init all SMX (CSA): 30
14:07:28:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:07:29:febtest:INFO: 30-01 | XA-000-09-004-017-007-025-12 | 34.6 | 1183.3
14:07:29:febtest:INFO: 28-03 | XA-000-09-004-017-007-026-12 | 44.1 | 1141.9
14:07:29:febtest:INFO: 26-05 | XA-000-09-004-017-013-024-03 | 40.9 | 1159.7
14:07:29:febtest:INFO: 24-07 | XA-000-09-004-017-007-024-12 | 50.4 | 1124.0
14:07:30:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
14:07:32:ST3_smx:INFO: chip: 30-1 37.726682 C 1195.082160 mV
14:07:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:32:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:32:ST3_smx:INFO: Electrons
14:07:32:ST3_smx:INFO: # loops 0
14:07:34:ST3_smx:INFO: # loops 1
14:07:36:ST3_smx:INFO: # loops 2
14:07:37:ST3_smx:INFO: Total # of broken channels: 0
14:07:37:ST3_smx:INFO: List of broken channels: []
14:07:37:ST3_smx:INFO: Total # of broken channels: 0
14:07:37:ST3_smx:INFO: List of broken channels: []
14:07:39:ST3_smx:INFO: chip: 28-3 44.073563 C 1159.654860 mV
14:07:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:39:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:39:ST3_smx:INFO: Electrons
14:07:39:ST3_smx:INFO: # loops 0
14:07:40:ST3_smx:INFO: # loops 1
14:07:42:ST3_smx:INFO: # loops 2
14:07:43:ST3_smx:INFO: Total # of broken channels: 0
14:07:43:ST3_smx:INFO: List of broken channels: []
14:07:43:ST3_smx:INFO: Total # of broken channels: 0
14:07:43:ST3_smx:INFO: List of broken channels: []
14:07:45:ST3_smx:INFO: chip: 26-5 40.898880 C 1171.483840 mV
14:07:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:45:ST3_smx:INFO: Electrons
14:07:45:ST3_smx:INFO: # loops 0
14:07:47:ST3_smx:INFO: # loops 1
14:07:48:ST3_smx:INFO: # loops 2
14:07:50:ST3_smx:INFO: Total # of broken channels: 0
14:07:50:ST3_smx:INFO: List of broken channels: []
14:07:50:ST3_smx:INFO: Total # of broken channels: 0
14:07:50:ST3_smx:INFO: List of broken channels: []
14:07:51:ST3_smx:INFO: chip: 24-7 53.612520 C 1129.995435 mV
14:07:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
14:07:51:ST3_smx:INFO: Electrons
14:07:51:ST3_smx:INFO: # loops 0
14:07:53:ST3_smx:INFO: # loops 1
14:07:54:ST3_smx:INFO: # loops 2
14:07:57:ST3_smx:INFO: Total # of broken channels: 0
14:07:57:ST3_smx:INFO: List of broken channels: []
14:07:57:ST3_smx:INFO: Total # of broken channels: 0
14:07:57:ST3_smx:INFO: List of broken channels: []
14:07:57:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
14:07:57:febtest:INFO: 30-01 | XA-000-09-004-017-007-025-12 | 37.7 | 1212.7
14:07:57:febtest:INFO: 28-03 | XA-000-09-004-017-007-026-12 | 47.3 | 1183.3
14:07:57:febtest:INFO: 26-05 | XA-000-09-004-017-013-024-03 | 44.1 | 1195.1
14:07:58:febtest:INFO: 24-07 | XA-000-09-004-017-007-024-12 | 56.8 | 1147.8
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_20-14_07_09
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4354| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7041', '1.850', '1.3790']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9894', '1.850', '1.3040']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9913', '1.850', '0.2683']