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FEB_4354 23.02.26 11:16:02
Info
11:16:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:16:02:ST3_Shared:INFO: FEB-Microcable
11:16:02:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:16:02:febtest:INFO: Testing FEB with SN 4354
11:16:03:smx_tester:INFO: Scanning setup
11:16:03:elinks:INFO: Disabling clock on downlink 0
11:16:03:elinks:INFO: Disabling clock on downlink 1
11:16:03:elinks:INFO: Disabling clock on downlink 2
11:16:03:elinks:INFO: Disabling clock on downlink 3
11:16:03:elinks:INFO: Disabling clock on downlink 4
11:16:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:16:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:16:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:16:03:elinks:INFO: Disabling clock on downlink 0
11:16:03:elinks:INFO: Disabling clock on downlink 1
11:16:03:elinks:INFO: Disabling clock on downlink 2
11:16:03:elinks:INFO: Disabling clock on downlink 3
11:16:03:elinks:INFO: Disabling clock on downlink 4
11:16:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:16:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:16:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:16:03:elinks:INFO: Disabling clock on downlink 0
11:16:03:elinks:INFO: Disabling clock on downlink 1
11:16:03:elinks:INFO: Disabling clock on downlink 2
11:16:03:elinks:INFO: Disabling clock on downlink 3
11:16:03:elinks:INFO: Disabling clock on downlink 4
11:16:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:16:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:16:04:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:16:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:16:04:elinks:INFO: Disabling clock on downlink 0
11:16:04:elinks:INFO: Disabling clock on downlink 1
11:16:04:elinks:INFO: Disabling clock on downlink 2
11:16:04:elinks:INFO: Disabling clock on downlink 3
11:16:04:elinks:INFO: Disabling clock on downlink 4
11:16:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:16:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:16:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:16:04:elinks:INFO: Disabling clock on downlink 0
11:16:04:elinks:INFO: Disabling clock on downlink 1
11:16:04:elinks:INFO: Disabling clock on downlink 2
11:16:04:elinks:INFO: Disabling clock on downlink 3
11:16:04:elinks:INFO: Disabling clock on downlink 4
11:16:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:16:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:16:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:16:04:setup_element:INFO: Scanning clock phase
11:16:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:16:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:16:04:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:16:04:setup_element:INFO: Eye window for uplink 16: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:16:04:setup_element:INFO: Eye window for uplink 17: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:16:04:setup_element:INFO: Eye window for uplink 18: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:16:04:setup_element:INFO: Eye window for uplink 19: _______________________________________________________________________XXXXXX___
Clock Delay: 33
11:16:04:setup_element:INFO: Eye window for uplink 20: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:16:04:setup_element:INFO: Eye window for uplink 21: _________________________________________________________________________XXXXX__
Clock Delay: 35
11:16:04:setup_element:INFO: Eye window for uplink 22: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:16:04:setup_element:INFO: Eye window for uplink 23: ________________________________________________________________________XXXXXX__
Clock Delay: 34
11:16:04:setup_element:INFO: Eye window for uplink 24: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:16:04:setup_element:INFO: Eye window for uplink 25: _______________________________________________________________________XXXXX____
Clock Delay: 33
11:16:04:setup_element:INFO: Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:16:04:setup_element:INFO: Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
11:16:04:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:16:04:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________________XXXXXX_
Clock Delay: 35
11:16:04:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:16:04:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
11:16:04:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
11:16:04:setup_element:INFO: Scanning data phases
11:16:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:16:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:16:09:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:16:09:setup_element:INFO: Eye window for uplink 16: ___XXXX_________________________________
Data delay found: 24
11:16:09:setup_element:INFO: Eye window for uplink 17: __XXXX__________________________________
Data delay found: 23
11:16:09:setup_element:INFO: Eye window for uplink 18: XXX___________________________________XX
Data delay found: 20
11:16:09:setup_element:INFO: Eye window for uplink 19: XXX__________________________________XXX
Data delay found: 19
11:16:09:setup_element:INFO: Eye window for uplink 20: XXXXX__________________________________X
Data delay found: 21
11:16:09:setup_element:INFO: Eye window for uplink 21: __XXXXX_________________________________
Data delay found: 24
11:16:09:setup_element:INFO: Eye window for uplink 22: _XXXXX__________________________________
Data delay found: 23
11:16:09:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________XX
Data delay found: 20
11:16:09:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
11:16:09:setup_element:INFO: Eye window for uplink 25: _________XXXXXX_________________________
Data delay found: 31
11:16:09:setup_element:INFO: Eye window for uplink 26: __________XXXXX_________________________
Data delay found: 32
11:16:09:setup_element:INFO: Eye window for uplink 27: ____________XXXXXX______________________
Data delay found: 34
11:16:09:setup_element:INFO: Eye window for uplink 28: ___________________XXXXXX_______________
Data delay found: 1
11:16:09:setup_element:INFO: Eye window for uplink 29: __________________XXXXXXX_______________
Data delay found: 1
11:16:10:setup_element:INFO: Eye window for uplink 30: ____________________XXXXXX______________
Data delay found: 2
11:16:10:setup_element:INFO: Eye window for uplink 31: ___________________XXXXX________________
Data delay found: 1
11:16:10:setup_element:INFO: Setting the data phase to 24 for uplink 16
11:16:10:setup_element:INFO: Setting the data phase to 23 for uplink 17
11:16:10:setup_element:INFO: Setting the data phase to 20 for uplink 18
11:16:10:setup_element:INFO: Setting the data phase to 19 for uplink 19
11:16:10:setup_element:INFO: Setting the data phase to 21 for uplink 20
11:16:10:setup_element:INFO: Setting the data phase to 24 for uplink 21
11:16:10:setup_element:INFO: Setting the data phase to 23 for uplink 22
11:16:10:setup_element:INFO: Setting the data phase to 20 for uplink 23
11:16:10:setup_element:INFO: Setting the data phase to 29 for uplink 24
11:16:10:setup_element:INFO: Setting the data phase to 31 for uplink 25
11:16:10:setup_element:INFO: Setting the data phase to 32 for uplink 26
11:16:10:setup_element:INFO: Setting the data phase to 34 for uplink 27
11:16:10:setup_element:INFO: Setting the data phase to 1 for uplink 28
11:16:10:setup_element:INFO: Setting the data phase to 1 for uplink 29
11:16:10:setup_element:INFO: Setting the data phase to 2 for uplink 30
11:16:10:setup_element:INFO: Setting the data phase to 1 for uplink 31
11:16:10:setup_element:INFO: Beginning SMX ASICs map scan
11:16:10:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:16:10:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:16:10:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:16:10:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:16:10:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:16:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:16:10:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:16:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:16:10:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:16:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:16:10:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:16:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:16:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:16:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:16:10:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:16:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:16:11:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:16:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:16:11:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:16:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:16:11:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:16:12:setup_element:INFO: Performing Elink synchronization
11:16:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:16:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:16:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:16:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:16:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:16:12:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:16:13:febtest:INFO: Init all SMX (CSA): 30
11:16:31:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:16:31:febtest:INFO: 23-00 | XA-000-09-004-017-010-026-11 | 37.7 | 1130.0
11:16:31:febtest:INFO: 30-01 | XA-000-09-004-017-007-025-12 | 34.6 | 1171.5
11:16:31:febtest:INFO: 21-02 | XA-000-09-004-017-013-026-03 | 28.2 | 1183.3
11:16:31:febtest:INFO: 28-03 | XA-000-09-004-017-007-026-12 | 44.1 | 1135.9
11:16:32:febtest:INFO: 19-04 | XA-000-09-004-017-014-003-10 | 53.6 | 1094.2
11:16:32:febtest:INFO: 26-05 | XA-000-09-004-017-013-024-03 | 37.7 | 1147.8
11:16:32:febtest:INFO: 17-06 | XA-000-09-004-017-011-002-01 | 56.8 | 1082.3
11:16:32:febtest:INFO: 24-07 | XA-000-09-004-017-007-024-12 | 50.4 | 1112.1
11:16:33:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:16:35:ST3_smx:INFO: chip: 23-0 40.898880 C 1153.732915 mV
11:16:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:35:ST3_smx:INFO: Electrons
11:16:35:ST3_smx:INFO: # loops 0
11:16:37:ST3_smx:INFO: # loops 1
11:16:39:ST3_smx:INFO: # loops 2
11:16:41:ST3_smx:INFO: Total # of broken channels: 0
11:16:41:ST3_smx:INFO: List of broken channels: []
11:16:41:ST3_smx:INFO: Total # of broken channels: 0
11:16:41:ST3_smx:INFO: List of broken channels: []
11:16:43:ST3_smx:INFO: chip: 30-1 34.556970 C 1195.082160 mV
11:16:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:43:ST3_smx:INFO: Electrons
11:16:43:ST3_smx:INFO: # loops 0
11:16:45:ST3_smx:INFO: # loops 1
11:16:47:ST3_smx:INFO: # loops 2
11:16:49:ST3_smx:INFO: Total # of broken channels: 0
11:16:49:ST3_smx:INFO: List of broken channels: []
11:16:49:ST3_smx:INFO: Total # of broken channels: 0
11:16:49:ST3_smx:INFO: List of broken channels: []
11:16:51:ST3_smx:INFO: chip: 21-2 28.225000 C 1206.851500 mV
11:16:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:51:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:51:ST3_smx:INFO: Electrons
11:16:51:ST3_smx:INFO: # loops 0
11:16:53:ST3_smx:INFO: # loops 1
11:16:54:ST3_smx:INFO: # loops 2
11:16:56:ST3_smx:INFO: Total # of broken channels: 0
11:16:56:ST3_smx:INFO: List of broken channels: []
11:16:56:ST3_smx:INFO: Total # of broken channels: 0
11:16:56:ST3_smx:INFO: List of broken channels: []
11:16:58:ST3_smx:INFO: chip: 28-3 44.073563 C 1159.654860 mV
11:16:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:58:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:16:58:ST3_smx:INFO: Electrons
11:16:58:ST3_smx:INFO: # loops 0
11:17:00:ST3_smx:INFO: # loops 1
11:17:02:ST3_smx:INFO: # loops 2
11:17:04:ST3_smx:INFO: Total # of broken channels: 0
11:17:04:ST3_smx:INFO: List of broken channels: []
11:17:04:ST3_smx:INFO: Total # of broken channels: 0
11:17:04:ST3_smx:INFO: List of broken channels: []
11:17:06:ST3_smx:INFO: chip: 19-4 56.797143 C 1112.140140 mV
11:17:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:06:ST3_smx:INFO: Electrons
11:17:06:ST3_smx:INFO: # loops 0
11:17:08:ST3_smx:INFO: # loops 1
11:17:10:ST3_smx:INFO: # loops 2
11:17:12:ST3_smx:INFO: Total # of broken channels: 0
11:17:12:ST3_smx:INFO: List of broken channels: []
11:17:12:ST3_smx:INFO: Total # of broken channels: 0
11:17:12:ST3_smx:INFO: List of broken channels: []
11:17:14:ST3_smx:INFO: chip: 26-5 40.898880 C 1171.483840 mV
11:17:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:14:ST3_smx:INFO: Electrons
11:17:14:ST3_smx:INFO: # loops 0
11:17:16:ST3_smx:INFO: # loops 1
11:17:18:ST3_smx:INFO: # loops 2
11:17:20:ST3_smx:INFO: Total # of broken channels: 0
11:17:20:ST3_smx:INFO: List of broken channels: []
11:17:20:ST3_smx:INFO: Total # of broken channels: 0
11:17:20:ST3_smx:INFO: List of broken channels: []
11:17:22:ST3_smx:INFO: chip: 17-6 59.984250 C 1094.240115 mV
11:17:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:22:ST3_smx:INFO: Electrons
11:17:22:ST3_smx:INFO: # loops 0
11:17:23:ST3_smx:INFO: # loops 1
11:17:25:ST3_smx:INFO: # loops 2
11:17:27:ST3_smx:INFO: Total # of broken channels: 0
11:17:27:ST3_smx:INFO: List of broken channels: []
11:17:27:ST3_smx:INFO: Total # of broken channels: 0
11:17:27:ST3_smx:INFO: List of broken channels: []
11:17:29:ST3_smx:INFO: chip: 24-7 53.612520 C 1129.995435 mV
11:17:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:17:29:ST3_smx:INFO: Electrons
11:17:29:ST3_smx:INFO: # loops 0
11:17:31:ST3_smx:INFO: # loops 1
11:17:33:ST3_smx:INFO: # loops 2
11:17:35:ST3_smx:INFO: Total # of broken channels: 0
11:17:35:ST3_smx:INFO: List of broken channels: []
11:17:35:ST3_smx:INFO: Total # of broken channels: 0
11:17:35:ST3_smx:INFO: List of broken channels: []
11:17:35:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:17:35:febtest:INFO: 23-00 | XA-000-09-004-017-010-026-11 | 44.1 | 1177.4
11:17:35:febtest:INFO: 30-01 | XA-000-09-004-017-007-025-12 | 34.6 | 1218.6
11:17:36:febtest:INFO: 21-02 | XA-000-09-004-017-013-026-03 | 31.4 | 1230.3
11:17:36:febtest:INFO: 28-03 | XA-000-09-004-017-007-026-12 | 44.1 | 1183.3
11:17:36:febtest:INFO: 19-04 | XA-000-09-004-017-014-003-10 | 56.8 | 1141.9
11:17:36:febtest:INFO: 26-05 | XA-000-09-004-017-013-024-03 | 44.1 | 1195.1
11:17:36:febtest:INFO: 17-06 | XA-000-09-004-017-011-002-01 | 60.0 | 1118.1
11:17:37:febtest:INFO: 24-07 | XA-000-09-004-017-007-024-12 | 56.8 | 1147.8
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_23-11_16_02
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4354| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.4920', '1.846', '2.4010']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9980', '1.850', '2.4850']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9810', '1.850', '0.5228']