FEB_4360 25.02.26 08:00:17
Info
08:00:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:00:17:ST3_Shared:INFO: FEB-Microcable
08:00:17:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:00:17:febtest:INFO: Testing FEB with SN 4360
08:00:18:smx_tester:INFO: Scanning setup
08:00:18:elinks:INFO: Disabling clock on downlink 0
08:00:18:elinks:INFO: Disabling clock on downlink 1
08:00:18:elinks:INFO: Disabling clock on downlink 2
08:00:18:elinks:INFO: Disabling clock on downlink 3
08:00:18:elinks:INFO: Disabling clock on downlink 4
08:00:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:00:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:00:18:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:00:18:elinks:INFO: Disabling clock on downlink 0
08:00:18:elinks:INFO: Disabling clock on downlink 1
08:00:18:elinks:INFO: Disabling clock on downlink 2
08:00:18:elinks:INFO: Disabling clock on downlink 3
08:00:18:elinks:INFO: Disabling clock on downlink 4
08:00:18:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:00:18:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:00:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:00:19:elinks:INFO: Disabling clock on downlink 0
08:00:19:elinks:INFO: Disabling clock on downlink 1
08:00:19:elinks:INFO: Disabling clock on downlink 2
08:00:19:elinks:INFO: Disabling clock on downlink 3
08:00:19:elinks:INFO: Disabling clock on downlink 4
08:00:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:00:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:00:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:00:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:00:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:00:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:00:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:00:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:00:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:00:19:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:00:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:00:19:elinks:INFO: Disabling clock on downlink 0
08:00:19:elinks:INFO: Disabling clock on downlink 1
08:00:19:elinks:INFO: Disabling clock on downlink 2
08:00:19:elinks:INFO: Disabling clock on downlink 3
08:00:19:elinks:INFO: Disabling clock on downlink 4
08:00:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:00:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:00:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:00:19:elinks:INFO: Disabling clock on downlink 0
08:00:19:elinks:INFO: Disabling clock on downlink 1
08:00:19:elinks:INFO: Disabling clock on downlink 2
08:00:19:elinks:INFO: Disabling clock on downlink 3
08:00:19:elinks:INFO: Disabling clock on downlink 4
08:00:19:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:00:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:00:19:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:00:19:setup_element:INFO: Scanning clock phase
08:00:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:00:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:00:19:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:00:19:setup_element:INFO: Eye window for uplink 24: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:00:19:setup_element:INFO: Eye window for uplink 25: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:00:19:setup_element:INFO: Eye window for uplink 26: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:00:19:setup_element:INFO: Eye window for uplink 27: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:00:19:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:00:19:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:00:19:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:00:19:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
08:00:19:setup_element:INFO: Setting the clock phase to 31 for group 0, downlink 2
08:00:19:setup_element:INFO: Scanning data phases
08:00:19:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:00:19:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:00:24:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:00:24:setup_element:INFO: Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
08:00:24:setup_element:INFO: Eye window for uplink 25: ___________XXXXX________________________
Data delay found: 33
08:00:24:setup_element:INFO: Eye window for uplink 26: __________XXXXXXX_______________________
Data delay found: 33
08:00:24:setup_element:INFO: Eye window for uplink 27: _____________XXXXXXX____________________
Data delay found: 36
08:00:24:setup_element:INFO: Eye window for uplink 28: ________________XXXXXX__________________
Data delay found: 38
08:00:24:setup_element:INFO: Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
08:00:24:setup_element:INFO: Eye window for uplink 30: __________________XXXXX_________________
Data delay found: 0
08:00:24:setup_element:INFO: Eye window for uplink 31: _________________XXXX___________________
Data delay found: 38
08:00:24:setup_element:INFO: Setting the data phase to 31 for uplink 24
08:00:24:setup_element:INFO: Setting the data phase to 33 for uplink 25
08:00:24:setup_element:INFO: Setting the data phase to 33 for uplink 26
08:00:24:setup_element:INFO: Setting the data phase to 36 for uplink 27
08:00:24:setup_element:INFO: Setting the data phase to 38 for uplink 28
08:00:24:setup_element:INFO: Setting the data phase to 38 for uplink 29
08:00:24:setup_element:INFO: Setting the data phase to 0 for uplink 30
08:00:24:setup_element:INFO: Setting the data phase to 38 for uplink 31
08:00:24:setup_element:INFO: Beginning SMX ASICs map scan
08:00:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:00:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:00:24:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:00:24:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:00:24:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:00:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:00:25:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:00:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:00:25:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:00:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:00:25:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:00:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:00:26:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:00:27:setup_element:INFO: Performing Elink synchronization
08:00:27:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:00:27:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:00:27:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:00:27:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:00:27:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:00:27:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:00:28:febtest:INFO: Init all SMX (CSA): 30
08:00:36:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:00:36:febtest:INFO: 30-01 | XA-000-09-004-029-013-016-07 | 34.6 | 1171.5
08:00:37:febtest:INFO: 28-03 | XA-000-09-004-029-010-016-15 | 34.6 | 1171.5
08:00:37:febtest:INFO: 26-05 | XA-000-09-004-029-013-017-07 | 34.6 | 1171.5
08:00:37:febtest:INFO: 24-07 | XA-000-09-004-029-010-017-15 | 34.6 | 1171.5
08:00:38:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:00:40:ST3_smx:INFO: chip: 30-1 34.556970 C 1189.190035 mV
08:00:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:40:ST3_smx:INFO: Electrons
08:00:40:ST3_smx:INFO: # loops 0
08:00:42:ST3_smx:INFO: # loops 1
08:00:44:ST3_smx:INFO: # loops 2
08:00:47:ST3_smx:INFO: Total # of broken channels: 0
08:00:47:ST3_smx:INFO: List of broken channels: []
08:00:47:ST3_smx:INFO: Total # of broken channels: 0
08:00:47:ST3_smx:INFO: List of broken channels: []
08:00:49:ST3_smx:INFO: chip: 28-3 31.389742 C 1177.390875 mV
08:00:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:49:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:49:ST3_smx:INFO: Electrons
08:00:49:ST3_smx:INFO: # loops 0
08:00:51:ST3_smx:INFO: # loops 1
08:00:53:ST3_smx:INFO: # loops 2
08:00:55:ST3_smx:INFO: Total # of broken channels: 0
08:00:55:ST3_smx:INFO: List of broken channels: []
08:00:55:ST3_smx:INFO: Total # of broken channels: 0
08:00:55:ST3_smx:INFO: List of broken channels: []
08:00:56:ST3_smx:INFO: chip: 26-5 34.556970 C 1177.390875 mV
08:00:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:57:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:00:57:ST3_smx:INFO: Electrons
08:00:57:ST3_smx:INFO: # loops 0
08:00:58:ST3_smx:INFO: # loops 1
08:01:00:ST3_smx:INFO: # loops 2
08:01:02:ST3_smx:INFO: Total # of broken channels: 0
08:01:02:ST3_smx:INFO: List of broken channels: []
08:01:02:ST3_smx:INFO: Total # of broken channels: 0
08:01:02:ST3_smx:INFO: List of broken channels: []
08:01:04:ST3_smx:INFO: chip: 24-7 34.556970 C 1183.292940 mV
08:01:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:01:04:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:01:04:ST3_smx:INFO: Electrons
08:01:04:ST3_smx:INFO: # loops 0
08:01:06:ST3_smx:INFO: # loops 1
08:01:08:ST3_smx:INFO: # loops 2
08:01:10:ST3_smx:INFO: Total # of broken channels: 0
08:01:10:ST3_smx:INFO: List of broken channels: []
08:01:10:ST3_smx:INFO: Total # of broken channels: 0
08:01:10:ST3_smx:INFO: List of broken channels: []
08:01:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:01:10:febtest:INFO: 30-01 | XA-000-09-004-029-013-016-07 | 34.6 | 1206.9
08:01:10:febtest:INFO: 28-03 | XA-000-09-004-029-010-016-15 | 34.6 | 1201.0
08:01:11:febtest:INFO: 26-05 | XA-000-09-004-029-013-017-07 | 34.6 | 1201.0
08:01:11:febtest:INFO: 24-07 | XA-000-09-004-029-010-017-15 | 37.7 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_02_25-08_00_17
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4360| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8426', '1.846', '1.4130']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9998', '1.850', '1.3010']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9891', '1.850', '0.2652']