DTL-STS tests database

FEB_4364 11.03.26 13:32:07

link: XA-000-09-004-029-003-012-09
...SMX_0.root
link: XA-000-09-004-029-015-012-03
...SMX_2.root
link: XA-000-09-004-029-012-012-13
...SMX_4.root
link: XA-000-09-004-029-009-012-06
...SMX_6.root
link: XA-000-09-004-029-018-010-08
...SMX_1.root
link: XA-000-09-004-029-009-011-06
...SMX_3.root
link: XA-000-09-004-029-006-011-02
...SMX_5.root
link: XA-000-09-004-029-003-011-09
...SMX_7.root
link: XA-000-09-004-029-003-011-09
...VddmCSAstatus.root
Info
            13:32:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:32:07:ST3_Shared:INFO:	                         FEB-Sensor                         
13:32:07:ST3_Shared:INFO:	oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:32:21:ST3_ModuleSelector:INFO:	New Sensor ID: 4311
13:32:30:ST3_ModuleSelector:INFO:	L1DR000051 M1DR0T0000510B2 22 A

13:32:30:ST3_ModuleSelector:INFO:	4311
13:32:30:febtest:INFO:	Testing FEB with SN 4364
13:32:31:smx_tester:INFO:	Scanning setup
13:32:31:elinks:INFO:	Disabling clock on downlink 0
13:32:31:elinks:INFO:	Disabling clock on downlink 1
13:32:31:elinks:INFO:	Disabling clock on downlink 2
13:32:31:elinks:INFO:	Disabling clock on downlink 3
13:32:31:elinks:INFO:	Disabling clock on downlink 4
13:32:31:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:31:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [0]
13:32:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:32:elinks:INFO:	Disabling clock on downlink 0
13:32:32:elinks:INFO:	Disabling clock on downlink 1
13:32:32:elinks:INFO:	Disabling clock on downlink 2
13:32:32:elinks:INFO:	Disabling clock on downlink 3
13:32:32:elinks:INFO:	Disabling clock on downlink 4
13:32:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [1]
13:32:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:32:elinks:INFO:	Disabling clock on downlink 0
13:32:32:elinks:INFO:	Disabling clock on downlink 1
13:32:32:elinks:INFO:	Disabling clock on downlink 2
13:32:32:elinks:INFO:	Disabling clock on downlink 3
13:32:32:elinks:INFO:	Disabling clock on downlink 4
13:32:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 16
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 17
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 18
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 19
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 20
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 21
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 22
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 23
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 24
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 25
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 26
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 27
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 28
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 29
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 30
13:32:32:setup_element:INFO:	SOS detected for group 0, downlink 2, uplink 31
13:32:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:32:elinks:INFO:	Disabling clock on downlink 0
13:32:32:elinks:INFO:	Disabling clock on downlink 1
13:32:32:elinks:INFO:	Disabling clock on downlink 2
13:32:32:elinks:INFO:	Disabling clock on downlink 3
13:32:32:elinks:INFO:	Disabling clock on downlink 4
13:32:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [3]
13:32:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:32:elinks:INFO:	Disabling clock on downlink 0
13:32:32:elinks:INFO:	Disabling clock on downlink 1
13:32:32:elinks:INFO:	Disabling clock on downlink 2
13:32:32:elinks:INFO:	Disabling clock on downlink 3
13:32:32:elinks:INFO:	Disabling clock on downlink 4
13:32:32:setup_element:INFO:	Checking SOS, encoding_mode: SOS
13:32:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [4]
13:32:32:setup_element:INFO:	Reassigning uplinks to uplinks which passed SOS detection
13:32:32:setup_element:INFO:	Scanning clock phase
13:32:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:32:32:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:32:32:setup_element:INFO:	Clock phase scan results for group 0, downlink 2
13:32:32:setup_element:INFO:	Eye window for uplink 16: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:32:32:setup_element:INFO:	Eye window for uplink 17: ______________________________________________________________________XXXXXXX___
Clock Delay: 33
13:32:32:setup_element:INFO:	Eye window for uplink 18: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:32:32:setup_element:INFO:	Eye window for uplink 19: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:32:32:setup_element:INFO:	Eye window for uplink 20: ______________________________________________________________________XXXXX_____
Clock Delay: 32
13:32:32:setup_element:INFO:	Eye window for uplink 21: ______________________________________________________________________XXXXX_____
Clock Delay: 32
13:32:32:setup_element:INFO:	Eye window for uplink 22: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:32:32:setup_element:INFO:	Eye window for uplink 23: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:32:32:setup_element:INFO:	Eye window for uplink 24: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:32:32:setup_element:INFO:	Eye window for uplink 25: _______________________________________________________________________XXXXXX___
Clock Delay: 33
13:32:32:setup_element:INFO:	Eye window for uplink 26: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:32:32:setup_element:INFO:	Eye window for uplink 27: ______________________________________________________________________XXXXXX____
Clock Delay: 32
13:32:32:setup_element:INFO:	Eye window for uplink 28: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:32:32:setup_element:INFO:	Eye window for uplink 29: ________________________________________________________________________XXXXX___
Clock Delay: 34
13:32:32:setup_element:INFO:	Eye window for uplink 30: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:32:32:setup_element:INFO:	Eye window for uplink 31: _________________________________________________________________________XXXXXX_
Clock Delay: 35
13:32:32:setup_element:INFO:	Setting the clock phase to 34 for group 0, downlink 2
13:32:32:setup_element:INFO:	Scanning data phases
13:32:32:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:32:33:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:32:38:setup_element:INFO:	Data phase scan results for group 0, downlink 2
13:32:38:setup_element:INFO:	Eye window for uplink 16: XX__________________________________XXXX
Data delay found: 18
13:32:38:setup_element:INFO:	Eye window for uplink 17: ___________________________________XXXX_
Data delay found: 16
13:32:38:setup_element:INFO:	Eye window for uplink 18: _________________________________XXXXX__
Data delay found: 15
13:32:38:setup_element:INFO:	Eye window for uplink 19: _________________________________XXXXX__
Data delay found: 15
13:32:38:setup_element:INFO:	Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
13:32:38:setup_element:INFO:	Eye window for uplink 21: X__________________________________XXXXX
Data delay found: 17
13:32:38:setup_element:INFO:	Eye window for uplink 22: XX__________________________________XXXX
Data delay found: 18
13:32:38:setup_element:INFO:	Eye window for uplink 23: _________________________________XXXXX__
Data delay found: 15
13:32:38:setup_element:INFO:	Eye window for uplink 24: _________XXXXX__________________________
Data delay found: 31
13:32:38:setup_element:INFO:	Eye window for uplink 25: __________XXXXX_________________________
Data delay found: 32
13:32:38:setup_element:INFO:	Eye window for uplink 26: __________XXXXXX________________________
Data delay found: 32
13:32:38:setup_element:INFO:	Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
13:32:38:setup_element:INFO:	Eye window for uplink 28: ________________XXXXXX__________________
Data delay found: 38
13:32:38:setup_element:INFO:	Eye window for uplink 29: ________________XXXXX___________________
Data delay found: 38
13:32:38:setup_element:INFO:	Eye window for uplink 30: ____________________XXXXXXX_____________
Data delay found: 3
13:32:38:setup_element:INFO:	Eye window for uplink 31: ___________________XXXXXX_______________
Data delay found: 1
13:32:38:setup_element:INFO:	Setting the data phase to 18 for uplink 16
13:32:38:setup_element:INFO:	Setting the data phase to 16 for uplink 17
13:32:38:setup_element:INFO:	Setting the data phase to 15 for uplink 18
13:32:38:setup_element:INFO:	Setting the data phase to 15 for uplink 19
13:32:38:setup_element:INFO:	Setting the data phase to 15 for uplink 20
13:32:38:setup_element:INFO:	Setting the data phase to 17 for uplink 21
13:32:38:setup_element:INFO:	Setting the data phase to 18 for uplink 22
13:32:38:setup_element:INFO:	Setting the data phase to 15 for uplink 23
13:32:38:setup_element:INFO:	Setting the data phase to 31 for uplink 24
13:32:38:setup_element:INFO:	Setting the data phase to 32 for uplink 25
13:32:38:setup_element:INFO:	Setting the data phase to 32 for uplink 26
13:32:38:setup_element:INFO:	Setting the data phase to 35 for uplink 27
13:32:38:setup_element:INFO:	Setting the data phase to 38 for uplink 28
13:32:38:setup_element:INFO:	Setting the data phase to 38 for uplink 29
13:32:38:setup_element:INFO:	Setting the data phase to 3 for uplink 30
13:32:38:setup_element:INFO:	Setting the data phase to 1 for uplink 31
13:32:38:setup_element:INFO:	Beginning SMX ASICs map scan
13:32:38:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:32:38:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:32:38:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:32:38:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:32:38:uplink:INFO:	Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
13:32:38:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 0, uplink 23
13:32:38:setup_element:INFO:	Adding ASIC 0x0, ASIC uplink 1, uplink 22
13:32:38:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:32:38:setup_element:INFO:	Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:32:38:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 0, uplink 21
13:32:38:setup_element:INFO:	Adding ASIC 0x2, ASIC uplink 1, uplink 20
13:32:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:32:38:setup_element:INFO:	Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:32:39:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 0, uplink 19
13:32:39:setup_element:INFO:	Adding ASIC 0x4, ASIC uplink 1, uplink 18
13:32:39:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:32:39:setup_element:INFO:	Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:32:39:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 0, uplink 17
13:32:39:setup_element:INFO:	Adding ASIC 0x6, ASIC uplink 1, uplink 16
13:32:39:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:32:39:setup_element:INFO:	Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:32:40:setup_element:INFO:	Performing Elink synchronization
13:32:40:master:INFO:	Setting encoding mode SOS for groups [0], downlinks [2]
13:32:40:master:INFO:	Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:32:40:master:INFO:	Setting encoding mode EOS for groups [0], downlinks [2]
13:32:40:master:INFO:	Setting encoding mode FRAME for groups [0], downlinks [2]
13:32:40:setup_element:INFO:	Writing SMX Elink masks for group 0, downlink 2
13:32:40:uplink:INFO:	Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
 0   | [0]  |   2   |  0  |  [23]   |    2    | [(0, 23), (1, 22)]
 1   | [0]  |   2   |  0  |  [30]   |    2    | [(0, 30), (1, 31)]
 2   | [0]  |   2   |  0  |  [21]   |    2    | [(0, 21), (1, 20)]
 3   | [0]  |   2   |  0  |  [28]   |    2    | [(0, 28), (1, 29)]
 4   | [0]  |   2   |  0  |  [19]   |    2    | [(0, 19), (1, 18)]
 5   | [0]  |   2   |  0  |  [26]   |    2    | [(0, 26), (1, 27)]
 6   | [0]  |   2   |  0  |  [17]   |    2    | [(0, 17), (1, 16)]
 7   | [0]  |   2   |  0  |  [24]   |    2    | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:32:41:febtest:INFO:	Init all SMX (CSA): 30
13:32:56:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:32:57:febtest:INFO:	23-00 | XA-000-09-004-029-003-012-09 |  40.9 | 1130.0
13:32:57:febtest:INFO:	30-01 | XA-000-09-004-029-018-010-08 |  34.6 | 1147.8
13:32:57:febtest:INFO:	21-02 | XA-000-09-004-029-015-012-03 |  21.9 | 1195.1
13:32:57:febtest:INFO:	28-03 | XA-000-09-004-029-009-011-06 |  31.4 | 1177.4
13:32:57:febtest:INFO:	19-04 | XA-000-09-004-029-012-012-13 |  40.9 | 1141.9
13:32:58:febtest:INFO:	26-05 | XA-000-09-004-029-006-011-02 |  28.2 | 1177.4
13:32:58:febtest:INFO:	17-06 | XA-000-09-004-029-009-012-06 |  44.1 | 1135.9
13:32:58:febtest:INFO:	24-07 | XA-000-09-004-029-003-011-09 |  31.4 | 1177.4
13:32:59:febtest:INFO:	Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:33:01:ST3_smx:INFO:	chip: 23-0 	 40.898880 C 	 1159.654860 mV
13:33:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:01:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:01:ST3_smx:INFO:		Electrons
13:33:01:ST3_smx:INFO:	# loops 0
13:33:03:ST3_smx:INFO:	# loops 1
13:33:05:ST3_smx:INFO:	# loops 2
13:33:06:ST3_smx:INFO:	Total # of broken channels: 0
13:33:06:ST3_smx:INFO:	List of broken channels: []
13:33:06:ST3_smx:INFO:	Total # of broken channels: 0
13:33:06:ST3_smx:INFO:	List of broken channels: []
13:33:08:ST3_smx:INFO:	chip: 30-1 	 34.556970 C 	 1177.390875 mV
13:33:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:08:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:08:ST3_smx:INFO:		Electrons
13:33:08:ST3_smx:INFO:	# loops 0
13:33:09:ST3_smx:INFO:	# loops 1
13:33:11:ST3_smx:INFO:	# loops 2
13:33:13:ST3_smx:INFO:	Total # of broken channels: 0
13:33:13:ST3_smx:INFO:	List of broken channels: []
13:33:13:ST3_smx:INFO:	Total # of broken channels: 0
13:33:13:ST3_smx:INFO:	List of broken channels: []
13:33:14:ST3_smx:INFO:	chip: 21-2 	 25.062742 C 	 1224.468235 mV
13:33:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:14:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:14:ST3_smx:INFO:		Electrons
13:33:14:ST3_smx:INFO:	# loops 0
13:33:16:ST3_smx:INFO:	# loops 1
13:33:17:ST3_smx:INFO:	# loops 2
13:33:19:ST3_smx:INFO:	Total # of broken channels: 0
13:33:19:ST3_smx:INFO:	List of broken channels: []
13:33:19:ST3_smx:INFO:	Total # of broken channels: 0
13:33:19:ST3_smx:INFO:	List of broken channels: []
13:33:20:ST3_smx:INFO:	chip: 28-3 	 34.556970 C 	 1200.969315 mV
13:33:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:20:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:20:ST3_smx:INFO:		Electrons
13:33:20:ST3_smx:INFO:	# loops 0
13:33:22:ST3_smx:INFO:	# loops 1
13:33:24:ST3_smx:INFO:	# loops 2
13:33:25:ST3_smx:INFO:	Total # of broken channels: 0
13:33:25:ST3_smx:INFO:	List of broken channels: []
13:33:25:ST3_smx:INFO:	Total # of broken channels: 0
13:33:25:ST3_smx:INFO:	List of broken channels: []
13:33:27:ST3_smx:INFO:	chip: 19-4 	 40.898880 C 	 1171.483840 mV
13:33:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:27:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:27:ST3_smx:INFO:		Electrons
13:33:27:ST3_smx:INFO:	# loops 0
13:33:29:ST3_smx:INFO:	# loops 1
13:33:30:ST3_smx:INFO:	# loops 2
13:33:32:ST3_smx:INFO:	Total # of broken channels: 0
13:33:32:ST3_smx:INFO:	List of broken channels: []
13:33:32:ST3_smx:INFO:	Total # of broken channels: 0
13:33:32:ST3_smx:INFO:	List of broken channels: []
13:33:33:ST3_smx:INFO:	chip: 26-5 	 31.389742 C 	 1206.851500 mV
13:33:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:33:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:33:ST3_smx:INFO:		Electrons
13:33:33:ST3_smx:INFO:	# loops 0
13:33:35:ST3_smx:INFO:	# loops 1
13:33:37:ST3_smx:INFO:	# loops 2
13:33:39:ST3_smx:INFO:	Total # of broken channels: 0
13:33:39:ST3_smx:INFO:	List of broken channels: []
13:33:39:ST3_smx:INFO:	Total # of broken channels: 0
13:33:39:ST3_smx:INFO:	List of broken channels: []
13:33:40:ST3_smx:INFO:	chip: 17-6 	 47.250730 C 	 1159.654860 mV
13:33:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:40:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:40:ST3_smx:INFO:		Electrons
13:33:40:ST3_smx:INFO:	# loops 0
13:33:42:ST3_smx:INFO:	# loops 1
13:33:44:ST3_smx:INFO:	# loops 2
13:33:45:ST3_smx:INFO:	Total # of broken channels: 0
13:33:45:ST3_smx:INFO:	List of broken channels: []
13:33:45:ST3_smx:INFO:	Total # of broken channels: 0
13:33:45:ST3_smx:INFO:	List of broken channels: []
13:33:47:ST3_smx:INFO:	chip: 24-7 	 37.726682 C 	 1206.851500 mV
13:33:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:47:ST3_discr_histo:WARNING:	Not enough entries for fit!!!
13:33:47:ST3_smx:INFO:		Electrons
13:33:47:ST3_smx:INFO:	# loops 0
13:33:49:ST3_smx:INFO:	# loops 1
13:33:50:ST3_smx:INFO:	# loops 2
13:33:52:ST3_smx:INFO:	Total # of broken channels: 0
13:33:52:ST3_smx:INFO:	List of broken channels: []
13:33:52:ST3_smx:INFO:	Total # of broken channels: 0
13:33:52:ST3_smx:INFO:	List of broken channels: []
13:33:52:febtest:INFO:	_Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:33:52:febtest:INFO:	23-00 | XA-000-09-004-029-003-012-09 |  44.1 | 1183.3
13:33:52:febtest:INFO:	30-01 | XA-000-09-004-029-018-010-08 |  37.7 | 1201.0
13:33:53:febtest:INFO:	21-02 | XA-000-09-004-029-015-012-03 |  28.2 | 1247.9
13:33:53:febtest:INFO:	28-03 | XA-000-09-004-029-009-011-06 |  34.6 | 1224.5
13:33:53:febtest:INFO:	19-04 | XA-000-09-004-029-012-012-13 |  44.1 | 1195.1
13:33:53:febtest:INFO:	26-05 | XA-000-09-004-029-006-011-02 |  34.6 | 1224.5
13:33:53:febtest:INFO:	17-06 | XA-000-09-004-029-009-012-06 |  47.3 | 1183.3
13:33:54:febtest:INFO:	24-07 | XA-000-09-004-029-003-011-09 |  34.6 | 1236.2
############################################################
#                   S U M M A R Y                          #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================

############################################################
#                   S U M M A R Y                          #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 26_03_11-13_32_07
OPERATOR  : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4364| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_ID:	4311
MODULE_NAME:	L1DR000051 M1DR0T0000510B2 22 A

MODULE_TYPE:	
MODULE_LADDER:	L1DR000051
MODULE_MODULE:	M1DR0T0000510B2
MODULE_SIZE:	22
MODULE_GRADE:	A
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6110', '1.850', '2.8460']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0190', '1.850', '2.5140']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9890', '1.850', '0.5207']
Comment