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FEB_4365 10.03.26 08:08:29
Info
08:08:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:08:29:ST3_Shared:INFO: FEB-Microcable
08:08:29:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:08:29:febtest:INFO: Testing FEB with SN 4365
08:08:30:smx_tester:INFO: Scanning setup
08:08:30:elinks:INFO: Disabling clock on downlink 0
08:08:30:elinks:INFO: Disabling clock on downlink 1
08:08:30:elinks:INFO: Disabling clock on downlink 2
08:08:30:elinks:INFO: Disabling clock on downlink 3
08:08:30:elinks:INFO: Disabling clock on downlink 4
08:08:30:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:30:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:08:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:31:elinks:INFO: Disabling clock on downlink 0
08:08:31:elinks:INFO: Disabling clock on downlink 1
08:08:31:elinks:INFO: Disabling clock on downlink 2
08:08:31:elinks:INFO: Disabling clock on downlink 3
08:08:31:elinks:INFO: Disabling clock on downlink 4
08:08:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:08:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:31:elinks:INFO: Disabling clock on downlink 0
08:08:31:elinks:INFO: Disabling clock on downlink 1
08:08:31:elinks:INFO: Disabling clock on downlink 2
08:08:31:elinks:INFO: Disabling clock on downlink 3
08:08:31:elinks:INFO: Disabling clock on downlink 4
08:08:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:08:31:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:08:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:31:elinks:INFO: Disabling clock on downlink 0
08:08:31:elinks:INFO: Disabling clock on downlink 1
08:08:31:elinks:INFO: Disabling clock on downlink 2
08:08:31:elinks:INFO: Disabling clock on downlink 3
08:08:31:elinks:INFO: Disabling clock on downlink 4
08:08:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:08:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:31:elinks:INFO: Disabling clock on downlink 0
08:08:31:elinks:INFO: Disabling clock on downlink 1
08:08:31:elinks:INFO: Disabling clock on downlink 2
08:08:31:elinks:INFO: Disabling clock on downlink 3
08:08:31:elinks:INFO: Disabling clock on downlink 4
08:08:31:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:08:31:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:08:31:setup_element:INFO: Scanning clock phase
08:08:31:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:08:31:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:08:31:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:08:31:setup_element:INFO: Eye window for uplink 16: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:08:31:setup_element:INFO: Eye window for uplink 17: _______________________________________________________________________XXXXXX___
Clock Delay: 33
08:08:31:setup_element:INFO: Eye window for uplink 18: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:08:31:setup_element:INFO: Eye window for uplink 19: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:08:31:setup_element:INFO: Eye window for uplink 20: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:08:31:setup_element:INFO: Eye window for uplink 21: ______________________________________________________________________XXXXX_____
Clock Delay: 32
08:08:31:setup_element:INFO: Eye window for uplink 22: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:08:31:setup_element:INFO: Eye window for uplink 23: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:08:31:setup_element:INFO: Eye window for uplink 24: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:08:31:setup_element:INFO: Eye window for uplink 25: ______________________________________________________________________XXXXXX____
Clock Delay: 32
08:08:31:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:08:31:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:08:31:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:08:31:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________________XXXXX____
Clock Delay: 33
08:08:31:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:08:32:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________________XXXXXXX_
Clock Delay: 35
08:08:32:setup_element:INFO: Setting the clock phase to 34 for group 0, downlink 2
08:08:32:setup_element:INFO: Scanning data phases
08:08:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:08:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:08:37:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:08:37:setup_element:INFO: Eye window for uplink 16: XXX__________________________________XXX
Data delay found: 19
08:08:37:setup_element:INFO: Eye window for uplink 17: X__________________________________XXXXX
Data delay found: 17
08:08:37:setup_element:INFO: Eye window for uplink 18: ___________________________________XXXX_
Data delay found: 16
08:08:37:setup_element:INFO: Eye window for uplink 19: __________________________________XXXXX_
Data delay found: 16
08:08:37:setup_element:INFO: Eye window for uplink 20: __________________________________XXXX__
Data delay found: 15
08:08:37:setup_element:INFO: Eye window for uplink 21: X___________________________________XXXX
Data delay found: 18
08:08:37:setup_element:INFO: Eye window for uplink 22: XXX__________________________________XXX
Data delay found: 19
08:08:37:setup_element:INFO: Eye window for uplink 23: __________________________________XXXXX_
Data delay found: 16
08:08:37:setup_element:INFO: Eye window for uplink 24: _______XXXXXX___________________________
Data delay found: 29
08:08:37:setup_element:INFO: Eye window for uplink 25: __________XXXX__________________________
Data delay found: 31
08:08:37:setup_element:INFO: Eye window for uplink 26: _________XXXXXXX________________________
Data delay found: 32
08:08:37:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXX_____________________
Data delay found: 35
08:08:37:setup_element:INFO: Eye window for uplink 28: _________________XXXXX__________________
Data delay found: 39
08:08:37:setup_element:INFO: Eye window for uplink 29: ________________XXXXXX__________________
Data delay found: 38
08:08:37:setup_element:INFO: Eye window for uplink 30: __________________XXXXXXX_______________
Data delay found: 1
08:08:37:setup_element:INFO: Eye window for uplink 31: _________________XXXXXX_________________
Data delay found: 39
08:08:37:setup_element:INFO: Setting the data phase to 19 for uplink 16
08:08:37:setup_element:INFO: Setting the data phase to 17 for uplink 17
08:08:37:setup_element:INFO: Setting the data phase to 16 for uplink 18
08:08:37:setup_element:INFO: Setting the data phase to 16 for uplink 19
08:08:37:setup_element:INFO: Setting the data phase to 15 for uplink 20
08:08:37:setup_element:INFO: Setting the data phase to 18 for uplink 21
08:08:37:setup_element:INFO: Setting the data phase to 19 for uplink 22
08:08:37:setup_element:INFO: Setting the data phase to 16 for uplink 23
08:08:37:setup_element:INFO: Setting the data phase to 29 for uplink 24
08:08:37:setup_element:INFO: Setting the data phase to 31 for uplink 25
08:08:37:setup_element:INFO: Setting the data phase to 32 for uplink 26
08:08:37:setup_element:INFO: Setting the data phase to 35 for uplink 27
08:08:37:setup_element:INFO: Setting the data phase to 39 for uplink 28
08:08:37:setup_element:INFO: Setting the data phase to 38 for uplink 29
08:08:37:setup_element:INFO: Setting the data phase to 1 for uplink 30
08:08:37:setup_element:INFO: Setting the data phase to 39 for uplink 31
08:08:37:setup_element:INFO: Beginning SMX ASICs map scan
08:08:37:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:08:37:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:08:37:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:08:37:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:08:37:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
08:08:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
08:08:37:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
08:08:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:08:37:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:08:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
08:08:37:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
08:08:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:08:37:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:08:37:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
08:08:38:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
08:08:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:08:38:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:08:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
08:08:38:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
08:08:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:08:38:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:08:39:setup_element:INFO: Performing Elink synchronization
08:08:39:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:08:39:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:08:39:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:08:39:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:08:39:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:08:39:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:08:40:febtest:INFO: Init all SMX (CSA): 30
08:08:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:08:56:febtest:INFO: 23-00 | XA-000-09-004-023-015-021-02 | 25.1 | 1195.1
08:08:57:febtest:INFO: 30-01 | XA-000-09-004-023-003-010-15 | 31.4 | 1171.5
08:08:57:febtest:INFO: 21-02 | XA-000-09-004-023-012-021-12 | 34.6 | 1171.5
08:08:57:febtest:INFO: 28-03 | XA-000-09-004-023-006-010-04 | 50.4 | 1118.1
08:08:57:febtest:INFO: 19-04 | XA-000-09-004-023-009-021-07 | 44.1 | 1147.8
08:08:57:febtest:INFO: 26-05 | XA-000-09-004-023-009-010-00 | 37.7 | 1153.7
08:08:58:febtest:INFO: 17-06 | XA-000-09-004-023-006-021-03 | 37.7 | 1159.7
08:08:58:febtest:INFO: 24-07 | XA-000-09-004-023-012-010-11 | 40.9 | 1147.8
08:08:59:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
08:09:01:ST3_smx:INFO: chip: 23-0 25.062742 C 1212.728715 mV
08:09:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:01:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:01:ST3_smx:INFO: Electrons
08:09:01:ST3_smx:INFO: # loops 0
08:09:03:ST3_smx:INFO: # loops 1
08:09:04:ST3_smx:INFO: # loops 2
08:09:06:ST3_smx:INFO: Total # of broken channels: 3
08:09:06:ST3_smx:INFO: List of broken channels: [24, 36, 38]
08:09:06:ST3_smx:INFO: Total # of broken channels: 3
08:09:06:ST3_smx:INFO: List of broken channels: [24, 36, 38]
08:09:08:ST3_smx:INFO: chip: 30-1 34.556970 C 1189.190035 mV
08:09:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:08:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:08:ST3_smx:INFO: Electrons
08:09:08:ST3_smx:INFO: # loops 0
08:09:10:ST3_smx:INFO: # loops 1
08:09:11:ST3_smx:INFO: # loops 2
08:09:13:ST3_smx:INFO: Total # of broken channels: 0
08:09:13:ST3_smx:INFO: List of broken channels: []
08:09:13:ST3_smx:INFO: Total # of broken channels: 0
08:09:13:ST3_smx:INFO: List of broken channels: []
08:09:15:ST3_smx:INFO: chip: 21-2 34.556970 C 1189.190035 mV
08:09:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:15:ST3_smx:INFO: Electrons
08:09:15:ST3_smx:INFO: # loops 0
08:09:17:ST3_smx:INFO: # loops 1
08:09:18:ST3_smx:INFO: # loops 2
08:09:20:ST3_smx:INFO: Total # of broken channels: 0
08:09:20:ST3_smx:INFO: List of broken channels: []
08:09:20:ST3_smx:INFO: Total # of broken channels: 0
08:09:20:ST3_smx:INFO: List of broken channels: []
08:09:22:ST3_smx:INFO: chip: 28-3 50.430383 C 1135.937260 mV
08:09:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:22:ST3_smx:INFO: Electrons
08:09:22:ST3_smx:INFO: # loops 0
08:09:24:ST3_smx:INFO: # loops 1
08:09:25:ST3_smx:INFO: # loops 2
08:09:27:ST3_smx:INFO: Total # of broken channels: 2
08:09:27:ST3_smx:INFO: List of broken channels: [65, 111]
08:09:27:ST3_smx:INFO: Total # of broken channels: 2
08:09:27:ST3_smx:INFO: List of broken channels: [65, 111]
08:09:29:ST3_smx:INFO: chip: 19-4 44.073563 C 1165.571835 mV
08:09:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:29:ST3_smx:INFO: Electrons
08:09:29:ST3_smx:INFO: # loops 0
08:09:31:ST3_smx:INFO: # loops 1
08:09:32:ST3_smx:INFO: # loops 2
08:09:34:ST3_smx:INFO: Total # of broken channels: 1
08:09:34:ST3_smx:INFO: List of broken channels: [5]
08:09:34:ST3_smx:INFO: Total # of broken channels: 1
08:09:34:ST3_smx:INFO: List of broken channels: [5]
08:09:36:ST3_smx:INFO: chip: 26-5 40.898880 C 1177.390875 mV
08:09:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:36:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:36:ST3_smx:INFO: Electrons
08:09:36:ST3_smx:INFO: # loops 0
08:09:38:ST3_smx:INFO: # loops 1
08:09:39:ST3_smx:INFO: # loops 2
08:09:41:ST3_smx:INFO: Total # of broken channels: 2
08:09:41:ST3_smx:INFO: List of broken channels: [41, 92]
08:09:41:ST3_smx:INFO: Total # of broken channels: 2
08:09:41:ST3_smx:INFO: List of broken channels: [41, 92]
08:09:43:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
08:09:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:43:ST3_smx:INFO: Electrons
08:09:43:ST3_smx:INFO: # loops 0
08:09:45:ST3_smx:INFO: # loops 1
08:09:46:ST3_smx:INFO: # loops 2
08:09:48:ST3_smx:INFO: Total # of broken channels: 0
08:09:48:ST3_smx:INFO: List of broken channels: []
08:09:48:ST3_smx:INFO: Total # of broken channels: 1
08:09:48:ST3_smx:INFO: List of broken channels: [8]
08:09:50:ST3_smx:INFO: chip: 24-7 47.250730 C 1165.571835 mV
08:09:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
08:09:50:ST3_smx:INFO: Electrons
08:09:50:ST3_smx:INFO: # loops 0
08:09:52:ST3_smx:INFO: # loops 1
08:09:53:ST3_smx:INFO: # loops 2
08:09:55:ST3_smx:INFO: Total # of broken channels: 0
08:09:55:ST3_smx:INFO: List of broken channels: []
08:09:55:ST3_smx:INFO: Total # of broken channels: 0
08:09:55:ST3_smx:INFO: List of broken channels: []
08:09:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:09:56:febtest:INFO: 23-00 | XA-000-09-004-023-015-021-02 | 28.2 | 1236.2
08:09:56:febtest:INFO: 30-01 | XA-000-09-004-023-003-010-15 | 34.6 | 1206.9
08:09:56:febtest:INFO: 21-02 | XA-000-09-004-023-012-021-12 | 37.7 | 1206.9
08:09:56:febtest:INFO: 28-03 | XA-000-09-004-023-006-010-04 | 53.6 | 1159.7
08:09:57:febtest:INFO: 19-04 | XA-000-09-004-023-009-021-07 | 44.1 | 1189.2
08:09:57:febtest:INFO: 26-05 | XA-000-09-004-023-009-010-00 | 44.1 | 1195.1
08:09:57:febtest:INFO: 17-06 | XA-000-09-004-023-006-021-03 | 40.9 | 1195.1
08:09:57:febtest:INFO: 24-07 | XA-000-09-004-023-012-010-11 | 50.4 | 1183.3
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_10-08_08_29
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4365| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5210', '1.846', '2.2910']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0190', '1.850', '2.5800']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9960', '1.850', '0.5313']