FEB_4373 18.03.26 07:46:01
Info
07:46:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:46:01:ST3_Shared:INFO: FEB-Microcable
07:46:01:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:46:01:febtest:INFO: Testing FEB with SN 4373
07:46:03:smx_tester:INFO: Scanning setup
07:46:03:elinks:INFO: Disabling clock on downlink 0
07:46:03:elinks:INFO: Disabling clock on downlink 1
07:46:03:elinks:INFO: Disabling clock on downlink 2
07:46:03:elinks:INFO: Disabling clock on downlink 3
07:46:03:elinks:INFO: Disabling clock on downlink 4
07:46:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:46:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:46:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:46:03:elinks:INFO: Disabling clock on downlink 0
07:46:03:elinks:INFO: Disabling clock on downlink 1
07:46:03:elinks:INFO: Disabling clock on downlink 2
07:46:03:elinks:INFO: Disabling clock on downlink 3
07:46:03:elinks:INFO: Disabling clock on downlink 4
07:46:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:46:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:46:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:46:03:elinks:INFO: Disabling clock on downlink 0
07:46:03:elinks:INFO: Disabling clock on downlink 1
07:46:03:elinks:INFO: Disabling clock on downlink 2
07:46:03:elinks:INFO: Disabling clock on downlink 3
07:46:03:elinks:INFO: Disabling clock on downlink 4
07:46:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:46:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:46:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:46:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:46:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:46:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:46:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:46:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:46:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:46:03:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:46:03:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:46:03:elinks:INFO: Disabling clock on downlink 0
07:46:03:elinks:INFO: Disabling clock on downlink 1
07:46:03:elinks:INFO: Disabling clock on downlink 2
07:46:03:elinks:INFO: Disabling clock on downlink 3
07:46:03:elinks:INFO: Disabling clock on downlink 4
07:46:03:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:46:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:46:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:46:04:elinks:INFO: Disabling clock on downlink 0
07:46:04:elinks:INFO: Disabling clock on downlink 1
07:46:04:elinks:INFO: Disabling clock on downlink 2
07:46:04:elinks:INFO: Disabling clock on downlink 3
07:46:04:elinks:INFO: Disabling clock on downlink 4
07:46:04:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:46:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:46:04:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:46:04:setup_element:INFO: Scanning clock phase
07:46:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:46:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:46:04:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:46:04:setup_element:INFO: Eye window for uplink 24: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
07:46:04:setup_element:INFO: Eye window for uplink 25: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
07:46:04:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXX_________
Clock Delay: 27
07:46:04:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXX_________
Clock Delay: 27
07:46:04:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________XXXXXX_________
Clock Delay: 27
07:46:04:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXX_________
Clock Delay: 27
07:46:04:setup_element:INFO: Eye window for uplink 30: ________________________________________________________________XXXXXX__________
Clock Delay: 26
07:46:04:setup_element:INFO: Eye window for uplink 31: ________________________________________________________________XXXXXX__________
Clock Delay: 26
07:46:04:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
07:46:04:setup_element:INFO: Scanning data phases
07:46:04:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:46:04:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:46:09:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:46:09:setup_element:INFO: Eye window for uplink 24: __________XXXXXXXXX_X___________________
Data delay found: 35
07:46:09:setup_element:INFO: Eye window for uplink 25: _____________XXXXXXXXX__________________
Data delay found: 37
07:46:09:setup_element:INFO: Eye window for uplink 26: __________XXXXXXX_______________________
Data delay found: 33
07:46:09:setup_element:INFO: Eye window for uplink 27: _____________XXXXXXXX___________________
Data delay found: 36
07:46:09:setup_element:INFO: Eye window for uplink 28: ________________XXXXXXX_________________
Data delay found: 39
07:46:09:setup_element:INFO: Eye window for uplink 29: ________________XXXXXXX_________________
Data delay found: 39
07:46:09:setup_element:INFO: Eye window for uplink 30: ___________________XXXXXXXX_____________
Data delay found: 2
07:46:09:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXXX_______________
Data delay found: 0
07:46:09:setup_element:INFO: Setting the data phase to 35 for uplink 24
07:46:09:setup_element:INFO: Setting the data phase to 37 for uplink 25
07:46:09:setup_element:INFO: Setting the data phase to 33 for uplink 26
07:46:09:setup_element:INFO: Setting the data phase to 36 for uplink 27
07:46:09:setup_element:INFO: Setting the data phase to 39 for uplink 28
07:46:09:setup_element:INFO: Setting the data phase to 39 for uplink 29
07:46:09:setup_element:INFO: Setting the data phase to 2 for uplink 30
07:46:09:setup_element:INFO: Setting the data phase to 0 for uplink 31
07:46:09:setup_element:INFO: Beginning SMX ASICs map scan
07:46:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:46:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:46:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:46:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:46:09:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
07:46:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:46:09:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:46:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:46:10:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:46:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:46:10:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:46:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:46:10:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:46:12:setup_element:INFO: Performing Elink synchronization
07:46:12:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:46:12:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:46:12:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:46:12:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:46:12:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:46:12:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:46:12:febtest:INFO: Init all SMX (CSA): 30
07:46:21:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:46:21:febtest:INFO: 30-01 | XA-000-09-004-017-012-023-14 | 34.6 | 1159.7
07:46:21:febtest:INFO: 28-03 | XA-000-09-004-017-009-024-05 | 25.1 | 1195.1
07:46:21:febtest:INFO: 26-05 | XA-000-09-004-017-012-024-14 | 34.6 | 1159.7
07:46:22:febtest:INFO: 24-07 | XA-000-09-004-017-015-025-00 | 28.2 | 1183.3
07:46:23:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:46:25:ST3_smx:INFO: chip: 30-1 34.556970 C 1171.483840 mV
07:46:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:25:ST3_smx:INFO: Electrons
07:46:25:ST3_smx:INFO: # loops 0
07:46:27:ST3_smx:INFO: # loops 1
07:46:29:ST3_smx:INFO: # loops 2
07:46:31:ST3_smx:INFO: Total # of broken channels: 0
07:46:31:ST3_smx:INFO: List of broken channels: []
07:46:31:ST3_smx:INFO: Total # of broken channels: 0
07:46:31:ST3_smx:INFO: List of broken channels: []
07:46:33:ST3_smx:INFO: chip: 28-3 28.225000 C 1206.851500 mV
07:46:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:33:ST3_smx:INFO: Electrons
07:46:33:ST3_smx:INFO: # loops 0
07:46:35:ST3_smx:INFO: # loops 1
07:46:36:ST3_smx:INFO: # loops 2
07:46:38:ST3_smx:INFO: Total # of broken channels: 0
07:46:38:ST3_smx:INFO: List of broken channels: []
07:46:38:ST3_smx:INFO: Total # of broken channels: 0
07:46:38:ST3_smx:INFO: List of broken channels: []
07:46:40:ST3_smx:INFO: chip: 26-5 34.556970 C 1171.483840 mV
07:46:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:40:ST3_smx:INFO: Electrons
07:46:40:ST3_smx:INFO: # loops 0
07:46:42:ST3_smx:INFO: # loops 1
07:46:44:ST3_smx:INFO: # loops 2
07:46:46:ST3_smx:INFO: Total # of broken channels: 0
07:46:46:ST3_smx:INFO: List of broken channels: []
07:46:46:ST3_smx:INFO: Total # of broken channels: 0
07:46:46:ST3_smx:INFO: List of broken channels: []
07:46:48:ST3_smx:INFO: chip: 24-7 31.389742 C 1195.082160 mV
07:46:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:46:48:ST3_smx:INFO: Electrons
07:46:48:ST3_smx:INFO: # loops 0
07:46:50:ST3_smx:INFO: # loops 1
07:46:52:ST3_smx:INFO: # loops 2
07:46:54:ST3_smx:INFO: Total # of broken channels: 0
07:46:54:ST3_smx:INFO: List of broken channels: []
07:46:54:ST3_smx:INFO: Total # of broken channels: 0
07:46:54:ST3_smx:INFO: List of broken channels: []
07:46:54:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:46:54:febtest:INFO: 30-01 | XA-000-09-004-017-012-023-14 | 34.6 | 1189.2
07:46:54:febtest:INFO: 28-03 | XA-000-09-004-017-009-024-05 | 28.2 | 1230.3
07:46:55:febtest:INFO: 26-05 | XA-000-09-004-017-012-024-14 | 37.7 | 1189.2
07:46:55:febtest:INFO: 24-07 | XA-000-09-004-017-015-025-00 | 31.4 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_18-07_46_01
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4373| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7803', '1.846', '1.4190']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0050', '1.850', '1.2540']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9827', '1.850', '0.2672']