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FEB_4376 24.03.26 15:36:33
Info
15:36:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:36:33:ST3_Shared:INFO: FEB-Microcable
15:36:33:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
15:36:33:febtest:INFO: Testing FEB with SN 4376
15:36:34:smx_tester:INFO: Scanning setup
15:36:34:elinks:INFO: Disabling clock on downlink 0
15:36:34:elinks:INFO: Disabling clock on downlink 1
15:36:34:elinks:INFO: Disabling clock on downlink 2
15:36:34:elinks:INFO: Disabling clock on downlink 3
15:36:34:elinks:INFO: Disabling clock on downlink 4
15:36:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:36:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
15:36:34:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:36:34:elinks:INFO: Disabling clock on downlink 0
15:36:34:elinks:INFO: Disabling clock on downlink 1
15:36:34:elinks:INFO: Disabling clock on downlink 2
15:36:34:elinks:INFO: Disabling clock on downlink 3
15:36:34:elinks:INFO: Disabling clock on downlink 4
15:36:34:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:36:34:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
15:36:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:36:35:elinks:INFO: Disabling clock on downlink 0
15:36:35:elinks:INFO: Disabling clock on downlink 1
15:36:35:elinks:INFO: Disabling clock on downlink 2
15:36:35:elinks:INFO: Disabling clock on downlink 3
15:36:35:elinks:INFO: Disabling clock on downlink 4
15:36:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:36:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
15:36:35:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
15:36:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:36:35:elinks:INFO: Disabling clock on downlink 0
15:36:35:elinks:INFO: Disabling clock on downlink 1
15:36:35:elinks:INFO: Disabling clock on downlink 2
15:36:35:elinks:INFO: Disabling clock on downlink 3
15:36:35:elinks:INFO: Disabling clock on downlink 4
15:36:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:36:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
15:36:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:36:35:elinks:INFO: Disabling clock on downlink 0
15:36:35:elinks:INFO: Disabling clock on downlink 1
15:36:35:elinks:INFO: Disabling clock on downlink 2
15:36:35:elinks:INFO: Disabling clock on downlink 3
15:36:35:elinks:INFO: Disabling clock on downlink 4
15:36:35:setup_element:INFO: Checking SOS, encoding_mode: SOS
15:36:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
15:36:35:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
15:36:35:setup_element:INFO: Scanning clock phase
15:36:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:36:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:36:35:setup_element:INFO: Clock phase scan results for group 0, downlink 2
15:36:35:setup_element:INFO: Eye window for uplink 16: ____________________________________________________________________XXXXXX______
Clock Delay: 30
15:36:35:setup_element:INFO: Eye window for uplink 17: ____________________________________________________________________XXXXXX______
Clock Delay: 30
15:36:35:setup_element:INFO: Eye window for uplink 18: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:36:35:setup_element:INFO: Eye window for uplink 19: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:36:35:setup_element:INFO: Eye window for uplink 20: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
15:36:35:setup_element:INFO: Eye window for uplink 21: ___________________________________________________________________XXXXXXX______
Clock Delay: 30
15:36:35:setup_element:INFO: Eye window for uplink 22: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:36:35:setup_element:INFO: Eye window for uplink 23: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
15:36:35:setup_element:INFO: Eye window for uplink 24: ____________________________________________________________________XXXXXX______
Clock Delay: 30
15:36:35:setup_element:INFO: Eye window for uplink 25: ____________________________________________________________________XXXXXX______
Clock Delay: 30
15:36:35:setup_element:INFO: Eye window for uplink 26: ____________________________________________________________________XXXXX_______
Clock Delay: 30
15:36:35:setup_element:INFO: Eye window for uplink 27: ____________________________________________________________________XXXXX_______
Clock Delay: 30
15:36:35:setup_element:INFO: Eye window for uplink 28: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
15:36:35:setup_element:INFO: Eye window for uplink 29: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
15:36:35:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
15:36:35:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXX_____
Clock Delay: 31
15:36:35:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
15:36:35:setup_element:INFO: Scanning data phases
15:36:35:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:36:35:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:36:40:setup_element:INFO: Data phase scan results for group 0, downlink 2
15:36:40:setup_element:INFO: Eye window for uplink 16: XXXXXXX______________________________XXX
Data delay found: 21
15:36:40:setup_element:INFO: Eye window for uplink 17: XXXX________________________________XXXX
Data delay found: 19
15:36:40:setup_element:INFO: Eye window for uplink 18: XXXXX_________________________________XX
Data delay found: 21
15:36:40:setup_element:INFO: Eye window for uplink 19: XXXXX________________________________XXX
Data delay found: 20
15:36:40:setup_element:INFO: Eye window for uplink 20: XXXX________________________________XXXX
Data delay found: 19
15:36:40:setup_element:INFO: Eye window for uplink 21: XXXXXX________________________________XX
Data delay found: 21
15:36:40:setup_element:INFO: Eye window for uplink 22: XXXXXX_________________________________X
Data delay found: 22
15:36:40:setup_element:INFO: Eye window for uplink 23: XXXX________________________________XXXX
Data delay found: 19
15:36:40:setup_element:INFO: Eye window for uplink 24: _____XXXXXXXXXXXX_______________________
Data delay found: 30
15:36:40:setup_element:INFO: Eye window for uplink 25: ________XXXXXXXXXXX_____________________
Data delay found: 33
15:36:40:setup_element:INFO: Eye window for uplink 26: ___________XXXXXXX______________________
Data delay found: 34
15:36:40:setup_element:INFO: Eye window for uplink 27: _____________XXXXXXXXX__________________
Data delay found: 37
15:36:40:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXXXXXX_______________
Data delay found: 39
15:36:40:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXXXXX________________
Data delay found: 38
15:36:40:setup_element:INFO: Eye window for uplink 30: _________________XXXXXXXXXX_____________
Data delay found: 1
15:36:40:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXXXXX_______________
Data delay found: 39
15:36:40:setup_element:INFO: Setting the data phase to 21 for uplink 16
15:36:41:setup_element:INFO: Setting the data phase to 19 for uplink 17
15:36:41:setup_element:INFO: Setting the data phase to 21 for uplink 18
15:36:41:setup_element:INFO: Setting the data phase to 20 for uplink 19
15:36:41:setup_element:INFO: Setting the data phase to 19 for uplink 20
15:36:41:setup_element:INFO: Setting the data phase to 21 for uplink 21
15:36:41:setup_element:INFO: Setting the data phase to 22 for uplink 22
15:36:41:setup_element:INFO: Setting the data phase to 19 for uplink 23
15:36:41:setup_element:INFO: Setting the data phase to 30 for uplink 24
15:36:41:setup_element:INFO: Setting the data phase to 33 for uplink 25
15:36:41:setup_element:INFO: Setting the data phase to 34 for uplink 26
15:36:41:setup_element:INFO: Setting the data phase to 37 for uplink 27
15:36:41:setup_element:INFO: Setting the data phase to 39 for uplink 28
15:36:41:setup_element:INFO: Setting the data phase to 38 for uplink 29
15:36:41:setup_element:INFO: Setting the data phase to 1 for uplink 30
15:36:41:setup_element:INFO: Setting the data phase to 39 for uplink 31
15:36:41:setup_element:INFO: Beginning SMX ASICs map scan
15:36:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:36:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:36:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:36:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:36:41:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
15:36:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
15:36:41:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
15:36:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
15:36:41:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
15:36:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
15:36:41:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
15:36:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
15:36:41:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
15:36:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
15:36:41:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
15:36:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
15:36:42:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
15:36:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
15:36:42:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
15:36:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
15:36:42:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
15:36:43:setup_element:INFO: Performing Elink synchronization
15:36:43:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
15:36:43:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
15:36:43:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
15:36:43:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
15:36:43:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
15:36:43:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
15:36:44:febtest:INFO: Init all SMX (CSA): 30
15:36:58:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:36:58:febtest:INFO: 23-00 | XA-000-09-004-017-017-016-05 | 34.6 | 1183.3
15:36:58:febtest:INFO: 30-01 | XA-000-09-004-017-002-015-00 | 47.3 | 1141.9
15:36:59:febtest:INFO: 21-02 | XA-000-09-004-017-011-016-06 | 47.3 | 1147.8
15:36:59:febtest:INFO: 28-03 | XA-000-09-004-017-005-015-08 | 66.4 | 1082.3
15:36:59:febtest:INFO: 19-04 | XA-000-09-004-017-011-017-06 | 44.1 | 1147.8
15:36:59:febtest:INFO: 26-05 | XA-000-09-004-017-014-017-13 | 50.4 | 1130.0
15:36:59:febtest:INFO: 17-06 | XA-000-09-004-017-008-017-08 | 53.6 | 1118.1
15:37:00:febtest:INFO: 24-07 | XA-000-09-004-017-017-017-05 | 40.9 | 1165.6
15:37:01:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
15:37:03:ST3_smx:INFO: chip: 23-0 34.556970 C 1200.969315 mV
15:37:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:03:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:03:ST3_smx:INFO: Electrons
15:37:03:ST3_smx:INFO: # loops 0
15:37:04:ST3_smx:INFO: # loops 1
15:37:06:ST3_smx:INFO: # loops 2
15:37:07:ST3_smx:INFO: Total # of broken channels: 0
15:37:07:ST3_smx:INFO: List of broken channels: []
15:37:07:ST3_smx:INFO: Total # of broken channels: 0
15:37:07:ST3_smx:INFO: List of broken channels: []
15:37:09:ST3_smx:INFO: chip: 30-1 47.250730 C 1165.571835 mV
15:37:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:09:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:09:ST3_smx:INFO: Electrons
15:37:09:ST3_smx:INFO: # loops 0
15:37:11:ST3_smx:INFO: # loops 1
15:37:12:ST3_smx:INFO: # loops 2
15:37:14:ST3_smx:INFO: Total # of broken channels: 0
15:37:14:ST3_smx:INFO: List of broken channels: []
15:37:14:ST3_smx:INFO: Total # of broken channels: 0
15:37:14:ST3_smx:INFO: List of broken channels: []
15:37:15:ST3_smx:INFO: chip: 21-2 47.250730 C 1171.483840 mV
15:37:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:15:ST3_smx:INFO: Electrons
15:37:15:ST3_smx:INFO: # loops 0
15:37:17:ST3_smx:INFO: # loops 1
15:37:19:ST3_smx:INFO: # loops 2
15:37:20:ST3_smx:INFO: Total # of broken channels: 0
15:37:20:ST3_smx:INFO: List of broken channels: []
15:37:20:ST3_smx:INFO: Total # of broken channels: 2
15:37:20:ST3_smx:INFO: List of broken channels: [13, 15]
15:37:22:ST3_smx:INFO: chip: 28-3 66.365920 C 1106.178435 mV
15:37:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:22:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:22:ST3_smx:INFO: Electrons
15:37:22:ST3_smx:INFO: # loops 0
15:37:24:ST3_smx:INFO: # loops 1
15:37:25:ST3_smx:INFO: # loops 2
15:37:27:ST3_smx:INFO: Total # of broken channels: 0
15:37:27:ST3_smx:INFO: List of broken channels: []
15:37:27:ST3_smx:INFO: Total # of broken channels: 0
15:37:27:ST3_smx:INFO: List of broken channels: []
15:37:28:ST3_smx:INFO: chip: 19-4 47.250730 C 1165.571835 mV
15:37:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:28:ST3_smx:INFO: Electrons
15:37:28:ST3_smx:INFO: # loops 0
15:37:30:ST3_smx:INFO: # loops 1
15:37:31:ST3_smx:INFO: # loops 2
15:37:33:ST3_smx:INFO: Total # of broken channels: 0
15:37:33:ST3_smx:INFO: List of broken channels: []
15:37:33:ST3_smx:INFO: Total # of broken channels: 0
15:37:33:ST3_smx:INFO: List of broken channels: []
15:37:35:ST3_smx:INFO: chip: 26-5 53.612520 C 1153.732915 mV
15:37:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:35:ST3_smx:INFO: Electrons
15:37:35:ST3_smx:INFO: # loops 0
15:37:36:ST3_smx:INFO: # loops 1
15:37:38:ST3_smx:INFO: # loops 2
15:37:39:ST3_smx:INFO: Total # of broken channels: 0
15:37:39:ST3_smx:INFO: List of broken channels: []
15:37:39:ST3_smx:INFO: Total # of broken channels: 0
15:37:39:ST3_smx:INFO: List of broken channels: []
15:37:41:ST3_smx:INFO: chip: 17-6 56.797143 C 1129.995435 mV
15:37:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:41:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:41:ST3_smx:INFO: Electrons
15:37:41:ST3_smx:INFO: # loops 0
15:37:43:ST3_smx:INFO: # loops 1
15:37:45:ST3_smx:INFO: # loops 2
15:37:46:ST3_smx:INFO: Total # of broken channels: 0
15:37:46:ST3_smx:INFO: List of broken channels: []
15:37:46:ST3_smx:INFO: Total # of broken channels: 0
15:37:46:ST3_smx:INFO: List of broken channels: []
15:37:48:ST3_smx:INFO: chip: 24-7 44.073563 C 1177.390875 mV
15:37:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:48:ST3_discr_histo:WARNING: Not enough entries for fit!!!
15:37:48:ST3_smx:INFO: Electrons
15:37:48:ST3_smx:INFO: # loops 0
15:37:50:ST3_smx:INFO: # loops 1
15:37:51:ST3_smx:INFO: # loops 2
15:37:53:ST3_smx:INFO: Total # of broken channels: 0
15:37:53:ST3_smx:INFO: List of broken channels: []
15:37:53:ST3_smx:INFO: Total # of broken channels: 0
15:37:53:ST3_smx:INFO: List of broken channels: []
15:37:53:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
15:37:53:febtest:INFO: 23-00 | XA-000-09-004-017-017-016-05 | 37.7 | 1218.6
15:37:53:febtest:INFO: 30-01 | XA-000-09-004-017-002-015-00 | 50.4 | 1189.2
15:37:54:febtest:INFO: 21-02 | XA-000-09-004-017-011-016-06 | 44.1 | 1236.2
15:37:54:febtest:INFO: 28-03 | XA-000-09-004-017-005-015-08 | 69.6 | 1124.0
15:37:54:febtest:INFO: 19-04 | XA-000-09-004-017-011-017-06 | 47.3 | 1183.3
15:37:54:febtest:INFO: 26-05 | XA-000-09-004-017-014-017-13 | 56.8 | 1171.5
15:37:54:febtest:INFO: 17-06 | XA-000-09-004-017-008-017-08 | 60.0 | 1153.7
15:37:55:febtest:INFO: 24-07 | XA-000-09-004-017-017-017-05 | 47.3 | 1201.0
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_24-15_36_33
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4376| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5440', '1.849', '3.1280']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0040', '1.850', '2.6190']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9860', '1.850', '0.5304']