FEB_4395 08.04.26 09:00:58
Info
09:00:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:00:58:ST3_Shared:INFO: FEB-Microcable
09:00:58:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:00:58:febtest:INFO: Testing FEB with SN 4395
09:01:00:smx_tester:INFO: Scanning setup
09:01:00:elinks:INFO: Disabling clock on downlink 0
09:01:00:elinks:INFO: Disabling clock on downlink 1
09:01:00:elinks:INFO: Disabling clock on downlink 2
09:01:00:elinks:INFO: Disabling clock on downlink 3
09:01:00:elinks:INFO: Disabling clock on downlink 4
09:01:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:01:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:00:elinks:INFO: Disabling clock on downlink 0
09:01:00:elinks:INFO: Disabling clock on downlink 1
09:01:00:elinks:INFO: Disabling clock on downlink 2
09:01:00:elinks:INFO: Disabling clock on downlink 3
09:01:00:elinks:INFO: Disabling clock on downlink 4
09:01:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:01:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:00:elinks:INFO: Disabling clock on downlink 0
09:01:00:elinks:INFO: Disabling clock on downlink 1
09:01:00:elinks:INFO: Disabling clock on downlink 2
09:01:00:elinks:INFO: Disabling clock on downlink 3
09:01:00:elinks:INFO: Disabling clock on downlink 4
09:01:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:01:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:01:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:01:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:01:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:01:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:01:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:01:00:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:01:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:00:elinks:INFO: Disabling clock on downlink 0
09:01:00:elinks:INFO: Disabling clock on downlink 1
09:01:00:elinks:INFO: Disabling clock on downlink 2
09:01:00:elinks:INFO: Disabling clock on downlink 3
09:01:00:elinks:INFO: Disabling clock on downlink 4
09:01:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:01:00:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:00:elinks:INFO: Disabling clock on downlink 0
09:01:00:elinks:INFO: Disabling clock on downlink 1
09:01:00:elinks:INFO: Disabling clock on downlink 2
09:01:00:elinks:INFO: Disabling clock on downlink 3
09:01:00:elinks:INFO: Disabling clock on downlink 4
09:01:00:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:01:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:01:01:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:01:01:setup_element:INFO: Scanning clock phase
09:01:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:01:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:01:01:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:01:01:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:01:01:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:01:01:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:01:01:setup_element:INFO: Eye window for uplink 28: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
09:01:01:setup_element:INFO: Eye window for uplink 29: ___________________________________________________________________XXXXXX_______
Clock Delay: 29
09:01:01:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:01:01:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:01:01:setup_element:INFO: Setting the clock phase to 29 for group 0, downlink 2
09:01:01:setup_element:INFO: Scanning data phases
09:01:01:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:01:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:06:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:01:06:setup_element:INFO: Eye window for uplink 24: ________XXXXXXXX________________________
Data delay found: 31
09:01:06:setup_element:INFO: Eye window for uplink 25: __________XXXXXXXX______________________
Data delay found: 33
09:01:06:setup_element:INFO: Eye window for uplink 26: ___________XXXXXXX______________________
Data delay found: 34
09:01:06:setup_element:INFO: Eye window for uplink 27: _____________XXXXXXXX___________________
Data delay found: 36
09:01:06:setup_element:INFO: Eye window for uplink 28: __________________XXXXXXX_______________
Data delay found: 1
09:01:06:setup_element:INFO: Eye window for uplink 29: __________________XXXXXXX_______________
Data delay found: 1
09:01:06:setup_element:INFO: Eye window for uplink 30: _________________XXXXXXXXX______________
Data delay found: 1
09:01:06:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXXXX________________
Data delay found: 39
09:01:06:setup_element:INFO: Setting the data phase to 31 for uplink 24
09:01:06:setup_element:INFO: Setting the data phase to 33 for uplink 25
09:01:06:setup_element:INFO: Setting the data phase to 34 for uplink 26
09:01:06:setup_element:INFO: Setting the data phase to 36 for uplink 27
09:01:06:setup_element:INFO: Setting the data phase to 1 for uplink 28
09:01:06:setup_element:INFO: Setting the data phase to 1 for uplink 29
09:01:06:setup_element:INFO: Setting the data phase to 1 for uplink 30
09:01:06:setup_element:INFO: Setting the data phase to 39 for uplink 31
09:01:06:setup_element:INFO: Beginning SMX ASICs map scan
09:01:06:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:06:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:06:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:01:06:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:01:06:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:01:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:01:06:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:01:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:01:07:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:01:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:01:07:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:01:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:01:07:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:01:09:setup_element:INFO: Performing Elink synchronization
09:01:09:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:01:09:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:01:09:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:01:09:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:01:09:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:01:09:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:01:09:febtest:INFO: Init all SMX (CSA): 30
09:01:16:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:01:17:febtest:INFO: 30-01 | XA-000-09-004-039-016-022-02 | 9.3 | 1265.4
09:01:17:febtest:INFO: 28-03 | XA-000-09-004-039-016-023-02 | 21.9 | 1224.5
09:01:17:febtest:INFO: 26-05 | XA-000-09-004-039-010-023-01 | 25.1 | 1206.9
09:01:17:febtest:INFO: 24-07 | XA-000-09-004-039-013-023-09 | 34.6 | 1183.3
09:01:18:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:01:20:ST3_smx:INFO: chip: 30-1 9.288730 C 1277.050060 mV
09:01:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:20:ST3_smx:INFO: Electrons
09:01:20:ST3_smx:INFO: # loops 0
09:01:22:ST3_smx:INFO: # loops 1
09:01:24:ST3_smx:INFO: # loops 2
09:01:25:ST3_smx:INFO: Total # of broken channels: 0
09:01:25:ST3_smx:INFO: List of broken channels: []
09:01:25:ST3_smx:INFO: Total # of broken channels: 0
09:01:25:ST3_smx:INFO: List of broken channels: []
09:01:27:ST3_smx:INFO: chip: 28-3 21.902970 C 1236.187875 mV
09:01:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:27:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:27:ST3_smx:INFO: Electrons
09:01:27:ST3_smx:INFO: # loops 0
09:01:28:ST3_smx:INFO: # loops 1
09:01:30:ST3_smx:INFO: # loops 2
09:01:32:ST3_smx:INFO: Total # of broken channels: 0
09:01:32:ST3_smx:INFO: List of broken channels: []
09:01:32:ST3_smx:INFO: Total # of broken channels: 0
09:01:32:ST3_smx:INFO: List of broken channels: []
09:01:33:ST3_smx:INFO: chip: 26-5 28.225000 C 1224.468235 mV
09:01:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:33:ST3_smx:INFO: Electrons
09:01:33:ST3_smx:INFO: # loops 0
09:01:35:ST3_smx:INFO: # loops 1
09:01:37:ST3_smx:INFO: # loops 2
09:01:38:ST3_smx:INFO: Total # of broken channels: 0
09:01:38:ST3_smx:INFO: List of broken channels: []
09:01:38:ST3_smx:INFO: Total # of broken channels: 0
09:01:38:ST3_smx:INFO: List of broken channels: []
09:01:40:ST3_smx:INFO: chip: 24-7 37.726682 C 1189.190035 mV
09:01:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:01:40:ST3_smx:INFO: Electrons
09:01:40:ST3_smx:INFO: # loops 0
09:01:41:ST3_smx:INFO: # loops 1
09:01:43:ST3_smx:INFO: # loops 2
09:01:44:ST3_smx:INFO: Total # of broken channels: 0
09:01:44:ST3_smx:INFO: List of broken channels: []
09:01:44:ST3_smx:INFO: Total # of broken channels: 0
09:01:44:ST3_smx:INFO: List of broken channels: []
09:01:45:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:01:45:febtest:INFO: 30-01 | XA-000-09-004-039-016-022-02 | 12.4 | 1300.3
09:01:45:febtest:INFO: 28-03 | XA-000-09-004-039-016-023-02 | 25.1 | 1259.6
09:01:45:febtest:INFO: 26-05 | XA-000-09-004-039-010-023-01 | 28.2 | 1247.9
09:01:46:febtest:INFO: 24-07 | XA-000-09-004-039-013-023-09 | 37.7 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_04_08-09_00_58
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4395| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7846', '1.850', '0.9267']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9941', '1.850', '1.1510']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.9752', '1.850', '0.2627']