FEB_4395 10.04.26 09:40:30
Info
09:40:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:40:30:ST3_Shared:INFO: FEB-Microcable
09:40:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:40:30:febtest:INFO: Testing FEB with SN 4395
09:40:32:smx_tester:INFO: Scanning setup
09:40:32:elinks:INFO: Disabling clock on downlink 0
09:40:32:elinks:INFO: Disabling clock on downlink 1
09:40:32:elinks:INFO: Disabling clock on downlink 2
09:40:32:elinks:INFO: Disabling clock on downlink 3
09:40:32:elinks:INFO: Disabling clock on downlink 4
09:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:32:elinks:INFO: Disabling clock on downlink 0
09:40:32:elinks:INFO: Disabling clock on downlink 1
09:40:32:elinks:INFO: Disabling clock on downlink 2
09:40:32:elinks:INFO: Disabling clock on downlink 3
09:40:32:elinks:INFO: Disabling clock on downlink 4
09:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:32:elinks:INFO: Disabling clock on downlink 0
09:40:32:elinks:INFO: Disabling clock on downlink 1
09:40:32:elinks:INFO: Disabling clock on downlink 2
09:40:32:elinks:INFO: Disabling clock on downlink 3
09:40:32:elinks:INFO: Disabling clock on downlink 4
09:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:40:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:32:elinks:INFO: Disabling clock on downlink 0
09:40:32:elinks:INFO: Disabling clock on downlink 1
09:40:32:elinks:INFO: Disabling clock on downlink 2
09:40:32:elinks:INFO: Disabling clock on downlink 3
09:40:32:elinks:INFO: Disabling clock on downlink 4
09:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:32:elinks:INFO: Disabling clock on downlink 0
09:40:32:elinks:INFO: Disabling clock on downlink 1
09:40:32:elinks:INFO: Disabling clock on downlink 2
09:40:32:elinks:INFO: Disabling clock on downlink 3
09:40:32:elinks:INFO: Disabling clock on downlink 4
09:40:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:40:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:40:32:setup_element:INFO: Scanning clock phase
09:40:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:33:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:40:33:setup_element:INFO: Eye window for uplink 16: XXXXXXX_________________________________________________________________________
Clock Delay: 43
09:40:33:setup_element:INFO: Eye window for uplink 17: XXXXXXX_________________________________________________________________________
Clock Delay: 43
09:40:33:setup_element:INFO: Eye window for uplink 18: XXXXXX______________________________________________________________XXXXXXXXXXXX
Clock Delay: 36
09:40:33:setup_element:INFO: Eye window for uplink 19: XXXXXX______________________________________________________________XXXXXXXXXXXX
Clock Delay: 36
09:40:33:setup_element:INFO: Eye window for uplink 20: XXX________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 34
09:40:33:setup_element:INFO: Eye window for uplink 21: XXX________________________________________________________________XXXXXXXXXXXXX
Clock Delay: 34
09:40:33:setup_element:INFO: Eye window for uplink 22: XXX________________________________________________________________XXXXXXX______
Clock Delay: 34
09:40:33:setup_element:INFO: Eye window for uplink 23: XXX________________________________________________________________XXXXXXX______
Clock Delay: 34
09:40:33:setup_element:INFO: Eye window for uplink 24: XXXXXXXXXX_________________________________________________________XXXXXXXXXXXXX
Clock Delay: 38
09:40:33:setup_element:INFO: Eye window for uplink 25: XXXXXXXXXX_________________________________________________________XXXXXXXXXXXXX
Clock Delay: 38
09:40:33:setup_element:INFO: Eye window for uplink 26: XXX______X_________________________________________________________XXXXXXXXXXXXX
Clock Delay: 38
09:40:33:setup_element:INFO: Eye window for uplink 27: XXX______X_________________________________________________________XXXXXXXXXXXXX
Clock Delay: 38
09:40:33:setup_element:INFO: Eye window for uplink 28: XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
09:40:33:setup_element:INFO: Eye window for uplink 29: XXXXXX_______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
09:40:33:setup_element:INFO: Eye window for uplink 30: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
09:40:33:setup_element:INFO: Eye window for uplink 31: XXXXXXXX_____________________________________________________________XXXXXXXXXXX
Clock Delay: 38
09:40:33:setup_element:INFO: Setting the clock phase to 38 for group 0, downlink 2
09:40:33:setup_element:INFO: Scanning data phases
09:40:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:38:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:40:38:setup_element:INFO: Eye window for uplink 16: _________________________XXXXXXXXXXXXX__
Data delay found: 11
09:40:38:setup_element:INFO: Eye window for uplink 17: _______________________XXXXXXXXXXXXX____
Data delay found: 9
09:40:38:setup_element:INFO: Eye window for uplink 18: _____________________________XXXXXXXXXXX
Data delay found: 14
09:40:38:setup_element:INFO: Eye window for uplink 19: _____________________________XXXXXXXXXX_
Data delay found: 13
09:40:38:setup_element:INFO: Eye window for uplink 20: ____________________________XXXXXXX_____
Data delay found: 11
09:40:38:setup_element:INFO: Eye window for uplink 21: ______________________________XXXXXXX___
Data delay found: 13
09:40:38:setup_element:INFO: Eye window for uplink 22: ________________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
09:40:38:setup_element:INFO: Eye window for uplink 23: ________________XXXXXXXXXXXXXXXXXXXXXXXX
Data delay found: 7
09:40:38:setup_element:INFO: Eye window for uplink 24: XXXXXXXX___________________________XXXXX
Data delay found: 21
09:40:38:setup_element:INFO: Eye window for uplink 25: XXXXXXXXXX___________________________XXX
Data delay found: 23
09:40:38:setup_element:INFO: Eye window for uplink 26: __XXXXXXXXXXXXXXX_______________________
Data delay found: 29
09:40:38:setup_element:INFO: Eye window for uplink 27: ___XXXXXXXXXXXXXX_______________________
Data delay found: 29
09:40:38:setup_element:INFO: Eye window for uplink 28: _________XXXXXXXXXX_____________________
Data delay found: 33
09:40:38:setup_element:INFO: Eye window for uplink 29: ________XXXXXXXXXXX_____________________
Data delay found: 33
09:40:38:setup_element:INFO: Eye window for uplink 30: _______X_XXXXXXXXXXXX___________________
Data delay found: 33
09:40:38:setup_element:INFO: Eye window for uplink 31: _______XXXXXXXXXXX______________________
Data delay found: 32
09:40:38:setup_element:INFO: Setting the data phase to 11 for uplink 16
09:40:38:setup_element:INFO: Setting the data phase to 9 for uplink 17
09:40:38:setup_element:INFO: Setting the data phase to 14 for uplink 18
09:40:38:setup_element:INFO: Setting the data phase to 13 for uplink 19
09:40:38:setup_element:INFO: Setting the data phase to 11 for uplink 20
09:40:38:setup_element:INFO: Setting the data phase to 13 for uplink 21
09:40:38:setup_element:INFO: Setting the data phase to 7 for uplink 22
09:40:38:setup_element:INFO: Setting the data phase to 7 for uplink 23
09:40:38:setup_element:INFO: Setting the data phase to 21 for uplink 24
09:40:38:setup_element:INFO: Setting the data phase to 23 for uplink 25
09:40:38:setup_element:INFO: Setting the data phase to 29 for uplink 26
09:40:38:setup_element:INFO: Setting the data phase to 29 for uplink 27
09:40:38:setup_element:INFO: Setting the data phase to 33 for uplink 28
09:40:38:setup_element:INFO: Setting the data phase to 33 for uplink 29
09:40:38:setup_element:INFO: Setting the data phase to 33 for uplink 30
09:40:38:setup_element:INFO: Setting the data phase to 32 for uplink 31
09:40:38:setup_element:INFO: Beginning SMX ASICs map scan
09:40:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:40:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:40:38:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
09:40:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
09:40:38:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
09:40:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:40:38:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:40:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
09:40:38:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
09:40:38:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:40:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:40:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
09:40:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
09:40:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:40:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:40:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
09:40:39:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
09:40:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:40:39:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:40:41:setup_element:INFO: Performing Elink synchronization
09:40:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:40:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:40:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:40:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:40:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:40:41:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:40:41:febtest:INFO: Init all SMX (CSA): 30
09:40:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:40:56:febtest:INFO: 23-00 | XA-000-09-004-039-011-007-11 | 47.3 | 1135.9
09:40:56:febtest:INFO: 30-01 | XA-000-09-004-039-016-022-02 | 18.7 | 1236.2
09:40:56:febtest:INFO: 21-02 | XA-000-09-004-039-014-007-00 | 47.3 | 1141.9
09:40:57:febtest:INFO: 28-03 | XA-000-09-004-039-016-023-02 | 31.4 | 1201.0
09:40:57:febtest:INFO: 19-04 | XA-000-09-004-039-017-007-08 | 28.2 | 1206.9
09:40:57:febtest:INFO: 26-05 | XA-000-09-004-039-010-023-01 | 31.4 | 1195.1
09:40:57:febtest:INFO: 17-06 | XA-000-09-004-039-014-006-00 | 44.1 | 1135.9
09:40:57:febtest:INFO: 24-07 | XA-000-09-004-039-013-023-09 | 44.1 | 1165.6
09:40:58:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:41:00:ST3_smx:INFO: chip: 23-0 47.250730 C 1165.571835 mV
09:41:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:00:ST3_smx:INFO: Electrons
09:41:00:ST3_smx:INFO: # loops 0
09:41:02:ST3_smx:INFO: # loops 1
09:41:04:ST3_smx:INFO: # loops 2
09:41:06:ST3_smx:INFO: Total # of broken channels: 0
09:41:06:ST3_smx:INFO: List of broken channels: []
09:41:06:ST3_smx:INFO: Total # of broken channels: 0
09:41:06:ST3_smx:INFO: List of broken channels: []
09:41:07:ST3_smx:INFO: chip: 30-1 21.902970 C 1271.227515 mV
09:41:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:07:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:07:ST3_smx:INFO: Electrons
09:41:07:ST3_smx:INFO: # loops 0
09:41:09:ST3_smx:INFO: # loops 1
09:41:11:ST3_smx:INFO: # loops 2
09:41:12:ST3_smx:INFO: Total # of broken channels: 0
09:41:12:ST3_smx:INFO: List of broken channels: []
09:41:12:ST3_smx:INFO: Total # of broken channels: 0
09:41:12:ST3_smx:INFO: List of broken channels: []
09:41:14:ST3_smx:INFO: chip: 21-2 47.250730 C 1177.390875 mV
09:41:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:14:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:14:ST3_smx:INFO: Electrons
09:41:14:ST3_smx:INFO: # loops 0
09:41:15:ST3_smx:INFO: # loops 1
09:41:17:ST3_smx:INFO: # loops 2
09:41:19:ST3_smx:INFO: Total # of broken channels: 0
09:41:19:ST3_smx:INFO: List of broken channels: []
09:41:19:ST3_smx:INFO: Total # of broken channels: 0
09:41:19:ST3_smx:INFO: List of broken channels: []
09:41:20:ST3_smx:INFO: chip: 28-3 34.556970 C 1236.187875 mV
09:41:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:20:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:20:ST3_smx:INFO: Electrons
09:41:20:ST3_smx:INFO: # loops 0
09:41:22:ST3_smx:INFO: # loops 1
09:41:23:ST3_smx:INFO: # loops 2
09:41:25:ST3_smx:INFO: Total # of broken channels: 0
09:41:25:ST3_smx:INFO: List of broken channels: []
09:41:25:ST3_smx:INFO: Total # of broken channels: 0
09:41:25:ST3_smx:INFO: List of broken channels: []
09:41:26:ST3_smx:INFO: chip: 19-4 31.389742 C 1230.330540 mV
09:41:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:26:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:26:ST3_smx:INFO: Electrons
09:41:26:ST3_smx:INFO: # loops 0
09:41:28:ST3_smx:INFO: # loops 1
09:41:30:ST3_smx:INFO: # loops 2
09:41:32:ST3_smx:INFO: Total # of broken channels: 0
09:41:32:ST3_smx:INFO: List of broken channels: []
09:41:32:ST3_smx:INFO: Total # of broken channels: 0
09:41:32:ST3_smx:INFO: List of broken channels: []
09:41:33:ST3_smx:INFO: chip: 26-5 37.726682 C 1224.468235 mV
09:41:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:33:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:33:ST3_smx:INFO: Electrons
09:41:33:ST3_smx:INFO: # loops 0
09:41:35:ST3_smx:INFO: # loops 1
09:41:36:ST3_smx:INFO: # loops 2
09:41:38:ST3_smx:INFO: Total # of broken channels: 0
09:41:38:ST3_smx:INFO: List of broken channels: []
09:41:38:ST3_smx:INFO: Total # of broken channels: 0
09:41:38:ST3_smx:INFO: List of broken channels: []
09:41:39:ST3_smx:INFO: chip: 17-6 47.250730 C 1165.571835 mV
09:41:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:40:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:40:ST3_smx:INFO: Electrons
09:41:40:ST3_smx:INFO: # loops 0
09:41:41:ST3_smx:INFO: # loops 1
09:41:43:ST3_smx:INFO: # loops 2
09:41:44:ST3_smx:INFO: Total # of broken channels: 0
09:41:44:ST3_smx:INFO: List of broken channels: []
09:41:44:ST3_smx:INFO: Total # of broken channels: 0
09:41:44:ST3_smx:INFO: List of broken channels: []
09:41:46:ST3_smx:INFO: chip: 24-7 47.250730 C 1189.190035 mV
09:41:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:46:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:41:46:ST3_smx:INFO: Electrons
09:41:46:ST3_smx:INFO: # loops 0
09:41:48:ST3_smx:INFO: # loops 1
09:41:49:ST3_smx:INFO: # loops 2
09:41:51:ST3_smx:INFO: Total # of broken channels: 0
09:41:51:ST3_smx:INFO: List of broken channels: []
09:41:51:ST3_smx:INFO: Total # of broken channels: 0
09:41:51:ST3_smx:INFO: List of broken channels: []
09:41:52:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:41:52:febtest:INFO: 23-00 | XA-000-09-004-039-011-007-11 | 53.6 | 1189.2
09:41:52:febtest:INFO: 30-01 | XA-000-09-004-039-016-022-02 | 25.1 | 1288.7
09:41:52:febtest:INFO: 21-02 | XA-000-09-004-039-014-007-00 | 50.4 | 1195.1
09:41:52:febtest:INFO: 28-03 | XA-000-09-004-039-016-023-02 | 37.7 | 1259.6
09:41:53:febtest:INFO: 19-04 | XA-000-09-004-039-017-007-08 | 31.4 | 1253.7
09:41:53:febtest:INFO: 26-05 | XA-000-09-004-039-010-023-01 | 37.7 | 1247.9
09:41:53:febtest:INFO: 17-06 | XA-000-09-004-039-014-006-00 | 50.4 | 1189.2
09:41:53:febtest:INFO: 24-07 | XA-000-09-004-039-013-023-09 | 50.4 | 1206.9
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_04_10-09_40_30
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4395| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.6110', '1.849', '2.0900']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9890', '1.850', '2.5200']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.9560', '1.850', '0.5218']