FEB_4403 31.03.26 08:59:39
Info
08:59:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:59:39:ST3_Shared:INFO: FEB-Microcable
08:59:39:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
08:59:39:febtest:INFO: Testing FEB with SN 4403
08:59:40:smx_tester:INFO: Scanning setup
08:59:40:elinks:INFO: Disabling clock on downlink 0
08:59:40:elinks:INFO: Disabling clock on downlink 1
08:59:40:elinks:INFO: Disabling clock on downlink 2
08:59:40:elinks:INFO: Disabling clock on downlink 3
08:59:40:elinks:INFO: Disabling clock on downlink 4
08:59:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
08:59:40:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:40:elinks:INFO: Disabling clock on downlink 0
08:59:40:elinks:INFO: Disabling clock on downlink 1
08:59:40:elinks:INFO: Disabling clock on downlink 2
08:59:40:elinks:INFO: Disabling clock on downlink 3
08:59:40:elinks:INFO: Disabling clock on downlink 4
08:59:40:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:40:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
08:59:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:41:elinks:INFO: Disabling clock on downlink 0
08:59:41:elinks:INFO: Disabling clock on downlink 1
08:59:41:elinks:INFO: Disabling clock on downlink 2
08:59:41:elinks:INFO: Disabling clock on downlink 3
08:59:41:elinks:INFO: Disabling clock on downlink 4
08:59:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:59:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
08:59:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
08:59:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
08:59:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
08:59:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
08:59:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
08:59:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
08:59:41:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
08:59:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:41:elinks:INFO: Disabling clock on downlink 0
08:59:41:elinks:INFO: Disabling clock on downlink 1
08:59:41:elinks:INFO: Disabling clock on downlink 2
08:59:41:elinks:INFO: Disabling clock on downlink 3
08:59:41:elinks:INFO: Disabling clock on downlink 4
08:59:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
08:59:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:41:elinks:INFO: Disabling clock on downlink 0
08:59:41:elinks:INFO: Disabling clock on downlink 1
08:59:41:elinks:INFO: Disabling clock on downlink 2
08:59:41:elinks:INFO: Disabling clock on downlink 3
08:59:41:elinks:INFO: Disabling clock on downlink 4
08:59:41:setup_element:INFO: Checking SOS, encoding_mode: SOS
08:59:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
08:59:41:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
08:59:41:setup_element:INFO: Scanning clock phase
08:59:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:59:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:59:41:setup_element:INFO: Clock phase scan results for group 0, downlink 2
08:59:41:setup_element:INFO: Eye window for uplink 24: __________________________________________________________________XXXXXX________
Clock Delay: 28
08:59:41:setup_element:INFO: Eye window for uplink 25: __________________________________________________________________XXXXXX________
Clock Delay: 28
08:59:41:setup_element:INFO: Eye window for uplink 26: __________________________________________________________________XXXXXX________
Clock Delay: 28
08:59:41:setup_element:INFO: Eye window for uplink 27: __________________________________________________________________XXXXXX________
Clock Delay: 28
08:59:41:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________XXXXXXX________
Clock Delay: 28
08:59:41:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXXX________
Clock Delay: 28
08:59:41:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXX________
Clock Delay: 29
08:59:41:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXX________
Clock Delay: 29
08:59:41:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
08:59:41:setup_element:INFO: Scanning data phases
08:59:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:59:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:59:46:setup_element:INFO: Data phase scan results for group 0, downlink 2
08:59:46:setup_element:INFO: Eye window for uplink 24: _______XXXXXXXX_________________________
Data delay found: 30
08:59:46:setup_element:INFO: Eye window for uplink 25: _________XXXXXXXX_______________________
Data delay found: 32
08:59:46:setup_element:INFO: Eye window for uplink 26: __________XXXXXXXX______________________
Data delay found: 33
08:59:46:setup_element:INFO: Eye window for uplink 27: ____________XXXXXXXXX___________________
Data delay found: 36
08:59:46:setup_element:INFO: Eye window for uplink 28: ______________XXXXXXXXX_________________
Data delay found: 38
08:59:46:setup_element:INFO: Eye window for uplink 29: ______________XXXXXXXXX_________________
Data delay found: 38
08:59:46:setup_element:INFO: Eye window for uplink 30: ______________XXXXXXXXXXXX______________
Data delay found: 39
08:59:46:setup_element:INFO: Eye window for uplink 31: _____________XXXXXXXXXXX________________
Data delay found: 38
08:59:46:setup_element:INFO: Setting the data phase to 30 for uplink 24
08:59:46:setup_element:INFO: Setting the data phase to 32 for uplink 25
08:59:46:setup_element:INFO: Setting the data phase to 33 for uplink 26
08:59:46:setup_element:INFO: Setting the data phase to 36 for uplink 27
08:59:46:setup_element:INFO: Setting the data phase to 38 for uplink 28
08:59:46:setup_element:INFO: Setting the data phase to 38 for uplink 29
08:59:46:setup_element:INFO: Setting the data phase to 39 for uplink 30
08:59:46:setup_element:INFO: Setting the data phase to 38 for uplink 31
08:59:46:setup_element:INFO: Beginning SMX ASICs map scan
08:59:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:59:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:59:46:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:59:46:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:59:46:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
08:59:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
08:59:47:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
08:59:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
08:59:47:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
08:59:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
08:59:47:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
08:59:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
08:59:48:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
08:59:49:setup_element:INFO: Performing Elink synchronization
08:59:49:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
08:59:49:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
08:59:49:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
08:59:49:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
08:59:49:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
08:59:49:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
08:59:49:febtest:INFO: Init all SMX (CSA): 30
08:59:56:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
08:59:57:febtest:INFO: 30-01 | XA-000-09-004-039-015-006-13 | 40.9 | 1147.8
08:59:57:febtest:INFO: 28-03 | XA-000-09-004-039-012-006-03 | 40.9 | 1153.7
08:59:57:febtest:INFO: 26-05 | XA-000-09-004-039-009-006-08 | 40.9 | 1153.7
08:59:57:febtest:INFO: 24-07 | XA-000-09-004-039-006-006-12 | 31.4 | 1189.2
08:59:58:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:00:00:ST3_smx:INFO: chip: 30-1 40.898880 C 1159.654860 mV
09:00:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:00:ST3_smx:INFO: Electrons
09:00:00:ST3_smx:INFO: # loops 0
09:00:02:ST3_smx:INFO: # loops 1
09:00:03:ST3_smx:INFO: # loops 2
09:00:05:ST3_smx:INFO: Total # of broken channels: 0
09:00:05:ST3_smx:INFO: List of broken channels: []
09:00:05:ST3_smx:INFO: Total # of broken channels: 0
09:00:05:ST3_smx:INFO: List of broken channels: []
09:00:06:ST3_smx:INFO: chip: 28-3 40.898880 C 1165.571835 mV
09:00:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:06:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:06:ST3_smx:INFO: Electrons
09:00:06:ST3_smx:INFO: # loops 0
09:00:08:ST3_smx:INFO: # loops 1
09:00:10:ST3_smx:INFO: # loops 2
09:00:11:ST3_smx:INFO: Total # of broken channels: 0
09:00:11:ST3_smx:INFO: List of broken channels: []
09:00:11:ST3_smx:INFO: Total # of broken channels: 0
09:00:11:ST3_smx:INFO: List of broken channels: []
09:00:13:ST3_smx:INFO: chip: 26-5 44.073563 C 1165.571835 mV
09:00:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:13:ST3_smx:INFO: Electrons
09:00:13:ST3_smx:INFO: # loops 0
09:00:14:ST3_smx:INFO: # loops 1
09:00:16:ST3_smx:INFO: # loops 2
09:00:17:ST3_smx:INFO: Total # of broken channels: 0
09:00:17:ST3_smx:INFO: List of broken channels: []
09:00:17:ST3_smx:INFO: Total # of broken channels: 0
09:00:17:ST3_smx:INFO: List of broken channels: []
09:00:19:ST3_smx:INFO: chip: 24-7 34.556970 C 1206.851500 mV
09:00:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:19:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:00:19:ST3_smx:INFO: Electrons
09:00:19:ST3_smx:INFO: # loops 0
09:00:21:ST3_smx:INFO: # loops 1
09:00:23:ST3_smx:INFO: # loops 2
09:00:25:ST3_smx:INFO: Total # of broken channels: 0
09:00:25:ST3_smx:INFO: List of broken channels: []
09:00:25:ST3_smx:INFO: Total # of broken channels: 0
09:00:25:ST3_smx:INFO: List of broken channels: []
09:00:25:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:00:25:febtest:INFO: 30-01 | XA-000-09-004-039-015-006-13 | 40.9 | 1183.3
09:00:25:febtest:INFO: 28-03 | XA-000-09-004-039-012-006-03 | 44.1 | 1189.2
09:00:25:febtest:INFO: 26-05 | XA-000-09-004-039-009-006-08 | 44.1 | 1183.3
09:00:26:febtest:INFO: 24-07 | XA-000-09-004-039-006-006-12 | 31.4 | 1271.2
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_03_31-08_59_39
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4403| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.8731', '1.849', '1.2280']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0350', '1.850', '1.2980']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0030', '1.850', '0.2683']