FEB_4406 02.04.26 09:39:22
Info
09:39:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:22:ST3_Shared:INFO: FEB-Microcable
09:39:22:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
09:39:22:febtest:INFO: Testing FEB with SN 4406
09:39:23:smx_tester:INFO: Scanning setup
09:39:23:elinks:INFO: Disabling clock on downlink 0
09:39:23:elinks:INFO: Disabling clock on downlink 1
09:39:23:elinks:INFO: Disabling clock on downlink 2
09:39:23:elinks:INFO: Disabling clock on downlink 3
09:39:23:elinks:INFO: Disabling clock on downlink 4
09:39:23:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:39:23:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
09:39:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:39:24:elinks:INFO: Disabling clock on downlink 0
09:39:24:elinks:INFO: Disabling clock on downlink 1
09:39:24:elinks:INFO: Disabling clock on downlink 2
09:39:24:elinks:INFO: Disabling clock on downlink 3
09:39:24:elinks:INFO: Disabling clock on downlink 4
09:39:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:39:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
09:39:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:39:24:elinks:INFO: Disabling clock on downlink 0
09:39:24:elinks:INFO: Disabling clock on downlink 1
09:39:24:elinks:INFO: Disabling clock on downlink 2
09:39:24:elinks:INFO: Disabling clock on downlink 3
09:39:24:elinks:INFO: Disabling clock on downlink 4
09:39:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:39:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:39:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
09:39:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
09:39:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
09:39:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
09:39:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
09:39:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
09:39:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
09:39:24:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
09:39:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:39:24:elinks:INFO: Disabling clock on downlink 0
09:39:24:elinks:INFO: Disabling clock on downlink 1
09:39:24:elinks:INFO: Disabling clock on downlink 2
09:39:24:elinks:INFO: Disabling clock on downlink 3
09:39:24:elinks:INFO: Disabling clock on downlink 4
09:39:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:39:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
09:39:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:39:24:elinks:INFO: Disabling clock on downlink 0
09:39:24:elinks:INFO: Disabling clock on downlink 1
09:39:24:elinks:INFO: Disabling clock on downlink 2
09:39:24:elinks:INFO: Disabling clock on downlink 3
09:39:24:elinks:INFO: Disabling clock on downlink 4
09:39:24:setup_element:INFO: Checking SOS, encoding_mode: SOS
09:39:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
09:39:24:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
09:39:24:setup_element:INFO: Scanning clock phase
09:39:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:39:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:39:24:setup_element:INFO: Clock phase scan results for group 0, downlink 2
09:39:24:setup_element:INFO: Eye window for uplink 24: _________________________________________________________________XXXXXX_________
Clock Delay: 27
09:39:24:setup_element:INFO: Eye window for uplink 25: _________________________________________________________________XXXXXX_________
Clock Delay: 27
09:39:24:setup_element:INFO: Eye window for uplink 26: _________________________________________________________________XXXXXXX________
Clock Delay: 28
09:39:24:setup_element:INFO: Eye window for uplink 27: _________________________________________________________________XXXXXXX________
Clock Delay: 28
09:39:24:setup_element:INFO: Eye window for uplink 28: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:39:24:setup_element:INFO: Eye window for uplink 29: __________________________________________________________________XXXXXXX_______
Clock Delay: 29
09:39:24:setup_element:INFO: Eye window for uplink 30: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:39:24:setup_element:INFO: Eye window for uplink 31: __________________________________________________________________XXXXXX________
Clock Delay: 28
09:39:24:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
09:39:24:setup_element:INFO: Scanning data phases
09:39:24:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:39:24:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:39:29:setup_element:INFO: Data phase scan results for group 0, downlink 2
09:39:29:setup_element:INFO: Eye window for uplink 24: _______XXXXXXXX_________________________
Data delay found: 30
09:39:29:setup_element:INFO: Eye window for uplink 25: _________XXXXXXX________________________
Data delay found: 32
09:39:29:setup_element:INFO: Eye window for uplink 26: _________XXXXXXXX_______________________
Data delay found: 32
09:39:29:setup_element:INFO: Eye window for uplink 27: ___________XXXXXXXXXX___________________
Data delay found: 35
09:39:29:setup_element:INFO: Eye window for uplink 28: _______________XXXXXXXXXX_______________
Data delay found: 39
09:39:29:setup_element:INFO: Eye window for uplink 29: _______________XXXXXXXXX________________
Data delay found: 39
09:39:29:setup_element:INFO: Eye window for uplink 30: __________________XXXXXXXXXX____________
Data delay found: 2
09:39:29:setup_element:INFO: Eye window for uplink 31: _________________XXXXXXXX_______________
Data delay found: 0
09:39:29:setup_element:INFO: Setting the data phase to 30 for uplink 24
09:39:29:setup_element:INFO: Setting the data phase to 32 for uplink 25
09:39:29:setup_element:INFO: Setting the data phase to 32 for uplink 26
09:39:29:setup_element:INFO: Setting the data phase to 35 for uplink 27
09:39:29:setup_element:INFO: Setting the data phase to 39 for uplink 28
09:39:29:setup_element:INFO: Setting the data phase to 39 for uplink 29
09:39:29:setup_element:INFO: Setting the data phase to 2 for uplink 30
09:39:29:setup_element:INFO: Setting the data phase to 0 for uplink 31
09:39:29:setup_element:INFO: Beginning SMX ASICs map scan
09:39:29:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:39:29:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:39:30:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:39:30:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:39:30:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
09:39:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
09:39:30:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
09:39:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
09:39:30:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
09:39:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
09:39:30:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
09:39:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
09:39:31:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
09:39:32:setup_element:INFO: Performing Elink synchronization
09:39:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
09:39:32:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
09:39:32:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
09:39:32:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
09:39:32:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
09:39:32:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
09:39:33:febtest:INFO: Init all SMX (CSA): 30
09:39:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:39:40:febtest:INFO: 30-01 | XA-000-09-004-039-004-007-15 | 28.2 | 1189.2
09:39:40:febtest:INFO: 28-03 | XA-000-09-004-039-004-006-15 | 44.1 | 1141.9
09:39:40:febtest:INFO: 26-05 | XA-000-09-004-039-007-006-01 | 53.6 | 1118.1
09:39:40:febtest:INFO: 24-07 | XA-000-09-004-039-010-006-06 | 47.3 | 1135.9
09:39:41:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
09:39:43:ST3_smx:INFO: chip: 30-1 31.389742 C 1200.969315 mV
09:39:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:43:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:43:ST3_smx:INFO: Electrons
09:39:43:ST3_smx:INFO: # loops 0
09:39:45:ST3_smx:INFO: # loops 1
09:39:46:ST3_smx:INFO: # loops 2
09:39:48:ST3_smx:INFO: Total # of broken channels: 0
09:39:48:ST3_smx:INFO: List of broken channels: []
09:39:48:ST3_smx:INFO: Total # of broken channels: 0
09:39:48:ST3_smx:INFO: List of broken channels: []
09:39:50:ST3_smx:INFO: chip: 28-3 44.073563 C 1153.732915 mV
09:39:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:50:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:50:ST3_smx:INFO: Electrons
09:39:50:ST3_smx:INFO: # loops 0
09:39:51:ST3_smx:INFO: # loops 1
09:39:53:ST3_smx:INFO: # loops 2
09:39:54:ST3_smx:INFO: Total # of broken channels: 0
09:39:54:ST3_smx:INFO: List of broken channels: []
09:39:54:ST3_smx:INFO: Total # of broken channels: 0
09:39:54:ST3_smx:INFO: List of broken channels: []
09:39:56:ST3_smx:INFO: chip: 26-5 50.430383 C 1129.995435 mV
09:39:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:56:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:39:56:ST3_smx:INFO: Electrons
09:39:56:ST3_smx:INFO: # loops 0
09:39:57:ST3_smx:INFO: # loops 1
09:39:59:ST3_smx:INFO: # loops 2
09:40:00:ST3_smx:INFO: Total # of broken channels: 0
09:40:00:ST3_smx:INFO: List of broken channels: []
09:40:00:ST3_smx:INFO: Total # of broken channels: 0
09:40:00:ST3_smx:INFO: List of broken channels: []
09:40:02:ST3_smx:INFO: chip: 24-7 47.250730 C 1147.806000 mV
09:40:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:40:02:ST3_discr_histo:WARNING: Not enough entries for fit!!!
09:40:02:ST3_smx:INFO: Electrons
09:40:02:ST3_smx:INFO: # loops 0
09:40:04:ST3_smx:INFO: # loops 1
09:40:05:ST3_smx:INFO: # loops 2
09:40:07:ST3_smx:INFO: Total # of broken channels: 0
09:40:07:ST3_smx:INFO: List of broken channels: []
09:40:07:ST3_smx:INFO: Total # of broken channels: 0
09:40:07:ST3_smx:INFO: List of broken channels: []
09:40:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
09:40:07:febtest:INFO: 30-01 | XA-000-09-004-039-004-007-15 | 31.4 | 1224.5
09:40:07:febtest:INFO: 28-03 | XA-000-09-004-039-004-006-15 | 44.1 | 1177.4
09:40:08:febtest:INFO: 26-05 | XA-000-09-004-039-007-006-01 | 53.6 | 1147.8
09:40:08:febtest:INFO: 24-07 | XA-000-09-004-039-010-006-06 | 50.4 | 1171.5
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_04_02-09_39_22
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4406| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7345', '1.850', '1.6580']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0100', '1.850', '1.3070']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0050', '1.850', '0.2691']