FEB_4407 14.04.26 11:55:30
Info
11:55:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:55:30:ST3_Shared:INFO: FEB-Microcable
11:55:30:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
11:55:30:febtest:INFO: Testing FEB with SN 4407
11:55:32:smx_tester:INFO: Scanning setup
11:55:32:elinks:INFO: Disabling clock on downlink 0
11:55:32:elinks:INFO: Disabling clock on downlink 1
11:55:32:elinks:INFO: Disabling clock on downlink 2
11:55:32:elinks:INFO: Disabling clock on downlink 3
11:55:32:elinks:INFO: Disabling clock on downlink 4
11:55:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:55:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
11:55:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:55:32:elinks:INFO: Disabling clock on downlink 0
11:55:32:elinks:INFO: Disabling clock on downlink 1
11:55:32:elinks:INFO: Disabling clock on downlink 2
11:55:32:elinks:INFO: Disabling clock on downlink 3
11:55:32:elinks:INFO: Disabling clock on downlink 4
11:55:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:55:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
11:55:32:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:55:32:elinks:INFO: Disabling clock on downlink 0
11:55:32:elinks:INFO: Disabling clock on downlink 1
11:55:32:elinks:INFO: Disabling clock on downlink 2
11:55:32:elinks:INFO: Disabling clock on downlink 3
11:55:32:elinks:INFO: Disabling clock on downlink 4
11:55:32:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:55:32:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
11:55:32:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
11:55:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
11:55:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
11:55:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
11:55:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
11:55:33:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
11:55:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:55:33:elinks:INFO: Disabling clock on downlink 0
11:55:33:elinks:INFO: Disabling clock on downlink 1
11:55:33:elinks:INFO: Disabling clock on downlink 2
11:55:33:elinks:INFO: Disabling clock on downlink 3
11:55:33:elinks:INFO: Disabling clock on downlink 4
11:55:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:55:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
11:55:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:55:33:elinks:INFO: Disabling clock on downlink 0
11:55:33:elinks:INFO: Disabling clock on downlink 1
11:55:33:elinks:INFO: Disabling clock on downlink 2
11:55:33:elinks:INFO: Disabling clock on downlink 3
11:55:33:elinks:INFO: Disabling clock on downlink 4
11:55:33:setup_element:INFO: Checking SOS, encoding_mode: SOS
11:55:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
11:55:33:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
11:55:33:setup_element:INFO: Scanning clock phase
11:55:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:55:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:55:33:setup_element:INFO: Clock phase scan results for group 0, downlink 2
11:55:33:setup_element:INFO: Eye window for uplink 16: XXXXXXX______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
11:55:33:setup_element:INFO: Eye window for uplink 17: XXXXXXX______________________________________________________________XXXXXXXXXXX
Clock Delay: 37
11:55:33:setup_element:INFO: Eye window for uplink 18: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
11:55:33:setup_element:INFO: Eye window for uplink 19: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
11:55:33:setup_element:INFO: Eye window for uplink 20: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
11:55:33:setup_element:INFO: Eye window for uplink 21: XXXX________________________________________________________________XXXXXXXXXXXX
Clock Delay: 35
11:55:33:setup_element:INFO: Eye window for uplink 22: XXXX__________________________________________________________________XXXXXXXXXX
Clock Delay: 36
11:55:33:setup_element:INFO: Eye window for uplink 23: XXXX__________________________________________________________________XXXXXXXXXX
Clock Delay: 36
11:55:33:setup_element:INFO: Eye window for uplink 24: XXXXXXXXX___________________________________________________________XXXXXXXXXXXX
Clock Delay: 38
11:55:33:setup_element:INFO: Eye window for uplink 25: XXXXXXXXX___________________________________________________________XXXXXXXXXXXX
Clock Delay: 38
11:55:33:setup_element:INFO: Eye window for uplink 26: XXXXXXXXX_X__________________________________________________________XXXXXXXXXXX
Clock Delay: 39
11:55:33:setup_element:INFO: Eye window for uplink 27: XXXXXXXXX_X__________________________________________________________XXXXXXXXXXX
Clock Delay: 39
11:55:33:setup_element:INFO: Eye window for uplink 28: XXXXXXX_____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
11:55:33:setup_element:INFO: Eye window for uplink 29: XXXXXXX_____________________________________________________________XXXXXXXXXXXX
Clock Delay: 37
11:55:33:setup_element:INFO: Eye window for uplink 30: XXXXXXXXX_______________________________________________________________________
Clock Delay: 44
11:55:33:setup_element:INFO: Eye window for uplink 31: XXXXXXXXX_______________________________________________________________________
Clock Delay: 44
11:55:33:setup_element:INFO: Setting the clock phase to 39 for group 0, downlink 2
11:55:33:setup_element:INFO: Scanning data phases
11:55:33:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:55:33:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:55:38:setup_element:INFO: Data phase scan results for group 0, downlink 2
11:55:38:setup_element:INFO: Eye window for uplink 16: X__________________________XXXXXXXXXXXXX
Data delay found: 13
11:55:38:setup_element:INFO: Eye window for uplink 17: __________________________XXXXXXXXXXXX__
Data delay found: 11
11:55:38:setup_element:INFO: Eye window for uplink 18: ___________________________XXXXXXXXXXX__
Data delay found: 12
11:55:38:setup_element:INFO: Eye window for uplink 19: __________________________XXXXXXXXXXXX__
Data delay found: 11
11:55:38:setup_element:INFO: Eye window for uplink 20: ____________________________XXXXXXX_____
Data delay found: 11
11:55:38:setup_element:INFO: Eye window for uplink 21: _____________________________XXXXXXXXX__
Data delay found: 13
11:55:38:setup_element:INFO: Eye window for uplink 22: ____________________________XXXXXXXXXXX_
Data delay found: 13
11:55:38:setup_element:INFO: Eye window for uplink 23: __________________________XXXXXXXXXXX___
Data delay found: 11
11:55:38:setup_element:INFO: Eye window for uplink 24: XXXXXXXXXX________________________XXXXXX
Data delay found: 21
11:55:38:setup_element:INFO: Eye window for uplink 25: XXXXXXXXXXX___________________________XX
Data delay found: 24
11:55:38:setup_element:INFO: Eye window for uplink 26: XXXXXXXXXX_____________________________X
Data delay found: 24
11:55:38:setup_element:INFO: Eye window for uplink 27: ___XXXXXXXXXX___________________________
Data delay found: 27
11:55:38:setup_element:INFO: Eye window for uplink 28: ______XXXXXXXXXX________________________
Data delay found: 30
11:55:38:setup_element:INFO: Eye window for uplink 29: ______XXXXXXXXX_________________________
Data delay found: 30
11:55:38:setup_element:INFO: Eye window for uplink 30: XXXXXXXXXXXXXXXXXX__________________XXXX
Data delay found: 26
11:55:38:setup_element:INFO: Eye window for uplink 31: XXXXXXXXXXXXXXX_____________________XXXX
Data delay found: 25
11:55:38:setup_element:INFO: Setting the data phase to 13 for uplink 16
11:55:38:setup_element:INFO: Setting the data phase to 11 for uplink 17
11:55:38:setup_element:INFO: Setting the data phase to 12 for uplink 18
11:55:38:setup_element:INFO: Setting the data phase to 11 for uplink 19
11:55:38:setup_element:INFO: Setting the data phase to 11 for uplink 20
11:55:38:setup_element:INFO: Setting the data phase to 13 for uplink 21
11:55:38:setup_element:INFO: Setting the data phase to 13 for uplink 22
11:55:38:setup_element:INFO: Setting the data phase to 11 for uplink 23
11:55:38:setup_element:INFO: Setting the data phase to 21 for uplink 24
11:55:38:setup_element:INFO: Setting the data phase to 24 for uplink 25
11:55:38:setup_element:INFO: Setting the data phase to 24 for uplink 26
11:55:38:setup_element:INFO: Setting the data phase to 27 for uplink 27
11:55:38:setup_element:INFO: Setting the data phase to 30 for uplink 28
11:55:38:setup_element:INFO: Setting the data phase to 30 for uplink 29
11:55:38:setup_element:INFO: Setting the data phase to 26 for uplink 30
11:55:38:setup_element:INFO: Setting the data phase to 25 for uplink 31
11:55:38:setup_element:INFO: Beginning SMX ASICs map scan
11:55:38:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:55:38:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:55:38:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:55:38:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:55:38:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
11:55:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
11:55:39:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
11:55:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
11:55:39:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
11:55:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
11:55:39:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
11:55:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
11:55:39:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
11:55:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
11:55:39:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
11:55:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
11:55:39:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
11:55:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
11:55:40:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
11:55:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
11:55:40:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
11:55:41:setup_element:INFO: Performing Elink synchronization
11:55:41:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
11:55:41:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
11:55:41:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
11:55:41:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
11:55:41:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
11:55:41:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
11:55:42:febtest:INFO: Init all SMX (CSA): 30
11:56:01:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:56:01:febtest:INFO: 23-00 | XA-000-09-004-039-005-004-02 | 53.6 | 1112.1
11:56:01:febtest:INFO: 30-01 | XA-000-09-004-039-008-003-05 | 47.3 | 1141.9
11:56:01:febtest:INFO: 21-02 | XA-000-09-004-039-008-004-05 | 40.9 | 1153.7
11:56:02:febtest:INFO: 28-03 | XA-000-09-004-039-011-003-11 | 53.6 | 1112.1
11:56:02:febtest:INFO: 19-04 | XA-000-09-004-039-014-004-00 | 47.3 | 1135.9
11:56:02:febtest:INFO: 26-05 | XA-000-09-004-039-014-003-00 | 53.6 | 1118.1
11:56:02:febtest:INFO: 17-06 | XA-000-09-004-039-014-005-00 | 37.7 | 1165.6
11:56:02:febtest:INFO: 24-07 | XA-000-09-004-039-011-002-11 | 53.6 | 1124.0
11:56:03:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
11:56:05:ST3_smx:INFO: chip: 23-0 53.612520 C 1135.937260 mV
11:56:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:05:ST3_smx:INFO: Electrons
11:56:05:ST3_smx:INFO: # loops 0
11:56:08:ST3_smx:INFO: # loops 1
11:56:10:ST3_smx:INFO: # loops 2
11:56:12:ST3_smx:INFO: Total # of broken channels: 0
11:56:12:ST3_smx:INFO: List of broken channels: []
11:56:12:ST3_smx:INFO: Total # of broken channels: 0
11:56:12:ST3_smx:INFO: List of broken channels: []
11:56:13:ST3_smx:INFO: chip: 30-1 47.250730 C 1165.571835 mV
11:56:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:13:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:13:ST3_smx:INFO: Electrons
11:56:13:ST3_smx:INFO: # loops 0
11:56:15:ST3_smx:INFO: # loops 1
11:56:17:ST3_smx:INFO: # loops 2
11:56:19:ST3_smx:INFO: Total # of broken channels: 0
11:56:19:ST3_smx:INFO: List of broken channels: []
11:56:19:ST3_smx:INFO: Total # of broken channels: 0
11:56:19:ST3_smx:INFO: List of broken channels: []
11:56:21:ST3_smx:INFO: chip: 21-2 40.898880 C 1183.292940 mV
11:56:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:21:ST3_smx:INFO: Electrons
11:56:21:ST3_smx:INFO: # loops 0
11:56:23:ST3_smx:INFO: # loops 1
11:56:25:ST3_smx:INFO: # loops 2
11:56:28:ST3_smx:INFO: Total # of broken channels: 0
11:56:28:ST3_smx:INFO: List of broken channels: []
11:56:28:ST3_smx:INFO: Total # of broken channels: 2
11:56:28:ST3_smx:INFO: List of broken channels: [46, 48]
11:56:29:ST3_smx:INFO: chip: 28-3 56.797143 C 1135.937260 mV
11:56:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:29:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:29:ST3_smx:INFO: Electrons
11:56:29:ST3_smx:INFO: # loops 0
11:56:31:ST3_smx:INFO: # loops 1
11:56:33:ST3_smx:INFO: # loops 2
11:56:35:ST3_smx:INFO: Total # of broken channels: 0
11:56:35:ST3_smx:INFO: List of broken channels: []
11:56:35:ST3_smx:INFO: Total # of broken channels: 0
11:56:35:ST3_smx:INFO: List of broken channels: []
11:56:37:ST3_smx:INFO: chip: 19-4 50.430383 C 1153.732915 mV
11:56:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:37:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:37:ST3_smx:INFO: Electrons
11:56:37:ST3_smx:INFO: # loops 0
11:56:39:ST3_smx:INFO: # loops 1
11:56:41:ST3_smx:INFO: # loops 2
11:56:43:ST3_smx:INFO: Total # of broken channels: 0
11:56:43:ST3_smx:INFO: List of broken channels: []
11:56:43:ST3_smx:INFO: Total # of broken channels: 0
11:56:43:ST3_smx:INFO: List of broken channels: []
11:56:45:ST3_smx:INFO: chip: 26-5 56.797143 C 1141.874115 mV
11:56:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:45:ST3_smx:INFO: Electrons
11:56:45:ST3_smx:INFO: # loops 0
11:56:47:ST3_smx:INFO: # loops 1
11:56:49:ST3_smx:INFO: # loops 2
11:56:51:ST3_smx:INFO: Total # of broken channels: 0
11:56:51:ST3_smx:INFO: List of broken channels: []
11:56:51:ST3_smx:INFO: Total # of broken channels: 0
11:56:51:ST3_smx:INFO: List of broken channels: []
11:56:53:ST3_smx:INFO: chip: 17-6 40.898880 C 1177.390875 mV
11:56:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:53:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:56:53:ST3_smx:INFO: Electrons
11:56:53:ST3_smx:INFO: # loops 0
11:56:55:ST3_smx:INFO: # loops 1
11:56:57:ST3_smx:INFO: # loops 2
11:56:59:ST3_smx:INFO: Total # of broken channels: 0
11:56:59:ST3_smx:INFO: List of broken channels: []
11:56:59:ST3_smx:INFO: Total # of broken channels: 0
11:56:59:ST3_smx:INFO: List of broken channels: []
11:57:00:ST3_smx:INFO: chip: 24-7 53.612520 C 1153.732915 mV
11:57:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:57:00:ST3_discr_histo:WARNING: Not enough entries for fit!!!
11:57:00:ST3_smx:INFO: Electrons
11:57:00:ST3_smx:INFO: # loops 0
11:57:02:ST3_smx:INFO: # loops 1
11:57:04:ST3_smx:INFO: # loops 2
11:57:06:ST3_smx:INFO: Total # of broken channels: 0
11:57:06:ST3_smx:INFO: List of broken channels: []
11:57:06:ST3_smx:INFO: Total # of broken channels: 0
11:57:06:ST3_smx:INFO: List of broken channels: []
11:57:07:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
11:57:07:febtest:INFO: 23-00 | XA-000-09-004-039-005-004-02 | 56.8 | 1153.7
11:57:07:febtest:INFO: 30-01 | XA-000-09-004-039-008-003-05 | 50.4 | 1189.2
11:57:07:febtest:INFO: 21-02 | XA-000-09-004-039-008-004-05 | 40.9 | 1247.9
11:57:08:febtest:INFO: 28-03 | XA-000-09-004-039-011-003-11 | 60.0 | 1153.7
11:57:08:febtest:INFO: 19-04 | XA-000-09-004-039-014-004-00 | 50.4 | 1171.5
11:57:08:febtest:INFO: 26-05 | XA-000-09-004-039-014-003-00 | 56.8 | 1159.7
11:57:08:febtest:INFO: 17-06 | XA-000-09-004-039-014-005-00 | 44.1 | 1195.1
11:57:08:febtest:INFO: 24-07 | XA-000-09-004-039-011-002-11 | 53.6 | 1212.7
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 26_04_14-11_55_30
OPERATOR : Alois Alzheimer
SITE : KIT | SETUP : KIT_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 4407| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5810', '1.850', '2.2860']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0400', '1.850', '2.6150']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0080', '1.850', '0.5226']