GSI Object Oriented Online Offline (Go4) GO4-6.4.5
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s_setup.h
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1// $Id$
2//-----------------------------------------------------------------------
3// The GSI Online Offline Object Oriented (Go4) Project
4// Experiment Data Processing at EE department, GSI
5//-----------------------------------------------------------------------
6// Copyright (C) 2000- GSI Helmholtzzentrum fuer Schwerionenforschung GmbH
7// Planckstr. 1, 64291 Darmstadt, Germany
8// Contact: http://go4.gsi.de
9//-----------------------------------------------------------------------
10// This software can be used under the license agreements as stated
11// in Go4License.txt file which is part of the distribution.
12//-----------------------------------------------------------------------
13
14#ifndef S_SETUP_H
15#define S_SETUP_H
16
17#include "typedefs.h"
18
19#include "sbs_def.h"
20
21/*
22 * N. Kurz
23 * global SBS setup parameter structure
24 */
25
26/* After allocating s_setup, set in f_ut_setup_ini */
27/* ps_setup->l_endian = 1; */
28/* ps_setup->l_version = n; */
29/* ps_setup->bl_struc_len = sizeof(s_setup)/4; */
30/* ps_setup->l_fix_lw = ((int)&lp_rem_mem_base[0]-(int)ps_setup)/4; */
31/* ps_setup->bl_sbs__n_cr = SBS__N_CR; */
32/* ps_setup->bl_sbs__n_trg_typ = SBS__N_TRG_TYP; */
33
34/* JAM note that actual setup structure depends on architecture of client machine
35 * ADDRS can be 4 or 8 byte. So we need auxiliary structures to receive
36 * setup from any architecture */
37
38typedef struct
39{
40/*---------------------------------------------------------------------------*/
41INTU4 l_endian; /* set to 1 */
42INTU4 l_version; /* increment in f_ut_setup_ini after changes */
43INTU4 bl_struc_len; /* sizeof(s_setup)/4 : length of this structure */
44INTU4 l_fix_lw; /* (&lp_rem_mem_base-ps_setup)/4 : swapping size */
45INTU4 bl_sbs__n_cr; /* set to SBS__N_CR */
46INTU4 bl_sbs__n_trg_typ; /* set to SBS__N_TRG_TYP */
47/*---------------------------------------------------------------------------*/
48INTU4 bi_master; /* indicates type of master event builder */
49 /* meb: 1 = CVC, 2 = E6, 3 = E7 */
50INTU4 bl_no_crates; /* Number of crates to read (bh_rd_flg > 0) */
51INTU4 bh_crate_nr; /* crate nr. of readout processor: meb = 0, slave = 1-15 */
52 /* this value will be set by the load setup command and */
53 /* is not parsed from the .usf file */
54/*---------------------------------------------------------------------------*/
55INTU4 bl_ev_buf_len; /* length of single event buffer */
56INTU4 bl_n_ev_buf; /* number of event buffers in a stream */
57INTU4 bl_n_stream; /* number of streams */
58/*---------------------------------------------------------------------------*/
59INTU4 bi_evt_typ_sy; /* event type of synchronous events, default = 10 */
60INTU4 bi_evt_typ_asy; /* event type of asynchronous events, default = 10 */
61INTU4 bi_evt_subtyp_sy; /* event subtype of synchronous events, default = 1 */
62INTU4 bi_evt_subtyp_asy; /* event subtype of asynchronous events, default = 2 */
63INTS4 h_se_control; /* serves as branch identifier in a multi-branch system */
64/*---------------------------------------------------------------------------*/
65INTU4 bh_rd_typ; /* 0 = standard readout with readout tables */
66 /* 1 = user readout (function) */
67 /* if the following bh_meb_asy_flg is set to 1 there will be a second */
68 /* async. subevent pipe installed, which will be collected by the meb */
69 /* collector, but must be filled by a seperate process */
70INTU4 bh_col_mode; /* indicates mode of this MEB collector or master readout:*/
71 /* 0 = standard, the collector formats events and passes */
72 /* the formatted event buffer streams to the */
73 /* transport */
74 /* 1 = collector collects subevents from the various */
75 /* SBS pipes, but no event formatting will be done. */
76 /* instead the collected subevents are written into a */
77 /* output pipe for the next layer node of the */
78 /* multi-branch multi-layer daq system. this mode */
79 /* requires bl_ml_pipe_base_addr, bl_ml_pipe_seg_len */
80 /* and bl_ml_pipe_len to be specified (see below). */
81 /* 2 = only m_read_meb and no collector runs on the */
82 /* SBS master (MEB). Its subevent pipe will be read */
83 /* by a node of the multi-branch multi-layer daq */
84 /* system. in this case the mb ml node gets the pipe */
85 /* specs from bl_pipe_seg_len and bl_pipe_len */
86 /* (see above). */
87 /* 3 = includes both 0 and 1 mode. */
88/*---------------------------------------------------------------------------*/
89ADDRS bl_loc_esone_base; /* base address to execute CAMAC cnafs via the ESONE */
90 /* window on the local crate JAM64*/
91ADDRS bl_rem_esone_base; /* base address to execute CAMAC cnafs via the ESONE */
92 /* window on the remote crate JAM64*/
93INTU4 bl_esone_off; /* offset from standard to ESONE window in bytes */
94INTU4 bl_cvc_crr_off; /* offset from to the CVC CAMAC Read Register */
95INTU4 bl_cvc_csr_off; /* offset to the CVC Control and Status Register */
96INTU4 bl_cvc_clb_off; /* offset to the CVC CAMAC Lam Buffer */
97INTU4 bl_se_meb_asy_len; /* length of the async. pipe of the master, including */
98 /* control and data */
99INTU4 bh_meb_asy_flg; /* indicates if meb must collect must an async. pipe */
100 /* residing on the meb: 0 = no, 1 = yes */
101
102ADDRS bl_ml_pipe_base_addr;/* base address of the multi-branch multi-layer daq JAM64 */
103 /* system output pipe. */
104 /* only requested ig bh_col_mode = 1,2 */
105
106ADDRS bl_ml_pipe_seg_len; /* length of the multi-branch multi-layer daq system JAM64 */
107 /* output pipe. (total lengt of subevent pipe) */
108 /* only requested ig bh_col_mode = 1,2 */
109
110INTU4 bl_ml_pipe_len; /* number of subevent/fragment slots in the multi-branch */
111 /* multi-layer daq system output pipe */
112 /* only requested ig bh_col_mode = 1,2 */
113INTU4 bl_n_col_retry; /* number of retries the subevent collect process makes */
114 /* until giving up time slice */
115/*---------------------------------------------------------------------------*/
116INTU4 bh_meb_trig_mode; /* if this is set to NON zero a special mode is requested */
117 /* for the trigger module serving m_read_meb. */
118 /* this could be: */
119 /* NOT irq (LAM, VME irq) */
120 /* or NOT standard base address (VME) */
121 /* or NOT local crate */
122 /* if bh_meb_trig_mode is NOT 0 always the following two */
123 /* setup parameters will be taken for type and base addr. */
124 /* */
125 /* NOTE: the fast clear and conversion time will be taken */
126 /* from bl_trig_fct[0] and bl_trig_cvt[0] from this */
127 /* setup structure */
128 /* */
129 /* 0 = standard = local interrupt (CAMAC LAM, VME IRQ) */
130 /* 1 = special: local interrupt (CAMAC LAM, VME IRQ) */
131 /* 2 = special: remote VSB interrupt (not yet impleme) */
132 /* 3 = special: polling */
133INTU4 bh_special_meb_trig_type;
134 /* 1 = CAMAC type trigger module */
135 /* 2 = VME type trigger module */
136 /* 3 = FASTBUS type triggermodule */
137
138ADDRS bl_special_meb_trig_base;
139 /* base address of trigger module acting together with */
140 /* m_read_meb if bh_meb_trig_mode != 0 */
141 /* NOTE: if trigger module is remote the complete (VSB) */
142 /* base address must be specified. example: */
143 /* f0580000 for a CAMAC trigger module in crate 2 */
144 /* serving m_read_meb running on an E7 in a VME */
145 /* crate. (see sketch at end of this file)
146 * JAM64 changed type to ADDRS*/
147
148
149/*---------------------------------------------------------------------------*/
150INTU4 lp_cvc_irq; /* start address of the CVC irq physical segment */
151INTU4 bl_cvc_irq_len; /* length of CVC irq phys. segment */
152INTU4 bl_cvc_irq_source_off;/* offset from lp_cvc_irq to the CVC irq source register */
153INTU4 bl_cvc_irq_mask_off; /* offset from lp_cvc_irq to the CVC irq mask register */
154/*---------------------------------------------------------------------------*/
155/* all values in this section will be initalized by a loader task */
156INTS4 h_rd_tab_flg; /* -1 = init and readout tables invalid (this is set by */
157 /* the write_sbs_setup task */
158 /* 0 = init and readout tables have to be modified to */
159 /* virtual cnafs */
160 /* 1 = this modification is done and must not be done */
161 /* before a new table was loaded */
162INTU4 bl_init_read_len; /* total length of init and readout CAMAC cnaf list for */
163 /* all crates and trigger types (in bytes) */
164/* ------------------ end of fixed block --------------------------*/
165/*---------------------------------------------------------------------------*/
166
167
168ADDRS lp_rem_mem_base[SBS__N_CR];
169 /* physical base address for accessing slave crate memory */
170 /* seen from the MEB (pipes). This could be the VSB */
171 /* base address for accessing remote crates */
172ADDRS bl_rem_mem_off[SBS__N_CR];
173 /* offset from lp_rem_mem_base[SBS__N_CR] to the memory */
174 /* space of the remote slaves (seen from MEB) */
175ADDRS bl_rem_mem_len[SBS__N_CR];
176 /* lenght of the memory address window with the physical */
177 /* base adress lp_rem_mem_base[SBS__N_CR] */
178
179
180/*---------------------------------------------------------------------------*/
181ADDRS lp_rem_cam_base[SBS__N_CR];
182 /* physical base address for accessing slave directly via CAMAC JAM64: replaced INTU4 */
183ADDRS bl_rem_cam_off[SBS__N_CR];
184 /* offset from lp_rem_cam_base[SBS__N_CR] to the remote */
185 /* CAMAC space of the slaves (seen from MEB). JAM64: replaced INTU4 */
186INTU4 bl_rem_cam_len[SBS__N_CR];
187 /* lenght of the CAMAC address window with the physical */
188/*---------------------------------------------------------------------------*/
189ADDRS lp_loc_mem_base[SBS__N_CR];
190 /* base address for accessing local crate. (could be for */
191 /* example local CAMAC base or extended VME base.) JAM64: replaced INTU4 */
192ADDRS bl_loc_mem_len[SBS__N_CR];
193 /* length of physical segment for accessing local crate */
194 /* starting from lp_loc_mem_base[SBS__N_CR]. JAM64: replaced INTU4 */
195/*---------------------------------------------------------------------------*/
196INTU4 l_loc_pipe_type[SBS__N_CR];
197 /* type of subevent pipe: 0: with smem_create */
198 /* 1: direct mapping */
199ADDRS lp_loc_pipe_base[SBS__N_CR];
200 /* RAM start address of the crate controller (used for */
201 /* location of subevent pipe) JAM64: replaced INTU4 */
202ADDRS bl_pipe_off[SBS__N_CR];
203 /* offset from lp_ram_loc_start to start of the remote */
204 /* communication segment slave <-> master seen from the */
205 /* slave in bytes = start of subevent pipe JAM64: replaced INTU4 */
206ADDRS bl_pipe_seg_len[SBS__N_CR];
207 /* length of the remote communication segment in bytes */
208 /* = total lengt of subevent pipe JAM64: replaced INTU4 */
209INTU4 bl_pipe_len[SBS__N_CR]; /* number of subevent slots in a pipe */
210INTU4 bh_controller_id[SBS__N_CR];
211 /* bh_controller_id MUST be set for ESONE CNAF execution */
212 /* 1 = CVC, 2 = E6, 3 = E7, 4 = AEB, 5 = CBV, 6 = CVI */
213 /* 7 = CAV (Q and X inverted) */
214INTU4 bh_sy_asy_flg[SBS__N_CR];
215 /* indicates if this crate must be readout synchronous */
216 /* or asynchronous: 0 = synchronous, 1 = asynchronous */
217 /* this flag is only valid for crates with intelligent */
218 /* controller. At this point it is decided wether a crate */
219 /* is readout sync. or async. */
220INTU4 bh_trig_stat_nr[SBS__N_CR];/* CAMAC station nr. of the trigger module, must be 1 */
221INTU4 bl_trig_cvt[SBS__N_CR]; /* conversion time of trigger module */
222INTU4 bl_trig_fct[SBS__N_CR]; /* fast clear acceptance time of trigger module */
223INTS4 i_se_typ[SBS__N_CR]; /* subevent typ, default = 10 */
224INTS4 i_se_subtyp[SBS__N_CR]; /* subevent subtyp: CAMAC = 1, FASTBUS = 2 */
225INTS4 i_se_procid[SBS__N_CR]; /* subevent processor id */
226/*---------------------------------------------------------------------------*/
227INTU4 bh_rd_flg[SBS__N_CR];
228 /* 0 = crate not readout */
229 /* 1 = crate read out by meb */
230 /* 2 = crate readout by intelligent crate controller */
231INTU4 bl_init_tab_off[SBS__N_CR];
232 /* offset from start of readout table segment to the */
233 /* start of the init table as a function of crate number */
234 /* (in longwords) */
235INTU4 bi_init_tab_len[SBS__N_CR];
236 /* lenght of the init tables. if one of this values is 0 */
237 /* it means that this crate must not be not initalized */
238 /* (in longwords) */
239INTU4 bl_max_se_len[SBS__N_CR][SBS__N_TRG_TYP];
240 /* maximal subevent length [b] of this crate and trigger */
241INTU4 bl_rd_tab_off[SBS__N_CR][SBS__N_TRG_TYP];
242 /* offset from start of readout table segment to the */
243 /* start of the readout tables as a function of crate */
244 /* number and trigger type (in longwords) */
245INTU4 bi_rd_tab_len[SBS__N_CR][SBS__N_TRG_TYP];
246 /* lenght of the readout tables. if one of this values */
247 /* is 0 it means that this crate for this trigger type is */
248 /* not read out (in longwords) */
249/*---------------------------------------------------------------------------*/
250} s_setup;
251
252
253/* JAM this is a helper structure to receive a setup structure originated by
254 * a 32 bit architecture mbs node. All addresses are 4 byte, as in old MBS*/
255
256typedef struct
257{
258/*---------------------------------------------------------------------------*/
259INTU4 l_endian; /* set to 1 */
260INTU4 l_version; /* increment in f_ut_setup_ini after changes */
261INTU4 bl_struc_len; /* sizeof(s_setup)/4 : length of this structure */
262INTU4 l_fix_lw; /* (&lp_rem_mem_base-ps_setup)/4 : swapping size */
263INTU4 bl_sbs__n_cr; /* set to SBS__N_CR */
264INTU4 bl_sbs__n_trg_typ; /* set to SBS__N_TRG_TYP */
265/*---------------------------------------------------------------------------*/
266INTU4 bi_master; /* indicates type of master event builder */
267 /* meb: 1 = CVC, 2 = E6, 3 = E7 */
268INTU4 bl_no_crates; /* Number of crates to read (bh_rd_flg > 0) */
269INTU4 bh_crate_nr; /* crate nr. of readout processor: meb = 0, slave = 1-15 */
270 /* this value will be set by the load setup command and */
271 /* is not parsed from the .usf file */
272/*---------------------------------------------------------------------------*/
273INTU4 bl_ev_buf_len; /* length of single event buffer */
274INTU4 bl_n_ev_buf; /* number of event buffers in a stream */
275INTU4 bl_n_stream; /* number of streams */
276/*---------------------------------------------------------------------------*/
277INTU4 bi_evt_typ_sy; /* event type of synchronous events, default = 10 */
278INTU4 bi_evt_typ_asy; /* event type of asynchronous events, default = 10 */
279INTU4 bi_evt_subtyp_sy; /* event subtype of synchronous events, default = 1 */
280INTU4 bi_evt_subtyp_asy; /* event subtype of asynchronous events, default = 2 */
281INTS4 h_se_control; /* serves as branch identifier in a multi-branch system */
282/*---------------------------------------------------------------------------*/
283INTU4 bh_rd_typ; /* 0 = standard readout with readout tables */
284 /* 1 = user readout (function) */
285 /* if the following bh_meb_asy_flg is set to 1 there will be a second */
286 /* async. subevent pipe installed, which will be collected by the meb */
287 /* collector, but must be filled by a seperate process */
288INTU4 bh_col_mode; /* indicates mode of this MEB collector or master readout:*/
289 /* 0 = standard, the collector formats events and passes */
290 /* the formatted event buffer streams to the */
291 /* transport */
292 /* 1 = collector collects subevents from the various */
293 /* SBS pipes, but no event formatting will be done. */
294 /* instead the collected subevents are written into a */
295 /* output pipe for the next layer node of the */
296 /* multi-branch multi-layer daq system. this mode */
297 /* requires bl_ml_pipe_base_addr, bl_ml_pipe_seg_len */
298 /* and bl_ml_pipe_len to be specified (see below). */
299 /* 2 = only m_read_meb and no collector runs on the */
300 /* SBS master (MEB). Its subevent pipe will be read */
301 /* by a node of the multi-branch multi-layer daq */
302 /* system. in this case the mb ml node gets the pipe */
303 /* specs from bl_pipe_seg_len and bl_pipe_len */
304 /* (see above). */
305 /* 3 = includes both 0 and 1 mode. */
306/*---------------------------------------------------------------------------*/
307INTU4 bl_loc_esone_base; /* base address to execute CAMAC cnafs via the ESONE */
308 /* window on the local crate*/
309INTU4 bl_rem_esone_base; /* base address to execute CAMAC cnafs via the ESONE */
310 /* window on the remote crate*/
311INTU4 bl_esone_off; /* offset from standard to ESONE window in bytes */
312INTU4 bl_cvc_crr_off; /* offset from to the CVC CAMAC Read Register */
313INTU4 bl_cvc_csr_off; /* offset to the CVC Control and Status Register */
314INTU4 bl_cvc_clb_off; /* offset to the CVC CAMAC Lam Buffer */
315INTU4 bl_se_meb_asy_len; /* length of the async. pipe of the master, including */
316 /* control and data */
317INTU4 bh_meb_asy_flg; /* indicates if meb must collect must an async. pipe */
318 /* residing on the meb: 0 = no, 1 = yes */
319INTU4 bl_ml_pipe_base_addr;/* base address of the multi-branch multi-layer daq */
320 /* system output pipe. */
321 /* only requested ig bh_col_mode = 1,2 */
322INTU4 bl_ml_pipe_seg_len; /* length of the multi-branch multi-layer daq system */
323 /* output pipe. (total lengt of subevent pipe) */
324 /* only requested ig bh_col_mode = 1,2 */
325INTU4 bl_ml_pipe_len; /* number of subevent/fragment slots in the multi-branch */
326 /* multi-layer daq system output pipe */
327 /* only requested ig bh_col_mode = 1,2 */
328INTU4 bl_n_col_retry; /* number of retries the subevent collect process makes */
329 /* until giving up time slice */
330/*---------------------------------------------------------------------------*/
331INTU4 bh_meb_trig_mode; /* if this is set to NON zero a special mode is requested */
332 /* for the trigger module serving m_read_meb. */
333 /* this could be: */
334 /* NOT irq (LAM, VME irq) */
335 /* or NOT standard base address (VME) */
336 /* or NOT local crate */
337 /* if bh_meb_trig_mode is NOT 0 always the following two */
338 /* setup parameters will be taken for type and base addr. */
339 /* */
340 /* NOTE: the fast clear and conversion time will be taken */
341 /* from bl_trig_fct[0] and bl_trig_cvt[0] from this */
342 /* setup structure */
343 /* */
344 /* 0 = standard = local interrupt (CAMAC LAM, VME IRQ) */
345 /* 1 = special: local interrupt (CAMAC LAM, VME IRQ) */
346 /* 2 = special: remote VSB interrupt (not yet impleme) */
347 /* 3 = special: polling */
348INTU4 bh_special_meb_trig_type;
349 /* 1 = CAMAC type trigger module */
350 /* 2 = VME type trigger module */
351 /* 3 = FASTBUS type triggermodule */
352INTU4 bl_special_meb_trig_base;
353 /* base address of trigger module acting together with */
354 /* m_read_meb if bh_meb_trig_mode != 0 */
355 /* NOTE: if trigger module is remote the complete (VSB) */
356 /* base address must be specified. example: */
357 /* f0580000 for a CAMAC trigger module in crate 2 */
358 /* serving m_read_meb running on an E7 in a VME */
359 /* crate. (see sketch at end of this file) */
360/*---------------------------------------------------------------------------*/
361INTU4 lp_cvc_irq; /* start address of the CVC irq physical segment */
362INTU4 bl_cvc_irq_len; /* length of CVC irq phys. segment */
363INTU4 bl_cvc_irq_source_off;/* offset from lp_cvc_irq to the CVC irq source register */
364INTU4 bl_cvc_irq_mask_off; /* offset from lp_cvc_irq to the CVC irq mask register */
365/*---------------------------------------------------------------------------*/
366/* all values in this section will be initalized by a loader task */
367INTS4 h_rd_tab_flg; /* -1 = init and readout tables invalid (this is set by */
368 /* the write_sbs_setup task */
369 /* 0 = init and readout tables have to be modified to */
370 /* virtual cnafs */
371 /* 1 = this modification is done and must not be done */
372 /* before a new table was loaded */
373INTU4 bl_init_read_len; /* total length of init and readout CAMAC cnaf list for */
374 /* all crates and trigger types (in bytes) */
375/* ------------------ end of fixed block --------------------------*/
376/*---------------------------------------------------------------------------*/
377INTU4 lp_rem_mem_base[SBS__N_CR];
378 /* physical base address for accessing slave crate memory */
379 /* seen from the MEB (pipes). This could be the VSB */
380 /* base address for accessing remote crates */
381INTU4 bl_rem_mem_off[SBS__N_CR];
382 /* offset from lp_rem_mem_base[SBS__N_CR] to the memory */
383 /* space of the remote slaves (seen from MEB) */
384INTU4 bl_rem_mem_len[SBS__N_CR];
385 /* lenght of the memory address window with the physical */
386 /* base adress lp_rem_mem_base[SBS__N_CR] */
387/*---------------------------------------------------------------------------*/
388INTU4 lp_rem_cam_base[SBS__N_CR];
389 /* physical base address for accessing slave directly via CAMAC */
390INTU4 bl_rem_cam_off[SBS__N_CR];
391 /* offset from lp_rem_cam_base[SBS__N_CR] to the remote */
392 /* CAMAC space of the slaves (seen from MEB). */
393INTU4 bl_rem_cam_len[SBS__N_CR];
394 /* lenght of the CAMAC address window with the physical */
395/*---------------------------------------------------------------------------*/
396INTU4 lp_loc_mem_base[SBS__N_CR];
397 /* base address for accessing local crate. (could be for */
398 /* example local CAMAC base or extended VME base.) */
399INTU4 bl_loc_mem_len[SBS__N_CR];
400 /* length of physical segment for accessing local crate */
401 /* starting from lp_loc_mem_base[SBS__N_CR]. */
402/*---------------------------------------------------------------------------*/
403INTU4 l_loc_pipe_type[SBS__N_CR];
404 /* type of subevent pipe: 0: with smem_create */
405 /* 1: direct mapping */
406INTU4 lp_loc_pipe_base[SBS__N_CR];
407 /* RAM start address of the crate controller (used for */
408 /* location of subevent pipe) */
409INTU4 bl_pipe_off[SBS__N_CR];
410 /* offset from lp_ram_loc_start to start of the remote */
411 /* communication segment slave <-> master seen from the */
412 /* slave in bytes = start of subevent pipe */
413INTU4 bl_pipe_seg_len[SBS__N_CR];
414 /* length of the remote communication segment in bytes */
415 /* = total lengt of subevent pipe */
416INTU4 bl_pipe_len[SBS__N_CR]; /* number of subevent slots in a pipe */
417INTU4 bh_controller_id[SBS__N_CR];
418 /* bh_controller_id MUST be set for ESONE CNAF execution */
419 /* 1 = CVC, 2 = E6, 3 = E7, 4 = AEB, 5 = CBV, 6 = CVI */
420 /* 7 = CAV (Q and X inverted) */
421INTU4 bh_sy_asy_flg[SBS__N_CR];
422 /* indicates if this crate must be readout synchronous */
423 /* or asynchronous: 0 = synchronous, 1 = asynchronous */
424 /* this flag is only valid for crates with intelligent */
425 /* controller. At this point it is decided wether a crate */
426 /* is readout sync. or async. */
427INTU4 bh_trig_stat_nr[SBS__N_CR];/* CAMAC station nr. of the trigger module, must be 1 */
428INTU4 bl_trig_cvt[SBS__N_CR]; /* conversion time of trigger module */
429INTU4 bl_trig_fct[SBS__N_CR]; /* fast clear acceptance time of trigger module */
430INTS4 i_se_typ[SBS__N_CR]; /* subevent typ, default = 10 */
431INTS4 i_se_subtyp[SBS__N_CR]; /* subevent subtyp: CAMAC = 1, FASTBUS = 2 */
432INTS4 i_se_procid[SBS__N_CR]; /* subevent processor id */
433/*---------------------------------------------------------------------------*/
434INTU4 bh_rd_flg[SBS__N_CR];
435 /* 0 = crate not readout */
436 /* 1 = crate read out by meb */
437 /* 2 = crate readout by intelligent crate controller */
438INTU4 bl_init_tab_off[SBS__N_CR];
439 /* offset from start of readout table segment to the */
440 /* start of the init table as a function of crate number */
441 /* (in longwords) */
442INTU4 bi_init_tab_len[SBS__N_CR];
443 /* lenght of the init tables. if one of this values is 0 */
444 /* it means that this crate must not be not initalized */
445 /* (in longwords) */
446INTU4 bl_max_se_len[SBS__N_CR][SBS__N_TRG_TYP];
447 /* maximal subevent length [b] of this crate and trigger */
448INTU4 bl_rd_tab_off[SBS__N_CR][SBS__N_TRG_TYP];
449 /* offset from start of readout table segment to the */
450 /* start of the readout tables as a function of crate */
451 /* number and trigger type (in longwords) */
452INTU4 bi_rd_tab_len[SBS__N_CR][SBS__N_TRG_TYP];
453 /* lenght of the readout tables. if one of this values */
454 /* is 0 it means that this crate for this trigger type is */
455 /* not read out (in longwords) */
456/*---------------------------------------------------------------------------*/
457} s_setup_32_receiver;
458
459
460/* JAM this is a helper structure to receive a setup structure originated by
461 * a 64 bit architecture mbs node. All addresses are long long*/
462typedef struct
463{
464/*---------------------------------------------------------------------------*/
465INTU4 l_endian; /* set to 1 */
466INTU4 l_version; /* increment in f_ut_setup_ini after changes */
467INTU4 bl_struc_len; /* sizeof(s_setup)/4 : length of this structure */
468INTU4 l_fix_lw; /* (&lp_rem_mem_base-ps_setup)/4 : swapping size */
469INTU4 bl_sbs__n_cr; /* set to SBS__N_CR */
470INTU4 bl_sbs__n_trg_typ; /* set to SBS__N_TRG_TYP */
471/*---------------------------------------------------------------------------*/
472INTU4 bi_master; /* indicates type of master event builder */
473 /* meb: 1 = CVC, 2 = E6, 3 = E7 */
474INTU4 bl_no_crates; /* Number of crates to read (bh_rd_flg > 0) */
475INTU4 bh_crate_nr; /* crate nr. of readout processor: meb = 0, slave = 1-15 */
476 /* this value will be set by the load setup command and */
477 /* is not parsed from the .usf file */
478/*---------------------------------------------------------------------------*/
479INTU4 bl_ev_buf_len; /* length of single event buffer */
480INTU4 bl_n_ev_buf; /* number of event buffers in a stream */
481INTU4 bl_n_stream; /* number of streams */
482/*---------------------------------------------------------------------------*/
483INTU4 bi_evt_typ_sy; /* event type of synchronous events, default = 10 */
484INTU4 bi_evt_typ_asy; /* event type of asynchronous events, default = 10 */
485INTU4 bi_evt_subtyp_sy; /* event subtype of synchronous events, default = 1 */
486INTU4 bi_evt_subtyp_asy; /* event subtype of asynchronous events, default = 2 */
487INTS4 h_se_control; /* serves as branch identifier in a multi-branch system */
488/*---------------------------------------------------------------------------*/
489INTU4 bh_rd_typ; /* 0 = standard readout with readout tables */
490 /* 1 = user readout (function) */
491 /* if the following bh_meb_asy_flg is set to 1 there will be a second */
492 /* async. subevent pipe installed, which will be collected by the meb */
493 /* collector, but must be filled by a seperate process */
494INTU4 bh_col_mode; /* indicates mode of this MEB collector or master readout:*/
495 /* 0 = standard, the collector formats events and passes */
496 /* the formatted event buffer streams to the */
497 /* transport */
498 /* 1 = collector collects subevents from the various */
499 /* SBS pipes, but no event formatting will be done. */
500 /* instead the collected subevents are written into a */
501 /* output pipe for the next layer node of the */
502 /* multi-branch multi-layer daq system. this mode */
503 /* requires bl_ml_pipe_base_addr, bl_ml_pipe_seg_len */
504 /* and bl_ml_pipe_len to be specified (see below). */
505 /* 2 = only m_read_meb and no collector runs on the */
506 /* SBS master (MEB). Its subevent pipe will be read */
507 /* by a node of the multi-branch multi-layer daq */
508 /* system. in this case the mb ml node gets the pipe */
509 /* specs from bl_pipe_seg_len and bl_pipe_len */
510 /* (see above). */
511 /* 3 = includes both 0 and 1 mode. */
512/*---------------------------------------------------------------------------*/
513ADDR64 bl_loc_esone_base; /* base address to execute CAMAC cnafs via the ESONE */
514 /* window on the local crate JAM64*/
515ADDR64 bl_rem_esone_base; /* base address to execute CAMAC cnafs via the ESONE */
516 /* window on the remote crate JAM64*/
517INTU4 bl_esone_off; /* offset from standard to ESONE window in bytes */
518INTU4 bl_cvc_crr_off; /* offset from to the CVC CAMAC Read Register */
519INTU4 bl_cvc_csr_off; /* offset to the CVC Control and Status Register */
520INTU4 bl_cvc_clb_off; /* offset to the CVC CAMAC Lam Buffer */
521INTU4 bl_se_meb_asy_len; /* length of the async. pipe of the master, including */
522 /* control and data */
523INTU4 bh_meb_asy_flg; /* indicates if meb must collect must an async. pipe */
524 /* residing on the meb: 0 = no, 1 = yes */
525
526ADDR64 bl_ml_pipe_base_addr;/* base address of the multi-branch multi-layer daq JAM64 */
527 /* system output pipe. */
528 /* only requested ig bh_col_mode = 1,2 */
529
530ADDR64 bl_ml_pipe_seg_len; /* length of the multi-branch multi-layer daq system JAM64 */
531 /* output pipe. (total lengt of subevent pipe) */
532 /* only requested ig bh_col_mode = 1,2 */
533
534INTU4 bl_ml_pipe_len; /* number of subevent/fragment slots in the multi-branch */
535 /* multi-layer daq system output pipe */
536 /* only requested ig bh_col_mode = 1,2 */
537INTU4 bl_n_col_retry; /* number of retries the subevent collect process makes */
538 /* until giving up time slice */
539/*---------------------------------------------------------------------------*/
540INTU4 bh_meb_trig_mode; /* if this is set to NON zero a special mode is requested */
541 /* for the trigger module serving m_read_meb. */
542 /* this could be: */
543 /* NOT irq (LAM, VME irq) */
544 /* or NOT standard base address (VME) */
545 /* or NOT local crate */
546 /* if bh_meb_trig_mode is NOT 0 always the following two */
547 /* setup parameters will be taken for type and base addr. */
548 /* */
549 /* NOTE: the fast clear and conversion time will be taken */
550 /* from bl_trig_fct[0] and bl_trig_cvt[0] from this */
551 /* setup structure */
552 /* */
553 /* 0 = standard = local interrupt (CAMAC LAM, VME IRQ) */
554 /* 1 = special: local interrupt (CAMAC LAM, VME IRQ) */
555 /* 2 = special: remote VSB interrupt (not yet impleme) */
556 /* 3 = special: polling */
557INTU4 bh_special_meb_trig_type;
558 /* 1 = CAMAC type trigger module */
559 /* 2 = VME type trigger module */
560 /* 3 = FASTBUS type triggermodule */
561
562ADDR64 bl_special_meb_trig_base;
563 /* base address of trigger module acting together with */
564 /* m_read_meb if bh_meb_trig_mode != 0 */
565 /* NOTE: if trigger module is remote the complete (VSB) */
566 /* base address must be specified. example: */
567 /* f0580000 for a CAMAC trigger module in crate 2 */
568 /* serving m_read_meb running on an E7 in a VME */
569 /* crate. (see sketch at end of this file)
570 * JAM64 changed type to ADDRS*/
571
572
573/*---------------------------------------------------------------------------*/
574INTU4 lp_cvc_irq; /* start address of the CVC irq physical segment */
575INTU4 bl_cvc_irq_len; /* length of CVC irq phys. segment */
576INTU4 bl_cvc_irq_source_off;/* offset from lp_cvc_irq to the CVC irq source register */
577INTU4 bl_cvc_irq_mask_off; /* offset from lp_cvc_irq to the CVC irq mask register */
578/*---------------------------------------------------------------------------*/
579/* all values in this section will be initalized by a loader task */
580INTS4 h_rd_tab_flg; /* -1 = init and readout tables invalid (this is set by */
581 /* the write_sbs_setup task */
582 /* 0 = init and readout tables have to be modified to */
583 /* virtual cnafs */
584 /* 1 = this modification is done and must not be done */
585 /* before a new table was loaded */
586INTU4 bl_init_read_len; /* total length of init and readout CAMAC cnaf list for */
587 /* all crates and trigger types (in bytes) */
588/* ------------------ end of fixed block --------------------------*/
589
590} s_setup_64_receiver;
591
592
593
594
595
596
597/*
598* address offset for memory access from the master event builder to the slave
599* CVC's via VSB. these offsets point to the memory address 0x100000 seen
600* from the slave CVC, which is the beginning of the RAM of the CVC. only
601* longword access possible, the following offsets are given in bytes.
602*
603* in the case of accessing non local crates by CAMAC cnaf's via VSB, the
604* shown address offset (CAM_CRT_OFF) between two consecutive crates is
605* automatically included by crate number contained in the cnaf. the effective
606* physical offset to the cnafs is 0x08180000
607*/
608/*----------------------------------------------------------------------------!
609! VSB and CAMAC memory on the CVC slaves, seen from the MEB CVC !
610! !
611! !
612! 0x8000000 0x8200000 0x8400000 !
613! | | | !
614! | | | !
615! | VSB_CRT_OFF | VSB_CRT_OFF | !
616! V S B |===================|===================|===... !
617! | 0x200000 | 0x200000 | !
618! | | | !
619! | crate|1 crate|2 !
620! | | | !
621! VSB_CAM_START | (VSB_OFF = 0x0) !
622!==============>| !
623! 0x8000000 | | | !
624! | crate|1 crate|2 !
625! | | | !
626! | CAM_OFF | CAM_CRT_OFF | CAM_CRT_OFF | !
627! C A M A C |================|===================|===================|==..!
628! | 0x180000 | 0x200000 | 0x200000 | !
629! | | | | !
630! | | | | !
631! 0x8000000 0x8180000 0x8380000 0x8580000 !
632!----------------------------------------------------------------------------*/
633
634#endif
sbs_def.h
SBS__N_TRG_TYP
#define SBS__N_TRG_TYP
Definition sbs_def.h:28
SBS__N_CR
#define SBS__N_CR
Definition sbs_def.h:27
INTS4
int INTS4
Definition typedefs.h:28
INTU4
unsigned int INTU4
Definition typedefs.h:29
s_setup_32_receiver
Definition s_setup.h:257
s_setup_64_receiver
Definition s_setup.h:463
s_setup
Definition s_setup.h:39
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