Go Back
FEB_2212 16.08.24 07:57:32
TextEdit.txt
07:57:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:57:32:ST3_Shared:INFO: FEB-Sensor
07:57:32:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
07:57:44:ST3_ModuleSelector:INFO: M8UL2T2010222B2
07:57:44:ST3_ModuleSelector:INFO: 18054
07:57:44:febtest:INFO: Testing FEB with SN 2212
07:57:45:smx_tester:INFO: Scanning setup
07:57:45:elinks:INFO: Disabling clock on downlink 0
07:57:45:elinks:INFO: Disabling clock on downlink 1
07:57:45:elinks:INFO: Disabling clock on downlink 2
07:57:45:elinks:INFO: Disabling clock on downlink 3
07:57:45:elinks:INFO: Disabling clock on downlink 4
07:57:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
07:57:45:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:45:elinks:INFO: Disabling clock on downlink 0
07:57:45:elinks:INFO: Disabling clock on downlink 1
07:57:45:elinks:INFO: Disabling clock on downlink 2
07:57:45:elinks:INFO: Disabling clock on downlink 3
07:57:45:elinks:INFO: Disabling clock on downlink 4
07:57:45:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:45:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
07:57:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:46:elinks:INFO: Disabling clock on downlink 0
07:57:46:elinks:INFO: Disabling clock on downlink 1
07:57:46:elinks:INFO: Disabling clock on downlink 2
07:57:46:elinks:INFO: Disabling clock on downlink 3
07:57:46:elinks:INFO: Disabling clock on downlink 4
07:57:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 16
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 17
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 18
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 19
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 20
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 21
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 22
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 23
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
07:57:46:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
07:57:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:46:elinks:INFO: Disabling clock on downlink 0
07:57:46:elinks:INFO: Disabling clock on downlink 1
07:57:46:elinks:INFO: Disabling clock on downlink 2
07:57:46:elinks:INFO: Disabling clock on downlink 3
07:57:46:elinks:INFO: Disabling clock on downlink 4
07:57:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
07:57:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:46:elinks:INFO: Disabling clock on downlink 0
07:57:46:elinks:INFO: Disabling clock on downlink 1
07:57:46:elinks:INFO: Disabling clock on downlink 2
07:57:46:elinks:INFO: Disabling clock on downlink 3
07:57:46:elinks:INFO: Disabling clock on downlink 4
07:57:46:setup_element:INFO: Checking SOS, encoding_mode: SOS
07:57:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
07:57:46:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
07:57:46:setup_element:INFO: Scanning clock phase
07:57:46:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:46:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:57:46:setup_element:INFO: Clock phase scan results for group 0, downlink 2
07:57:46:setup_element:INFO: Eye window for uplink 16: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:57:46:setup_element:INFO: Eye window for uplink 17: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
07:57:46:setup_element:INFO: Eye window for uplink 18: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
07:57:46:setup_element:INFO: Eye window for uplink 19: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
07:57:46:setup_element:INFO: Eye window for uplink 20: ________________________________________________________________________________
Clock Delay: 40
07:57:46:setup_element:INFO: Eye window for uplink 21: ________________________________________________________________________________
Clock Delay: 40
07:57:46:setup_element:INFO: Eye window for uplink 22: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
07:57:46:setup_element:INFO: Eye window for uplink 23: __________________________________________________________________XXXXXXXX______
Clock Delay: 29
07:57:47:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
07:57:47:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
07:57:47:setup_element:INFO: Eye window for uplink 26: ________________________________________________________________XXXXXXXXX_______
Clock Delay: 28
07:57:47:setup_element:INFO: Eye window for uplink 27: ________________________________________________________________XXXXXXXXX_______
Clock Delay: 28
07:57:47:setup_element:INFO: Eye window for uplink 28: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
07:57:47:setup_element:INFO: Eye window for uplink 29: _________________________________________________________________XXXXXXXX_______
Clock Delay: 28
07:57:47:setup_element:INFO: Eye window for uplink 30: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:57:47:setup_element:INFO: Eye window for uplink 31: _____________________________________________________________________XXXXXXXX___
Clock Delay: 32
07:57:47:setup_element:INFO: Setting the clock phase to 30 for group 0, downlink 2
07:57:47:setup_element:INFO: Scanning data phases
07:57:47:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:47:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:57:52:setup_element:INFO: Data phase scan results for group 0, downlink 2
07:57:52:setup_element:INFO: Eye window for uplink 16: ___________________________________XXXX_
Data delay found: 16
07:57:52:setup_element:INFO: Eye window for uplink 17: ________________________________XXXXX___
Data delay found: 14
07:57:52:setup_element:INFO: Eye window for uplink 18: ____________________________XXXXXX______
Data delay found: 10
07:57:52:setup_element:INFO: Eye window for uplink 19: ___________________________XXXXX________
Data delay found: 9
07:57:52:setup_element:INFO: Eye window for uplink 20: ______________________________XXXXXX____
Data delay found: 12
07:57:52:setup_element:INFO: Eye window for uplink 21: _____________________________XXXXXX_____
Data delay found: 11
07:57:52:setup_element:INFO: Eye window for uplink 22: _________________________________XXXX___
Data delay found: 14
07:57:52:setup_element:INFO: Eye window for uplink 23: XXX___________________________XXXXXXXXXX
Data delay found: 16
07:57:52:setup_element:INFO: Eye window for uplink 24: __XXXXX_________________________________
Data delay found: 24
07:57:52:setup_element:INFO: Eye window for uplink 25: ____XXXXX_______________________________
Data delay found: 26
07:57:52:setup_element:INFO: Eye window for uplink 26: ___XXXXX________________________________
Data delay found: 25
07:57:52:setup_element:INFO: Eye window for uplink 27: _______XXXXX____________________________
Data delay found: 29
07:57:52:setup_element:INFO: Eye window for uplink 28: _______XXXXX____________________________
Data delay found: 29
07:57:52:setup_element:INFO: Eye window for uplink 29: _________XXXXX__________________________
Data delay found: 31
07:57:52:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
07:57:52:setup_element:INFO: Eye window for uplink 31: ______________XXXXXXXX__________________
Data delay found: 37
07:57:52:setup_element:INFO: Setting the data phase to 16 for uplink 16
07:57:52:setup_element:INFO: Setting the data phase to 14 for uplink 17
07:57:52:setup_element:INFO: Setting the data phase to 10 for uplink 18
07:57:52:setup_element:INFO: Setting the data phase to 9 for uplink 19
07:57:52:setup_element:INFO: Setting the data phase to 12 for uplink 20
07:57:52:setup_element:INFO: Setting the data phase to 11 for uplink 21
07:57:52:setup_element:INFO: Setting the data phase to 14 for uplink 22
07:57:52:setup_element:INFO: Setting the data phase to 16 for uplink 23
07:57:52:setup_element:INFO: Setting the data phase to 24 for uplink 24
07:57:52:setup_element:INFO: Setting the data phase to 26 for uplink 25
07:57:52:setup_element:INFO: Setting the data phase to 25 for uplink 26
07:57:52:setup_element:INFO: Setting the data phase to 29 for uplink 27
07:57:52:setup_element:INFO: Setting the data phase to 29 for uplink 28
07:57:52:setup_element:INFO: Setting the data phase to 31 for uplink 29
07:57:52:setup_element:INFO: Setting the data phase to 37 for uplink 30
07:57:52:setup_element:INFO: Setting the data phase to 37 for uplink 31
07:57:52:setup_element:INFO: Beginning SMX ASICs map scan
07:57:52:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:52:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:57:52:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:57:52:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:57:52:uplink:INFO: Setting uplinks mask [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
07:57:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 0, uplink 23
07:57:52:setup_element:INFO: Adding ASIC 0x0, ASIC uplink 1, uplink 22
07:57:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
07:57:53:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
07:57:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 0, uplink 21
07:57:53:setup_element:INFO: Adding ASIC 0x2, ASIC uplink 1, uplink 20
07:57:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
07:57:53:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
07:57:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 0, uplink 19
07:57:53:setup_element:INFO: Adding ASIC 0x4, ASIC uplink 1, uplink 18
07:57:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
07:57:53:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
07:57:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 0, uplink 17
07:57:53:setup_element:INFO: Adding ASIC 0x6, ASIC uplink 1, uplink 16
07:57:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
07:57:54:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
07:57:55:setup_element:INFO: Performing Elink synchronization
07:57:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
07:57:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
07:57:55:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
07:57:55:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
07:57:55:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
07:57:55:uplink:INFO: Enabling uplinks [16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
0 | [0] | 2 | 0 | [23] | 2 | [(0, 23), (1, 22)]
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
2 | [0] | 2 | 0 | [21] | 2 | [(0, 21), (1, 20)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
4 | [0] | 2 | 0 | [19] | 2 | [(0, 19), (1, 18)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
6 | [0] | 2 | 0 | [17] | 2 | [(0, 17), (1, 16)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
07:57:55:ST3_emu_feb:DEBUG: Chip address: 0x0
07:57:55:ST3_emu_feb:DEBUG: Chip address: 0x1
07:57:56:ST3_emu_feb:DEBUG: Chip address: 0x2
07:57:56:ST3_emu_feb:DEBUG: Chip address: 0x3
07:57:56:ST3_emu_feb:DEBUG: Chip address: 0x4
07:57:56:ST3_emu_feb:DEBUG: Chip address: 0x5
07:57:56:ST3_emu_feb:DEBUG: Chip address: 0x6
07:57:56:ST3_emu_feb:DEBUG: Chip address: 0x7
07:57:56:febtest:INFO: Init all SMX (CSA): 30
07:58:10:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:58:11:febtest:INFO: 23-00 | XA-000-08-002-003-007-007-07 | 63.2 | 1088.3
07:58:11:febtest:INFO: 30-01 | XA-000-08-002-003-006-250-12 | 60.0 | 1088.3
07:58:11:febtest:INFO: 21-02 | XA-000-08-002-003-007-012-07 | 60.0 | 1100.2
07:58:11:febtest:INFO: 28-03 | XA-000-08-002-003-006-252-12 | 63.2 | 1076.3
07:58:11:febtest:INFO: 19-04 | XA-000-08-002-003-007-009-07 | 60.0 | 1100.2
07:58:12:febtest:INFO: 26-05 | XA-000-08-002-003-006-251-12 | 53.6 | 1118.1
07:58:12:febtest:INFO: 17-06 | XA-000-08-002-003-007-015-07 | 56.8 | 1124.0
07:58:12:febtest:INFO: 24-07 | XA-000-08-002-003-006-248-12 | 56.8 | 1088.3
07:58:13:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
07:58:15:ST3_smx:INFO: chip: 23-0 63.173842 C 1106.178435 mV
07:58:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:15:ST3_smx:INFO: Electrons
07:58:15:ST3_smx:INFO: # loops 0
07:58:17:ST3_smx:INFO: # loops 1
07:58:18:ST3_smx:INFO: # loops 2
07:58:20:ST3_smx:INFO: # loops 3
07:58:22:ST3_smx:INFO: # loops 4
07:58:23:ST3_smx:INFO: Total # of broken channels: 0
07:58:23:ST3_smx:INFO: List of broken channels: []
07:58:23:ST3_smx:INFO: Total # of broken channels: 0
07:58:23:ST3_smx:INFO: List of broken channels: []
07:58:25:ST3_smx:INFO: chip: 30-1 59.984250 C 1100.211760 mV
07:58:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:25:ST3_smx:INFO: Electrons
07:58:25:ST3_smx:INFO: # loops 0
07:58:27:ST3_smx:INFO: # loops 1
07:58:28:ST3_smx:INFO: # loops 2
07:58:30:ST3_smx:INFO: # loops 3
07:58:32:ST3_smx:INFO: # loops 4
07:58:33:ST3_smx:INFO: Total # of broken channels: 0
07:58:33:ST3_smx:INFO: List of broken channels: []
07:58:33:ST3_smx:INFO: Total # of broken channels: 0
07:58:33:ST3_smx:INFO: List of broken channels: []
07:58:35:ST3_smx:INFO: chip: 21-2 59.984250 C 1118.096875 mV
07:58:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:35:ST3_smx:INFO: Electrons
07:58:35:ST3_smx:INFO: # loops 0
07:58:37:ST3_smx:INFO: # loops 1
07:58:39:ST3_smx:INFO: # loops 2
07:58:40:ST3_smx:INFO: # loops 3
07:58:42:ST3_smx:INFO: # loops 4
07:58:43:ST3_smx:INFO: Total # of broken channels: 0
07:58:43:ST3_smx:INFO: List of broken channels: []
07:58:43:ST3_smx:INFO: Total # of broken channels: 0
07:58:43:ST3_smx:INFO: List of broken channels: []
07:58:45:ST3_smx:INFO: chip: 28-3 66.365920 C 1088.263500 mV
07:58:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:45:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:45:ST3_smx:INFO: Electrons
07:58:45:ST3_smx:INFO: # loops 0
07:58:47:ST3_smx:INFO: # loops 1
07:58:48:ST3_smx:INFO: # loops 2
07:58:50:ST3_smx:INFO: # loops 3
07:58:52:ST3_smx:INFO: # loops 4
07:58:53:ST3_smx:INFO: Total # of broken channels: 0
07:58:53:ST3_smx:INFO: List of broken channels: []
07:58:53:ST3_smx:INFO: Total # of broken channels: 0
07:58:53:ST3_smx:INFO: List of broken channels: []
07:58:55:ST3_smx:INFO: chip: 19-4 59.984250 C 1112.140140 mV
07:58:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:55:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:58:55:ST3_smx:INFO: Electrons
07:58:55:ST3_smx:INFO: # loops 0
07:58:57:ST3_smx:INFO: # loops 1
07:58:58:ST3_smx:INFO: # loops 2
07:59:00:ST3_smx:INFO: # loops 3
07:59:01:ST3_smx:INFO: # loops 4
07:59:03:ST3_smx:INFO: Total # of broken channels: 0
07:59:03:ST3_smx:INFO: List of broken channels: []
07:59:03:ST3_smx:INFO: Total # of broken channels: 0
07:59:03:ST3_smx:INFO: List of broken channels: []
07:59:05:ST3_smx:INFO: chip: 26-5 53.612520 C 1129.995435 mV
07:59:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:05:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:05:ST3_smx:INFO: Electrons
07:59:05:ST3_smx:INFO: # loops 0
07:59:07:ST3_smx:INFO: # loops 1
07:59:08:ST3_smx:INFO: # loops 2
07:59:10:ST3_smx:INFO: # loops 3
07:59:11:ST3_smx:INFO: # loops 4
07:59:13:ST3_smx:INFO: Total # of broken channels: 0
07:59:13:ST3_smx:INFO: List of broken channels: []
07:59:13:ST3_smx:INFO: Total # of broken channels: 0
07:59:13:ST3_smx:INFO: List of broken channels: []
07:59:15:ST3_smx:INFO: chip: 17-6 56.797143 C 1135.937260 mV
07:59:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:15:ST3_smx:INFO: Electrons
07:59:15:ST3_smx:INFO: # loops 0
07:59:16:ST3_smx:INFO: # loops 1
07:59:18:ST3_smx:INFO: # loops 2
07:59:20:ST3_smx:INFO: # loops 3
07:59:21:ST3_smx:INFO: # loops 4
07:59:23:ST3_smx:INFO: Total # of broken channels: 0
07:59:23:ST3_smx:INFO: List of broken channels: []
07:59:23:ST3_smx:INFO: Total # of broken channels: 0
07:59:23:ST3_smx:INFO: List of broken channels: []
07:59:25:ST3_smx:INFO: chip: 24-7 59.984250 C 1100.211760 mV
07:59:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:25:ST3_discr_histo:WARNING: Not enough entries for fit!!!
07:59:25:ST3_smx:INFO: Electrons
07:59:25:ST3_smx:INFO: # loops 0
07:59:26:ST3_smx:INFO: # loops 1
07:59:28:ST3_smx:INFO: # loops 2
07:59:30:ST3_smx:INFO: # loops 3
07:59:31:ST3_smx:INFO: # loops 4
07:59:33:ST3_smx:INFO: Total # of broken channels: 0
07:59:33:ST3_smx:INFO: List of broken channels: []
07:59:33:ST3_smx:INFO: Total # of broken channels: 0
07:59:33:ST3_smx:INFO: List of broken channels: []
07:59:33:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
07:59:34:febtest:INFO: 23-00 | XA-000-08-002-003-007-007-07 | 69.6 | 1118.1
07:59:34:febtest:INFO: 30-01 | XA-000-08-002-003-006-250-12 | 66.4 | 1124.0
07:59:34:febtest:INFO: 21-02 | XA-000-08-002-003-007-012-07 | 63.2 | 1130.0
07:59:34:febtest:INFO: 28-03 | XA-000-08-002-003-006-252-12 | 69.6 | 1106.2
07:59:35:febtest:INFO: 19-04 | XA-000-08-002-003-007-009-07 | 63.2 | 1124.0
07:59:35:febtest:INFO: 26-05 | XA-000-08-002-003-006-251-12 | 56.8 | 1147.8
07:59:35:febtest:INFO: 17-06 | XA-000-08-002-003-007-015-07 | 60.0 | 1153.7
07:59:35:febtest:INFO: 24-07 | XA-000-08-002-003-006-248-12 | 63.2 | 1118.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Sensor
TEST_DATE : 24_08_16-07_57_32
OPERATOR : Olga B.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2212| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
SENSOR_NAME: 18054 | SIZE: 62x124 | GRADE: A
MODULE_NAME: M8UL2T2010222B2
LADDER_NAME: L8UL201022
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.5780', '1.848', '1.8420']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.1140', '1.850', '2.5980']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '2.0170', '1.850', '0.5350']