FEB_2212 22.07.24 13:10:52
Info
13:10:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:10:52:ST3_Shared:INFO: FEB-Microcable
13:10:52:ST3_Shared:INFO: oooooooooooooooooooooooooooooooooooooooooooooooooooooooooooo
13:10:52:febtest:INFO: Testing FEB with SN 2212
13:10:54:smx_tester:INFO: Scanning setup
13:10:54:elinks:INFO: Disabling clock on downlink 0
13:10:54:elinks:INFO: Disabling clock on downlink 1
13:10:54:elinks:INFO: Disabling clock on downlink 2
13:10:54:elinks:INFO: Disabling clock on downlink 3
13:10:54:elinks:INFO: Disabling clock on downlink 4
13:10:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [0]
13:10:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:10:54:elinks:INFO: Disabling clock on downlink 0
13:10:54:elinks:INFO: Disabling clock on downlink 1
13:10:54:elinks:INFO: Disabling clock on downlink 2
13:10:54:elinks:INFO: Disabling clock on downlink 3
13:10:54:elinks:INFO: Disabling clock on downlink 4
13:10:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [1]
13:10:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:10:54:elinks:INFO: Disabling clock on downlink 0
13:10:54:elinks:INFO: Disabling clock on downlink 1
13:10:54:elinks:INFO: Disabling clock on downlink 2
13:10:54:elinks:INFO: Disabling clock on downlink 3
13:10:54:elinks:INFO: Disabling clock on downlink 4
13:10:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:10:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 24
13:10:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 25
13:10:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 26
13:10:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 27
13:10:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 28
13:10:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 29
13:10:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 30
13:10:54:setup_element:INFO: SOS detected for group 0, downlink 2, uplink 31
13:10:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:10:54:elinks:INFO: Disabling clock on downlink 0
13:10:54:elinks:INFO: Disabling clock on downlink 1
13:10:54:elinks:INFO: Disabling clock on downlink 2
13:10:54:elinks:INFO: Disabling clock on downlink 3
13:10:54:elinks:INFO: Disabling clock on downlink 4
13:10:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [3]
13:10:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:10:54:elinks:INFO: Disabling clock on downlink 0
13:10:54:elinks:INFO: Disabling clock on downlink 1
13:10:54:elinks:INFO: Disabling clock on downlink 2
13:10:54:elinks:INFO: Disabling clock on downlink 3
13:10:54:elinks:INFO: Disabling clock on downlink 4
13:10:54:setup_element:INFO: Checking SOS, encoding_mode: SOS
13:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [4]
13:10:54:setup_element:INFO: Reassigning uplinks to uplinks which passed SOS detection
13:10:54:setup_element:INFO: Scanning clock phase
13:10:54:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:10:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:10:55:setup_element:INFO: Clock phase scan results for group 0, downlink 2
13:10:55:setup_element:INFO: Eye window for uplink 24: ________________________________________________________________________________
Clock Delay: 40
13:10:55:setup_element:INFO: Eye window for uplink 25: ________________________________________________________________________________
Clock Delay: 40
13:10:55:setup_element:INFO: Eye window for uplink 26: _______________________________________________________________XXXXXXXXX________
Clock Delay: 27
13:10:55:setup_element:INFO: Eye window for uplink 27: _______________________________________________________________XXXXXXXXX________
Clock Delay: 27
13:10:55:setup_element:INFO: Eye window for uplink 28: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
13:10:55:setup_element:INFO: Eye window for uplink 29: _______________________________________________________________XXXXXXXX_________
Clock Delay: 26
13:10:55:setup_element:INFO: Eye window for uplink 30: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:10:55:setup_element:INFO: Eye window for uplink 31: ___________________________________________________________________XXXXXXXX_____
Clock Delay: 30
13:10:55:setup_element:INFO: Setting the clock phase to 28 for group 0, downlink 2
13:10:55:setup_element:INFO: Scanning data phases
13:10:55:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:10:55:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:11:00:setup_element:INFO: Data phase scan results for group 0, downlink 2
13:11:00:setup_element:INFO: Eye window for uplink 24: ____XXXXX_______________________________
Data delay found: 26
13:11:00:setup_element:INFO: Eye window for uplink 25: ______XXXXX_____________________________
Data delay found: 28
13:11:00:setup_element:INFO: Eye window for uplink 26: _____XXXXX______________________________
Data delay found: 27
13:11:00:setup_element:INFO: Eye window for uplink 27: ________XXXXXX__________________________
Data delay found: 30
13:11:00:setup_element:INFO: Eye window for uplink 28: ________XXXXX___________________________
Data delay found: 30
13:11:00:setup_element:INFO: Eye window for uplink 29: __________XXXXX_________________________
Data delay found: 32
13:11:00:setup_element:INFO: Eye window for uplink 30: _______________XXXXXX___________________
Data delay found: 37
13:11:00:setup_element:INFO: Eye window for uplink 31: _______________XXXXXXX__________________
Data delay found: 38
13:11:00:setup_element:INFO: Setting the data phase to 26 for uplink 24
13:11:00:setup_element:INFO: Setting the data phase to 28 for uplink 25
13:11:00:setup_element:INFO: Setting the data phase to 27 for uplink 26
13:11:00:setup_element:INFO: Setting the data phase to 30 for uplink 27
13:11:00:setup_element:INFO: Setting the data phase to 30 for uplink 28
13:11:00:setup_element:INFO: Setting the data phase to 32 for uplink 29
13:11:00:setup_element:INFO: Setting the data phase to 37 for uplink 30
13:11:00:setup_element:INFO: Setting the data phase to 38 for uplink 31
13:11:00:setup_element:INFO: Beginning SMX ASICs map scan
13:11:00:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:11:00:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:11:00:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:11:00:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:11:00:uplink:INFO: Setting uplinks mask [24, 25, 26, 27, 28, 29, 30, 31]
13:11:00:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 0, uplink 30
13:11:01:setup_element:INFO: Adding ASIC 0x1, ASIC uplink 1, uplink 31
13:11:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 0, uplink 28
13:11:01:setup_element:INFO: Adding ASIC 0x3, ASIC uplink 1, uplink 29
13:11:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 0, uplink 26
13:11:01:setup_element:INFO: Adding ASIC 0x5, ASIC uplink 1, uplink 27
13:11:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 0, uplink 24
13:11:02:setup_element:INFO: Adding ASIC 0x7, ASIC uplink 1, uplink 25
13:11:03:setup_element:INFO: Performing Elink synchronization
13:11:03:master:INFO: Setting encoding mode SOS for groups [0], downlinks [2]
13:11:03:master:INFO: Setting encoding mode K.28.1 for groups [0], downlinks [2]
13:11:03:master:INFO: Setting encoding mode EOS for groups [0], downlinks [2]
13:11:03:master:INFO: Setting encoding mode FRAME for groups [0], downlinks [2]
13:11:03:setup_element:INFO: Writing SMX Elink masks for group 0, downlink 2
13:11:03:uplink:INFO: Enabling uplinks [24, 25, 26, 27, 28, 29, 30, 31]
|_________________________________________________________________________|
_addr_|_upli_|_dwnli_|_grp_|_uplinks_|_#uplinks_|_uplinks_map_
1 | [0] | 2 | 0 | [30] | 2 | [(0, 30), (1, 31)]
3 | [0] | 2 | 0 | [28] | 2 | [(0, 28), (1, 29)]
5 | [0] | 2 | 0 | [26] | 2 | [(0, 26), (1, 27)]
7 | [0] | 2 | 0 | [24] | 2 | [(0, 24), (1, 25)]
|_________________________________________________________________________|
13:11:03:febtest:INFO: Init all SMX (CSA): 30
13:11:11:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:11:11:febtest:INFO: 30-01 | XA-000-08-002-003-006-250-12 | 50.4 | 1094.2
13:11:11:febtest:INFO: 28-03 | XA-000-08-002-003-006-252-12 | 56.8 | 1082.3
13:11:11:febtest:INFO: 26-05 | XA-000-08-002-003-006-251-12 | 44.1 | 1124.0
13:11:12:febtest:INFO: 24-07 | XA-000-08-002-003-006-248-12 | 53.6 | 1088.3
13:11:13:febtest:INFO: Set all CSA to ZERO
FEB type: B FEB_A: 0 FEB_B: 1
13:11:15:ST3_smx:INFO: chip: 30-1 53.612520 C 1106.178435 mV
13:11:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:11:15:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:11:15:ST3_smx:INFO: Electrons
13:11:15:ST3_smx:INFO: # loops 0
13:11:16:ST3_smx:INFO: # loops 1
13:11:18:ST3_smx:INFO: # loops 2
13:11:20:ST3_smx:INFO: Total # of broken channels: 0
13:11:20:ST3_smx:INFO: List of broken channels: []
13:11:20:ST3_smx:INFO: Total # of broken channels: 1
13:11:20:ST3_smx:INFO: List of broken channels: [1]
13:11:21:ST3_smx:INFO: chip: 28-3 56.797143 C 1088.263500 mV
13:11:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:11:21:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:11:21:ST3_smx:INFO: Electrons
13:11:21:ST3_smx:INFO: # loops 0
13:11:23:ST3_smx:INFO: # loops 1
13:11:25:ST3_smx:INFO: # loops 2
13:11:26:ST3_smx:INFO: Total # of broken channels: 0
13:11:26:ST3_smx:INFO: List of broken channels: []
13:11:26:ST3_smx:INFO: Total # of broken channels: 0
13:11:26:ST3_smx:INFO: List of broken channels: []
13:11:28:ST3_smx:INFO: chip: 26-5 44.073563 C 1135.937260 mV
13:11:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:11:28:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:11:28:ST3_smx:INFO: Electrons
13:11:28:ST3_smx:INFO: # loops 0
13:11:30:ST3_smx:INFO: # loops 1
13:11:31:ST3_smx:INFO: # loops 2
13:11:33:ST3_smx:INFO: Total # of broken channels: 0
13:11:33:ST3_smx:INFO: List of broken channels: []
13:11:33:ST3_smx:INFO: Total # of broken channels: 0
13:11:33:ST3_smx:INFO: List of broken channels: []
13:11:35:ST3_smx:INFO: chip: 24-7 53.612520 C 1094.240115 mV
13:11:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:11:35:ST3_discr_histo:WARNING: Not enough entries for fit!!!
13:11:35:ST3_smx:INFO: Electrons
13:11:35:ST3_smx:INFO: # loops 0
13:11:36:ST3_smx:INFO: # loops 1
13:11:38:ST3_smx:INFO: # loops 2
13:11:39:ST3_smx:INFO: Total # of broken channels: 0
13:11:39:ST3_smx:INFO: List of broken channels: []
13:11:39:ST3_smx:INFO: Total # of broken channels: 1
13:11:39:ST3_smx:INFO: List of broken channels: [103]
13:11:40:febtest:INFO: _Addr_|___________ASIC-ID_____________|_T_[C]_|_Vddm_[mV]_
13:11:40:febtest:INFO: 30-01 | XA-000-08-002-003-006-250-12 | 53.6 | 1124.0
13:11:40:febtest:INFO: 28-03 | XA-000-08-002-003-006-252-12 | 56.8 | 1112.1
13:11:40:febtest:INFO: 26-05 | XA-000-08-002-003-006-251-12 | 47.3 | 1153.7
13:11:41:febtest:INFO: 24-07 | XA-000-08-002-003-006-248-12 | 56.8 | 1118.1
############################################################
# S U M M A R Y #
############################################################
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
{'CSA_FRONT': 31, 'IFED': 31, 'PSC_BIAS': 131, 'SH_BIAS': 31, 'AMP_CAL': 0, 'SH_SLOW': 0, 'IREF_FAST': 32, 'THR2_GLB': 30, 'ADC_VREF_N': 30, 'ADC_VREF_P': 58, 'ADC_VREF_T': 128, 'CAL_STROBE': 64, 'IN_CSAP': 30, 'CSA_BACK': 31, 'CSA_CAS_BUF': 27, 'SH_CAS_BUF': 27, 'CSA_BIAS': 91, 'DAC_THR1': 0, 'ADC_VREF_TR': 122, 'DIAG_IBIAS': 31}
===============================
############################################################
# S U M M A R Y #
############################################################
TEST_NAME : FEB-Microcable
TEST_DATE : 24_07_22-13_10_52
OPERATOR : Robert V.;
SITE : GSI | SETUP : GSI_TEST_SETUP_1
------------------------------------------------------------
| FEB_SN : 2212| FEB_TYPE : 8.2| FEB_UPLINKS : 2| FEB_B
------------------------------------------------------------
------------------------------------------------------------
VI_before_Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '0.7825', '1.852', '1.0000']
VI_after__Init : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0580', '1.850', '1.3380']
VI_at__the_End : ['0.000', '0.0000', '0.000', '0.0000', '2.450', '1.0170', '1.850', '0.2688']