48 #define Vc_ICC __INTEL_COMPILER_BUILD_DATE    57 #define Vc_CLANG (__clang_major__ * 0x10000 + __clang_minor__ * 0x100 + __clang_patchlevel__)    66 #define Vc_APPLECLANG (__clang_major__ * 0x10000 + __clang_minor__ * 0x100 + __clang_patchlevel__)    75 #define Vc_GCC (__GNUC__ * 0x10000 + __GNUC_MINOR__ * 0x100 + __GNUC_PATCHLEVEL__)    83 #define Vc_MSVC _MSC_FULL_VER    90 #ifdef __INTEL_COMPILER    91 #define Vc_ICC __INTEL_COMPILER_BUILD_DATE    92 #elif defined(__clang__) && defined(__APPLE__) && __clang_major__ >= 6    94 #define Vc_APPLECLANG (__clang_major__ * 0x10000 + __clang_minor__ * 0x100 + __clang_patchlevel__)    95 #elif defined(__clang__)    96 #define Vc_CLANG (__clang_major__ * 0x10000 + __clang_minor__ * 0x100 + __clang_patchlevel__)    97 #elif defined(__GNUC__)    98 #define Vc_GCC (__GNUC__ * 0x10000 + __GNUC_MINOR__ * 0x100 + __GNUC_PATCHLEVEL__)    99 #elif defined(_MSC_VER)   100 #define Vc_MSVC _MSC_FULL_VER   102 #define Vc_UNSUPPORTED_COMPILER 1   105 #if defined Vc_GCC && Vc_GCC >= 0x60000   106 #define Vc_RESET_DIAGNOSTICS _Pragma("GCC diagnostic pop")   107 #pragma GCC diagnostic push   108 #pragma GCC diagnostic ignored "-Wignored-attributes"   110 #define Vc_RESET_DIAGNOSTICS   119 #pragma warning disable 2922   122 #if __cplusplus < 201103 && (!defined Vc_MSVC || _MSC_VER < 1900)   123 # error "Vc requires support for C++11."   124 #elif __cplusplus >= 201402L   126 # if __cplusplus > 201700L   131 #if defined(__GNUC__) && !defined(Vc_NO_INLINE_ASM)   136 #  define Vc_HAVE_MAX_ALIGN_T 1   137 #elif !defined(Vc_CLANG) && !defined(Vc_ICC)   139 #  define Vc_HAVE_STD_MAX_ALIGN_T 1   142 #if defined(Vc_GCC) || defined(Vc_CLANG) || defined Vc_APPLECLANG   143 #define Vc_USE_BUILTIN_VECTOR_TYPES 1   147 #  define Vc_CDECL __cdecl   148 #  define Vc_VDECL __vectorcall   158 #define Scalar 0x00100000   159 #define SSE    0x00200000   160 #define SSE2   0x00300000   161 #define SSE3   0x00400000   162 #define SSSE3  0x00500000   163 #define SSE4_1 0x00600000   164 #define SSE4_2 0x00700000   165 #define AVX    0x00800000   166 #define AVX2   0x00900000   168 #define XOP    0x00000001   169 #define FMA4   0x00000002   170 #define F16C   0x00000004   171 #define POPCNT 0x00000008   172 #define SSE4a  0x00000010   173 #define FMA    0x00000020   174 #define BMI2   0x00000040   176 #define IMPL_MASK 0xFFF00000   177 #define EXT_MASK  0x000FFFFF   191 # elif defined(_M_AMD64)   202 #if defined Vc_ICC && !defined __POPCNT__   203 # if defined __SSE4_2__ || defined __SSE4A__   204 #  define __POPCNT__ 1   209 #error "You are using the old VC_IMPL macro. Since Vc 1.0 all Vc macros start with Vc_, i.e. a lower-case 'c'"   214 #  if defined(__AVX2__)   215 #    define Vc_IMPL_AVX2 1   216 #    define Vc_IMPL_AVX 1   217 #  elif defined(__AVX__)   218 #    define Vc_IMPL_AVX 1   220 #    if defined(__SSE4_2__)   221 #      define Vc_IMPL_SSE 1   222 #      define Vc_IMPL_SSE4_2 1   224 #    if defined(__SSE4_1__)   225 #      define Vc_IMPL_SSE 1   226 #      define Vc_IMPL_SSE4_1 1   228 #    if defined(__SSE3__)   229 #      define Vc_IMPL_SSE 1   230 #      define Vc_IMPL_SSE3 1   232 #    if defined(__SSSE3__)   233 #      define Vc_IMPL_SSE 1   234 #      define Vc_IMPL_SSSE3 1   236 #    if defined(__SSE2__)   237 #      define Vc_IMPL_SSE 1   238 #      define Vc_IMPL_SSE2 1   241 #    if defined(Vc_IMPL_SSE)   244 #      define Vc_IMPL_Scalar 1   247 #  if !defined(Vc_IMPL_Scalar)   249 #      define Vc_IMPL_FMA4 1   252 #      define Vc_IMPL_XOP 1   255 #      define Vc_IMPL_F16C 1   258 #      define Vc_IMPL_POPCNT 1   261 #      define Vc_IMPL_SSE4a 1   264 #      define Vc_IMPL_FMA 1   267 #      define Vc_IMPL_BMI2 1   273 #  if (Vc_IMPL & IMPL_MASK) == AVX2 // AVX2 supersedes SSE   274 #    define Vc_IMPL_AVX2 1   275 #    define Vc_IMPL_AVX 1   276 #  elif (Vc_IMPL & IMPL_MASK) == AVX // AVX supersedes SSE   277 #    define Vc_IMPL_AVX 1   278 #  elif (Vc_IMPL & IMPL_MASK) == Scalar   279 #    define Vc_IMPL_Scalar 1   280 #  elif (Vc_IMPL & IMPL_MASK) == SSE4_2   281 #    define Vc_IMPL_SSE4_2 1   282 #    define Vc_IMPL_SSE4_1 1   283 #    define Vc_IMPL_SSSE3 1   284 #    define Vc_IMPL_SSE3 1   285 #    define Vc_IMPL_SSE2 1   286 #    define Vc_IMPL_SSE 1   287 #  elif (Vc_IMPL & IMPL_MASK) == SSE4_1   288 #    define Vc_IMPL_SSE4_1 1   289 #    define Vc_IMPL_SSSE3 1   290 #    define Vc_IMPL_SSE3 1   291 #    define Vc_IMPL_SSE2 1   292 #    define Vc_IMPL_SSE 1   293 #  elif (Vc_IMPL & IMPL_MASK) == SSSE3   294 #    define Vc_IMPL_SSSE3 1   295 #    define Vc_IMPL_SSE3 1   296 #    define Vc_IMPL_SSE2 1   297 #    define Vc_IMPL_SSE 1   298 #  elif (Vc_IMPL & IMPL_MASK) == SSE3   299 #    define Vc_IMPL_SSE3 1   300 #    define Vc_IMPL_SSE2 1   301 #    define Vc_IMPL_SSE 1   302 #  elif (Vc_IMPL & IMPL_MASK) == SSE2   303 #    define Vc_IMPL_SSE2 1   304 #    define Vc_IMPL_SSE 1   305 #  elif (Vc_IMPL & IMPL_MASK) == SSE   306 #    define Vc_IMPL_SSE 1   307 #    if defined(__SSE4_2__)   308 #      define Vc_IMPL_SSE4_2 1   310 #    if defined(__SSE4_1__)   311 #      define Vc_IMPL_SSE4_1 1   313 #    if defined(__SSE3__)   314 #      define Vc_IMPL_SSE3 1   316 #    if defined(__SSSE3__)   317 #      define Vc_IMPL_SSSE3 1   319 #    if defined(__SSE2__)   320 #      define Vc_IMPL_SSE2 1   322 #  elif (Vc_IMPL & IMPL_MASK) == 0 && (Vc_IMPL & SSE4a)   325 #    define Vc_IMPL_SSE3 1   326 #    define Vc_IMPL_SSE2 1   327 #    define Vc_IMPL_SSE 1   330 #    define Vc_IMPL_XOP 1   332 #  if (Vc_IMPL & FMA4)   333 #    define Vc_IMPL_FMA4 1   335 #  if (Vc_IMPL & F16C)   336 #    define Vc_IMPL_F16C 1   338 #  if (!defined(Vc_IMPL_Scalar) && defined(__POPCNT__)) || (Vc_IMPL & POPCNT)   339 #    define Vc_IMPL_POPCNT 1   341 #  if (Vc_IMPL & SSE4a)   342 #    define Vc_IMPL_SSE4a 1   345 #    define Vc_IMPL_FMA 1   347 #  if (Vc_IMPL & BMI2)   348 #    define Vc_IMPL_BMI2 1   356 #  define Vc_USE_VEX_CODING 1   361 #    define Vc_IMPL_SSE4_2 1   362 #    define Vc_IMPL_SSE4_1 1   363 #    define Vc_IMPL_SSSE3 1   364 #    define Vc_IMPL_SSE3 1   365 #    define Vc_IMPL_SSE2 1   366 #    define Vc_IMPL_SSE 1   369 #if defined(Vc_CLANG) && Vc_CLANG >= 0x30600 && Vc_CLANG < 0x30700   370 #    if defined(Vc_IMPL_AVX)   371 #        warning "clang 3.6.x miscompiles AVX code, frequently losing 50% of the data. Vc will fall back to SSE4 instead."   373 #        if defined(Vc_IMPL_AVX2)   379 # if !defined(Vc_IMPL_Scalar) && !defined(Vc_IMPL_SSE) && !defined(Vc_IMPL_AVX)   380 #  error "No suitable Vc implementation was selected! Probably Vc_IMPL was set to an invalid value."   381 # elif defined(Vc_IMPL_SSE) && !defined(Vc_IMPL_SSE2)   382 #  error "SSE requested but no SSE2 support. Vc needs at least SSE2!"   406 #if defined Vc_IMPL_AVX2   407 #define Vc_DEFAULT_IMPL_AVX2   408 #elif defined Vc_IMPL_AVX   409 #define Vc_DEFAULT_IMPL_AVX   410 #elif defined Vc_IMPL_SSE   411 #define Vc_DEFAULT_IMPL_SSE   412 #elif defined Vc_IMPL_Scalar   413 #define Vc_DEFAULT_IMPL_Scalar   415 #error "Preprocessor logic broken. Please report a bug."   420 namespace Vc_VERSIONED_NAMESPACE
   423 typedef   signed char        int8_t;
   424 typedef unsigned char       uint8_t;
   425 typedef   signed short      int16_t;
   426 typedef unsigned short     uint16_t;
   427 typedef   signed int        int32_t;
   428 typedef unsigned int       uint32_t;
   429 typedef   signed long long  int64_t;
   430 typedef unsigned long long uint64_t;
   487     ImplementationMask = 0xfff
   520     ExtraInstructionsMask = 0xfffff000u
   536         return static_cast<Implementation>(Features & ImplementationMask);
   541         return static_cast<unsigned int>(impl) == current();
   549         return static_cast<unsigned int>(low) <= current() &&
   550                static_cast<unsigned int>(high) >= current();
   555     static constexpr 
bool runs_on(
unsigned int extraInstructions)
   557         return (extraInstructions & Features & ExtraInstructionsMask) ==
   558                (Features & ExtraInstructionsMask);
   568 #ifdef Vc_IMPL_Scalar   570 #elif defined(Vc_IMPL_AVX2)   572 #elif defined(Vc_IMPL_AVX)   574 #elif defined(Vc_IMPL_SSE4_2)   576 #elif defined(Vc_IMPL_SSE4_1)   578 #elif defined(Vc_IMPL_SSSE3)   580 #elif defined(Vc_IMPL_SSE3)   582 #elif defined(Vc_IMPL_SSE2)   594 #ifdef Vc_IMPL_POPCNT   603 #ifdef Vc_USE_VEX_CODING   612 #endif // VC_GLOBAL_H_ 
ExtraInstructions
The list of available instructions is not easily described by a linear list of instruction sets...
Align on boundary of page sizes (e.g. 
static constexpr bool is_between(Implementation low, Implementation high)
Returns whether the current Vc::Implementation implements at least low and at most high...
Support for FMA instructions (3 operand variant) 
Implementation
Enum to identify a certain SIMD instruction set. 
static constexpr bool runs_on(unsigned int extraInstructions)
Returns whether the current code would run on a CPU providing extraInstructions. 
This class identifies the specific implementation Vc uses in the current translation unit in terms of...
Support for BMI2 instructions. 
Support for XOP instructions. 
MallocAlignment
Enum that specifies the alignment and padding restrictions to use for memory allocation with Vc::mall...
Support for the population count instruction. 
Support for SSE4a instructions. 
static constexpr bool is(Implementation impl)
Returns whether impl is the current Vc::Implementation. 
x86 SSE + SSE2 + SSE3 + SSSE3 + SSE4.1 + SSE4.2 
Align on boundary of cache line sizes (e.g. 
Support for ternary instruction coding (VEX) 
x86 SSE + SSE2 + SSE3 + SSSE3 
Support for FMA4 instructions. 
static constexpr Implementation current()
Returns the currently used Vc::Implementation. 
uses only fundamental types 
Align on boundary of vector sizes (e.g. 
Support for float16 conversions in hardware. 
x86 SSE + SSE2 + SSE3 + SSSE3 + SSE4.1