Vc  1.3.80-dev
SIMD Vector Classes for C++
global.h
1 /* This file is part of the Vc library. {{{
2 Copyright © 2009-2015 Matthias Kretz <kretz@kde.org>
3 
4 Redistribution and use in source and binary forms, with or without
5 modification, are permitted provided that the following conditions are met:
6  * Redistributions of source code must retain the above copyright
7  notice, this list of conditions and the following disclaimer.
8  * Redistributions in binary form must reproduce the above copyright
9  notice, this list of conditions and the following disclaimer in the
10  documentation and/or other materials provided with the distribution.
11  * Neither the names of contributing organizations nor the
12  names of its contributors may be used to endorse or promote products
13  derived from this software without specific prior written permission.
14 
15 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
16 ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER BE LIABLE FOR ANY
19 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
21 LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
22 ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
24 SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 
26 }}}*/
27 
28 #ifndef VC_GLOBAL_H_
29 #define VC_GLOBAL_H_
30 
31 #include <cstdint>
32 #include "fwddecl.h"
33 
34 #ifdef DOXYGEN
35 
48 #define Vc_ICC __INTEL_COMPILER_BUILD_DATE
49 #undef Vc_ICC
50 
57 #define Vc_CLANG (__clang_major__ * 0x10000 + __clang_minor__ * 0x100 + __clang_patchlevel__)
58 #undef Vc_CLANG
59 
66 #define Vc_APPLECLANG (__clang_major__ * 0x10000 + __clang_minor__ * 0x100 + __clang_patchlevel__)
67 #undef Vc_APPLECLANG
68 
75 #define Vc_GCC (__GNUC__ * 0x10000 + __GNUC_MINOR__ * 0x100 + __GNUC_PATCHLEVEL__)
76 
83 #define Vc_MSVC _MSC_FULL_VER
84 #undef Vc_MSVC
85 
86 
87 #else // DOXYGEN
88 
89 // Compiler defines
90 #ifdef __INTEL_COMPILER
91 #define Vc_ICC __INTEL_COMPILER_BUILD_DATE
92 #elif defined(__clang__) && defined(__APPLE__) && __clang_major__ >= 6
93 // this is going to break :-(
94 #define Vc_APPLECLANG (__clang_major__ * 0x10000 + __clang_minor__ * 0x100 + __clang_patchlevel__)
95 #elif defined(__clang__)
96 #define Vc_CLANG (__clang_major__ * 0x10000 + __clang_minor__ * 0x100 + __clang_patchlevel__)
97 #elif defined(__GNUC__)
98 #define Vc_GCC (__GNUC__ * 0x10000 + __GNUC_MINOR__ * 0x100 + __GNUC_PATCHLEVEL__)
99 #elif defined(_MSC_VER)
100 #define Vc_MSVC _MSC_FULL_VER
101 #else
102 #define Vc_UNSUPPORTED_COMPILER 1
103 #endif
104 
105 #if defined Vc_GCC && Vc_GCC >= 0x60000
106 #define Vc_RESET_DIAGNOSTICS _Pragma("GCC diagnostic pop")
107 #pragma GCC diagnostic push
108 #pragma GCC diagnostic ignored "-Wignored-attributes"
109 #else
110 #define Vc_RESET_DIAGNOSTICS
111 #endif
112 
113 #if defined Vc_ICC
114 // 'warning #2922: template parameter "<unnamed>" cannot be used because it follows a
115 // parameter pack and cannot be deduced from the parameters of function template'
116 // This warning is stupid. The parameter is unnamed because I don't want to use it. I see
117 // no other workaround than to disable the warning. Sadly, it doesn't suffice to disable
118 // it for the Vc headers. It must also be disabled at the places Vc types are used.
119 #pragma warning disable 2922
120 #endif
121 
122 #if __cplusplus < 201103 && (!defined Vc_MSVC || _MSC_VER < 1900)
123 # error "Vc requires support for C++11."
124 #elif __cplusplus >= 201402L
125 # define Vc_CXX14 1
126 # if __cplusplus > 201700L
127 # define Vc_CXX17 1
128 # endif
129 #endif
130 
131 #if defined(__GNUC__) && !defined(Vc_NO_INLINE_ASM)
132 #define Vc_GNU_ASM 1
133 #endif
134 
135 #ifdef Vc_GCC
136 # define Vc_HAVE_MAX_ALIGN_T 1
137 #elif !defined(Vc_CLANG) && !defined(Vc_ICC)
138 // Clang/ICC don't provide max_align_t at all
139 # define Vc_HAVE_STD_MAX_ALIGN_T 1
140 #endif
141 
142 #if defined(Vc_GCC) || defined(Vc_CLANG) || defined Vc_APPLECLANG
143 #define Vc_USE_BUILTIN_VECTOR_TYPES 1
144 #endif
145 
146 #ifdef Vc_MSVC
147 # define Vc_CDECL __cdecl
148 # define Vc_VDECL __vectorcall
149 #else
150 # define Vc_CDECL
151 # define Vc_VDECL
152 #endif
153 
154 /* Define the following strings to a unique integer, which is the only type the preprocessor can
155  * compare. This allows to use -DVc_IMPL=SSE3. The preprocessor will then consider Vc_IMPL and SSE3
156  * to be equal. Of course, it is important to undefine the strings later on!
157  */
158 #define Scalar 0x00100000
159 #define SSE 0x00200000
160 #define SSE2 0x00300000
161 #define SSE3 0x00400000
162 #define SSSE3 0x00500000
163 #define SSE4_1 0x00600000
164 #define SSE4_2 0x00700000
165 #define AVX 0x00800000
166 #define AVX2 0x00900000
167 
168 #define XOP 0x00000001
169 #define FMA4 0x00000002
170 #define F16C 0x00000004
171 #define POPCNT 0x00000008
172 #define SSE4a 0x00000010
173 #define FMA 0x00000020
174 #define BMI2 0x00000040
175 
176 #define IMPL_MASK 0xFFF00000
177 #define EXT_MASK 0x000FFFFF
178 
179 #ifdef Vc_MSVC
180 # ifdef _M_IX86_FP
181 # if _M_IX86_FP >= 1
182 # ifndef __SSE__
183 # define __SSE__ 1
184 # endif
185 # endif
186 # if _M_IX86_FP >= 2
187 # ifndef __SSE2__
188 # define __SSE2__ 1
189 # endif
190 # endif
191 # elif defined(_M_AMD64)
192 // If the target is x86_64 then SSE2 is guaranteed
193 # ifndef __SSE__
194 # define __SSE__ 1
195 # endif
196 # ifndef __SSE2__
197 # define __SSE2__ 1
198 # endif
199 # endif
200 #endif
201 
202 #if defined Vc_ICC && !defined __POPCNT__
203 # if defined __SSE4_2__ || defined __SSE4A__
204 # define __POPCNT__ 1
205 # endif
206 #endif
207 
208 #ifdef VC_IMPL
209 #error "You are using the old VC_IMPL macro. Since Vc 1.0 all Vc macros start with Vc_, i.e. a lower-case 'c'"
210 #endif
211 
212 #ifndef Vc_IMPL
213 
214 # if defined(__AVX2__)
215 # define Vc_IMPL_AVX2 1
216 # define Vc_IMPL_AVX 1
217 # elif defined(__AVX__)
218 # define Vc_IMPL_AVX 1
219 # else
220 # if defined(__SSE4_2__)
221 # define Vc_IMPL_SSE 1
222 # define Vc_IMPL_SSE4_2 1
223 # endif
224 # if defined(__SSE4_1__)
225 # define Vc_IMPL_SSE 1
226 # define Vc_IMPL_SSE4_1 1
227 # endif
228 # if defined(__SSE3__)
229 # define Vc_IMPL_SSE 1
230 # define Vc_IMPL_SSE3 1
231 # endif
232 # if defined(__SSSE3__)
233 # define Vc_IMPL_SSE 1
234 # define Vc_IMPL_SSSE3 1
235 # endif
236 # if defined(__SSE2__)
237 # define Vc_IMPL_SSE 1
238 # define Vc_IMPL_SSE2 1
239 # endif
240 
241 # if defined(Vc_IMPL_SSE)
242  // nothing
243 # else
244 # define Vc_IMPL_Scalar 1
245 # endif
246 # endif
247 # if !defined(Vc_IMPL_Scalar)
248 # ifdef __FMA4__
249 # define Vc_IMPL_FMA4 1
250 # endif
251 # ifdef __XOP__
252 # define Vc_IMPL_XOP 1
253 # endif
254 # ifdef __F16C__
255 # define Vc_IMPL_F16C 1
256 # endif
257 # ifdef __POPCNT__
258 # define Vc_IMPL_POPCNT 1
259 # endif
260 # ifdef __SSE4A__
261 # define Vc_IMPL_SSE4a 1
262 # endif
263 # ifdef __FMA__
264 # define Vc_IMPL_FMA 1
265 # endif
266 # ifdef __BMI2__
267 # define Vc_IMPL_BMI2 1
268 # endif
269 # endif
270 
271 #else // Vc_IMPL
272 
273 # if (Vc_IMPL & IMPL_MASK) == AVX2 // AVX2 supersedes SSE
274 # define Vc_IMPL_AVX2 1
275 # define Vc_IMPL_AVX 1
276 # elif (Vc_IMPL & IMPL_MASK) == AVX // AVX supersedes SSE
277 # define Vc_IMPL_AVX 1
278 # elif (Vc_IMPL & IMPL_MASK) == Scalar
279 # define Vc_IMPL_Scalar 1
280 # elif (Vc_IMPL & IMPL_MASK) == SSE4_2
281 # define Vc_IMPL_SSE4_2 1
282 # define Vc_IMPL_SSE4_1 1
283 # define Vc_IMPL_SSSE3 1
284 # define Vc_IMPL_SSE3 1
285 # define Vc_IMPL_SSE2 1
286 # define Vc_IMPL_SSE 1
287 # elif (Vc_IMPL & IMPL_MASK) == SSE4_1
288 # define Vc_IMPL_SSE4_1 1
289 # define Vc_IMPL_SSSE3 1
290 # define Vc_IMPL_SSE3 1
291 # define Vc_IMPL_SSE2 1
292 # define Vc_IMPL_SSE 1
293 # elif (Vc_IMPL & IMPL_MASK) == SSSE3
294 # define Vc_IMPL_SSSE3 1
295 # define Vc_IMPL_SSE3 1
296 # define Vc_IMPL_SSE2 1
297 # define Vc_IMPL_SSE 1
298 # elif (Vc_IMPL & IMPL_MASK) == SSE3
299 # define Vc_IMPL_SSE3 1
300 # define Vc_IMPL_SSE2 1
301 # define Vc_IMPL_SSE 1
302 # elif (Vc_IMPL & IMPL_MASK) == SSE2
303 # define Vc_IMPL_SSE2 1
304 # define Vc_IMPL_SSE 1
305 # elif (Vc_IMPL & IMPL_MASK) == SSE
306 # define Vc_IMPL_SSE 1
307 # if defined(__SSE4_2__)
308 # define Vc_IMPL_SSE4_2 1
309 # endif
310 # if defined(__SSE4_1__)
311 # define Vc_IMPL_SSE4_1 1
312 # endif
313 # if defined(__SSE3__)
314 # define Vc_IMPL_SSE3 1
315 # endif
316 # if defined(__SSSE3__)
317 # define Vc_IMPL_SSSE3 1
318 # endif
319 # if defined(__SSE2__)
320 # define Vc_IMPL_SSE2 1
321 # endif
322 # elif (Vc_IMPL & IMPL_MASK) == 0 && (Vc_IMPL & SSE4a)
323  // this is for backward compatibility only where SSE4a was included in the main
324  // line of available SIMD instruction sets
325 # define Vc_IMPL_SSE3 1
326 # define Vc_IMPL_SSE2 1
327 # define Vc_IMPL_SSE 1
328 # endif
329 # if (Vc_IMPL & XOP)
330 # define Vc_IMPL_XOP 1
331 # endif
332 # if (Vc_IMPL & FMA4)
333 # define Vc_IMPL_FMA4 1
334 # endif
335 # if (Vc_IMPL & F16C)
336 # define Vc_IMPL_F16C 1
337 # endif
338 # if (!defined(Vc_IMPL_Scalar) && defined(__POPCNT__)) || (Vc_IMPL & POPCNT)
339 # define Vc_IMPL_POPCNT 1
340 # endif
341 # if (Vc_IMPL & SSE4a)
342 # define Vc_IMPL_SSE4a 1
343 # endif
344 # if (Vc_IMPL & FMA)
345 # define Vc_IMPL_FMA 1
346 # endif
347 # if (Vc_IMPL & BMI2)
348 # define Vc_IMPL_BMI2 1
349 # endif
350 # undef Vc_IMPL
351 
352 #endif // Vc_IMPL
353 
354 // If AVX is enabled in the compiler it will use VEX coding for the SIMD instructions.
355 #ifdef __AVX__
356 # define Vc_USE_VEX_CODING 1
357 #endif
358 
359 #ifdef Vc_IMPL_AVX
360 // if we have AVX then we also have all SSE intrinsics
361 # define Vc_IMPL_SSE4_2 1
362 # define Vc_IMPL_SSE4_1 1
363 # define Vc_IMPL_SSSE3 1
364 # define Vc_IMPL_SSE3 1
365 # define Vc_IMPL_SSE2 1
366 # define Vc_IMPL_SSE 1
367 #endif
368 
369 #if defined(Vc_CLANG) && Vc_CLANG >= 0x30600 && Vc_CLANG < 0x30700
370 # if defined(Vc_IMPL_AVX)
371 # warning "clang 3.6.x miscompiles AVX code, frequently losing 50% of the data. Vc will fall back to SSE4 instead."
372 # undef Vc_IMPL_AVX
373 # if defined(Vc_IMPL_AVX2)
374 # undef Vc_IMPL_AVX2
375 # endif
376 # endif
377 #endif
378 
379 # if !defined(Vc_IMPL_Scalar) && !defined(Vc_IMPL_SSE) && !defined(Vc_IMPL_AVX)
380 # error "No suitable Vc implementation was selected! Probably Vc_IMPL was set to an invalid value."
381 # elif defined(Vc_IMPL_SSE) && !defined(Vc_IMPL_SSE2)
382 # error "SSE requested but no SSE2 support. Vc needs at least SSE2!"
383 # endif
384 
385 #undef Scalar
386 #undef SSE
387 #undef SSE2
388 #undef SSE3
389 #undef SSSE3
390 #undef SSE4_1
391 #undef SSE4_2
392 #undef AVX
393 #undef AVX2
394 
395 #undef XOP
396 #undef FMA4
397 #undef F16C
398 #undef POPCNT
399 #undef SSE4a
400 #undef FMA
401 #undef BMI2
402 
403 #undef IMPL_MASK
404 #undef EXT_MASK
405 
406 #if defined Vc_IMPL_AVX2
407 #define Vc_DEFAULT_IMPL_AVX2
408 #elif defined Vc_IMPL_AVX
409 #define Vc_DEFAULT_IMPL_AVX
410 #elif defined Vc_IMPL_SSE
411 #define Vc_DEFAULT_IMPL_SSE
412 #elif defined Vc_IMPL_Scalar
413 #define Vc_DEFAULT_IMPL_Scalar
414 #else
415 #error "Preprocessor logic broken. Please report a bug."
416 #endif
417 
418 #endif // DOXYGEN
419 
420 namespace Vc_VERSIONED_NAMESPACE
421 {
422 
423 typedef signed char int8_t;
424 typedef unsigned char uint8_t;
425 typedef signed short int16_t;
426 typedef unsigned short uint16_t;
427 typedef signed int int32_t;
428 typedef unsigned int uint32_t;
429 typedef signed long long int64_t;
430 typedef unsigned long long uint64_t;
431 
457 };
458 
468 enum Implementation : std::uint_least32_t { // TODO: make enum class
487  ImplementationMask = 0xfff
488 };
489 
500 enum ExtraInstructions : std::uint_least32_t { // TODO: make enum class
504  Fma4Instructions = 0x02000,
506  XopInstructions = 0x04000,
510  Sse4aInstructions = 0x10000,
512  FmaInstructions = 0x20000,
514  VexInstructions = 0x40000,
516  Bmi2Instructions = 0x80000,
517  // PclmulqdqInstructions,
518  // AesInstructions,
519  // RdrandInstructions
520  ExtraInstructionsMask = 0xfffff000u
521 };
522 
532 template <unsigned int Features> struct ImplementationT {
534  static constexpr Implementation current()
535  {
536  return static_cast<Implementation>(Features & ImplementationMask);
537  }
539  static constexpr bool is(Implementation impl)
540  {
541  return static_cast<unsigned int>(impl) == current();
542  }
547  static constexpr bool is_between(Implementation low, Implementation high)
548  {
549  return static_cast<unsigned int>(low) <= current() &&
550  static_cast<unsigned int>(high) >= current();
551  }
555  static constexpr bool runs_on(unsigned int extraInstructions)
556  {
557  return (extraInstructions & Features & ExtraInstructionsMask) ==
558  (Features & ExtraInstructionsMask);
559  }
560 };
568 #ifdef Vc_IMPL_Scalar
569  ScalarImpl
570 #elif defined(Vc_IMPL_AVX2)
571  AVX2Impl
572 #elif defined(Vc_IMPL_AVX)
573  AVXImpl
574 #elif defined(Vc_IMPL_SSE4_2)
575  SSE42Impl
576 #elif defined(Vc_IMPL_SSE4_1)
577  SSE41Impl
578 #elif defined(Vc_IMPL_SSSE3)
579  SSSE3Impl
580 #elif defined(Vc_IMPL_SSE3)
581  SSE3Impl
582 #elif defined(Vc_IMPL_SSE2)
583  SSE2Impl
584 #endif
585 #ifdef Vc_IMPL_SSE4a
587 #ifdef Vc_IMPL_XOP
589 #ifdef Vc_IMPL_FMA4
591 #endif
592 #endif
593 #endif
594 #ifdef Vc_IMPL_POPCNT
596 #endif
597 #ifdef Vc_IMPL_FMA
599 #endif
600 #ifdef Vc_IMPL_BMI2
602 #endif
603 #ifdef Vc_USE_VEX_CODING
605 #endif
606  >;
607 
608 } // namespace Vc
609 
610 #include "version.h"
611 
612 #endif // VC_GLOBAL_H_
613 
614 // vim: foldmethod=marker
Intel Xeon Phi.
Definition: global.h:486
ExtraInstructions
The list of available instructions is not easily described by a linear list of instruction sets...
Definition: global.h:500
Align on boundary of page sizes (e.g.
Definition: global.h:456
static constexpr bool is_between(Implementation low, Implementation high)
Returns whether the current Vc::Implementation implements at least low and at most high...
Definition: global.h:547
Support for FMA instructions (3 operand variant)
Definition: global.h:512
Implementation
Enum to identify a certain SIMD instruction set.
Definition: global.h:468
static constexpr bool runs_on(unsigned int extraInstructions)
Returns whether the current code would run on a CPU providing extraInstructions.
Definition: global.h:555
This class identifies the specific implementation Vc uses in the current translation unit in terms of...
Definition: global.h:532
Support for BMI2 instructions.
Definition: global.h:516
Support for XOP instructions.
Definition: global.h:506
MallocAlignment
Enum that specifies the alignment and padding restrictions to use for memory allocation with Vc::mall...
Definition: global.h:438
Support for the population count instruction.
Definition: global.h:508
Support for SSE4a instructions.
Definition: global.h:510
static constexpr bool is(Implementation impl)
Returns whether impl is the current Vc::Implementation.
Definition: global.h:539
x86 SSE + SSE2
Definition: global.h:472
x86 SSE + SSE2 + SSE3 + SSSE3 + SSE4.1 + SSE4.2
Definition: global.h:480
Align on boundary of cache line sizes (e.g.
Definition: global.h:450
Support for ternary instruction coding (VEX)
Definition: global.h:514
x86 SSE + SSE2 + SSE3 + SSSE3
Definition: global.h:476
x86 SSE + SSE2 + SSE3
Definition: global.h:474
Support for FMA4 instructions.
Definition: global.h:504
static constexpr Implementation current()
Returns the currently used Vc::Implementation.
Definition: global.h:534
uses only fundamental types
Definition: global.h:470
Align on boundary of vector sizes (e.g.
Definition: global.h:444
x86 AVX + AVX2
Definition: global.h:484
Support for float16 conversions in hardware.
Definition: global.h:502
x86 AVX
Definition: global.h:482
x86 SSE + SSE2 + SSE3 + SSSE3 + SSE4.1
Definition: global.h:478